blob: ca5569ee88f59f9d32439b0320b8e0aab4c0bf3a [file] [log] [blame]
Project Chip ID is: 402688949
Setting Project Chip ID to: 18008bb5
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!