merging stuff
Merge branch 'gf180-pwm' of github.com:james-tandon-csueb/gf180-pwm into gf180-pwm
diff --git a/lib/user_proj_example.lib b/lib/user_proj_example.lib
deleted file mode 100644
index f2b52b2..0000000
--- a/lib/user_proj_example.lib
+++ /dev/null
@@ -1,7165 +0,0 @@
-library (user_proj_example) {
- comment : "";
- delay_model : table_lookup;
- simulation : false;
- capacitive_load_unit (1,pF);
- leakage_power_unit : 1pW;
- current_unit : "1A";
- pulling_resistance_unit : "1ohm";
- time_unit : "1ns";
- voltage_unit : "1v";
- library_features(report_delay_calculation);
-
- input_threshold_pct_rise : 50;
- input_threshold_pct_fall : 50;
- output_threshold_pct_rise : 50;
- output_threshold_pct_fall : 50;
- slew_lower_threshold_pct_rise : 30;
- slew_lower_threshold_pct_fall : 30;
- slew_upper_threshold_pct_rise : 70;
- slew_upper_threshold_pct_fall : 70;
- slew_derate_from_library : 1.0;
-
-
- nom_process : 1.0;
- nom_temperature : 25.0;
- nom_voltage : 5.00;
-
- lu_table_template(template_1) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_10) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_100) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_101) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_102) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_103) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_104) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_105) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_106) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_107) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_108) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_109) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_11) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_110) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_111) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_112) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_113) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_114) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_115) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_116) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_117) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_118) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_119) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_12) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_120) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_121) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_122) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_123) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_124) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_125) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_126) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_127) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_128) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_129) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_13) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_130) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_131) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_132) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_133) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_134) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_135) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_136) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_137) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_138) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_139) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_14) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_140) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_141) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_142) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_143) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_144) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_145) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_146) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_147) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_148) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_149) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_15) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_150) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_151) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_152) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_153) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_154) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_155) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_156) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_157) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_158) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_159) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_16) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_160) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_161) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_162) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_163) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_164) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_165) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_166) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_167) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_168) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_169) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_17) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_170) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_171) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_172) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_173) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_174) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_175) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_176) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_177) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_178) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_179) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_18) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_180) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_181) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_182) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_183) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_184) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_185) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_186) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_187) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_188) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_189) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_19) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_190) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_191) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_192) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_193) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_194) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_195) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_196) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_197) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_198) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_199) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_2) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_20) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_200) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_201) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_202) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_203) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_204) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_205) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_206) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_207) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_208) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_209) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_21) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_210) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_211) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_212) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_213) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_214) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_215) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_216) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_217) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_218) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_219) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_22) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_220) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_221) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_222) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_223) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_224) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_225) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_226) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_227) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_228) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_229) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_23) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_230) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_231) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_232) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_233) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_234) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_235) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_236) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_237) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_238) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_239) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_24) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_240) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_241) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_242) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_243) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_244) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_245) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_246) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_247) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_248) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_249) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_25) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_250) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_251) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_252) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_253) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_254) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_255) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_256) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_257) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_258) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_259) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_26) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_260) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_261) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_262) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_263) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_264) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_265) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_266) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_267) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_268) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_27) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_28) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_29) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_3) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_30) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_31) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_32) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_33) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_34) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_35) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_36) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_37) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_38) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_39) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_4) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_40) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_41) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_42) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_43) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_44) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_45) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_46) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_47) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_48) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_49) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_5) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_50) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_51) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_52) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_53) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_54) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_55) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_56) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_57) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_58) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_59) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_6) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_60) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_61) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_62) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_63) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_64) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_65) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_66) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_67) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_68) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_69) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_7) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_70) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_71) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_72) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_73) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_74) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_75) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_76) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_77) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_78) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_79) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_8) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_80) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_81) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_82) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_83) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_84) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_85) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_86) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_87) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_88) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_89) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_9) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_90) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_91) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_92) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_93) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_94) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_95) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_96) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_97) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_98) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- lu_table_template(template_99) {
- variable_1 : total_output_net_capacitance;
- index_1 ("0.00100, 0.00758, 0.03066, 0.07475, 0.14340, 0.23980, 0.36660, 0.52640, 0.72140, 0.95390");
- }
- type ("io_in") {
- base_type : array;
- data_type : bit;
- bit_width : 38;
- bit_from : 37;
- bit_to : 0;
- }
- type ("io_oeb") {
- base_type : array;
- data_type : bit;
- bit_width : 38;
- bit_from : 37;
- bit_to : 0;
- }
- type ("io_out") {
- base_type : array;
- data_type : bit;
- bit_width : 38;
- bit_from : 37;
- bit_to : 0;
- }
- type ("irq") {
- base_type : array;
- data_type : bit;
- bit_width : 3;
- bit_from : 2;
- bit_to : 0;
- }
- type ("la_data_in") {
- base_type : array;
- data_type : bit;
- bit_width : 64;
- bit_from : 63;
- bit_to : 0;
- }
- type ("la_data_out") {
- base_type : array;
- data_type : bit;
- bit_width : 64;
- bit_from : 63;
- bit_to : 0;
- }
- type ("la_oenb") {
- base_type : array;
- data_type : bit;
- bit_width : 64;
- bit_from : 63;
- bit_to : 0;
- }
- type ("wbs_adr_i") {
- base_type : array;
- data_type : bit;
- bit_width : 32;
- bit_from : 31;
- bit_to : 0;
- }
- type ("wbs_dat_i") {
- base_type : array;
- data_type : bit;
- bit_width : 32;
- bit_from : 31;
- bit_to : 0;
- }
- type ("wbs_dat_o") {
- base_type : array;
- data_type : bit;
- bit_width : 32;
- bit_from : 31;
- bit_to : 0;
- }
- type ("wbs_sel_i") {
- base_type : array;
- data_type : bit;
- bit_width : 4;
- bit_from : 3;
- bit_to : 0;
- }
-
- cell ("user_proj_example") {
- pin("wb_clk_i") {
- direction : input;
- capacitance : 0.0788;
- }
- pin("wb_rst_i") {
- direction : input;
- capacitance : 0.0070;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-5.29880");
- }
- fall_constraint(scalar) {
- values("-5.69453");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("16.99257");
- }
- fall_constraint(scalar) {
- values("18.13219");
- }
- }
- }
- pin("wbs_ack_o") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_203) {
- values("3.10323,3.13201,3.20328,3.31012,3.46625,3.68621,3.97818,4.34718,4.79994,5.34006");
- }
- rise_transition(template_203) {
- values("0.11565,0.14286,0.21996,0.37166,0.63915,1.03060,1.55400,2.21212,3.02212,3.97936");
- }
- cell_fall(template_204) {
- values("2.67924,2.70599,2.77792,2.89338,3.06244,3.30048,3.61368,4.00968,4.49468,5.07200");
- }
- fall_transition(template_204) {
- values("0.09310,0.12134,0.20662,0.36696,0.63685,1.03289,1.55900,2.22479,3.03432,4.00295");
- }
- }
- }
- pin("wbs_cyc_i") {
- direction : input;
- capacitance : 0.0079;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.12398");
- }
- fall_constraint(scalar) {
- values("-2.05546");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("10.41162");
- }
- fall_constraint(scalar) {
- values("10.38251");
- }
- }
- }
- pin("wbs_stb_i") {
- direction : input;
- capacitance : 0.0066;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.10597");
- }
- fall_constraint(scalar) {
- values("-2.01972");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("10.39171");
- }
- fall_constraint(scalar) {
- values("10.34300");
- }
- }
- }
- pin("wbs_we_i") {
- direction : input;
- capacitance : 0.0059;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.33960");
- }
- fall_constraint(scalar) {
- values("-2.29365");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("5.36217");
- }
- fall_constraint(scalar) {
- values("5.40165");
- }
- }
- }
- pin("vdd") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("vss") {
- direction : input;
- capacitance : 0.0000;
- }
- bus("io_in") {
- bus_type : io_in;
- direction : input;
- capacitance : 0.0000;
- pin("io_in[37]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[36]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[35]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[34]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[33]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[32]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[31]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[30]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[29]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[28]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[27]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[26]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[25]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[24]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[23]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[22]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[21]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[20]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[19]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[18]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[17]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[16]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[15]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[14]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[13]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[12]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[11]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[10]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[9]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[8]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[7]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[6]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[5]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[4]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[3]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[2]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[1]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("io_in[0]") {
- direction : input;
- capacitance : 0.0000;
- }
- }
- bus("io_oeb") {
- bus_type : io_oeb;
- direction : output;
- capacitance : 0.0000;
- pin("io_oeb[37]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[36]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_59) {
- values("10.06420,10.08671,10.14847,10.25280,10.41164,10.63512,10.93049,11.30249,11.75659,12.29859");
- }
- rise_transition(template_59) {
- values("0.07292,0.09818,0.18153,0.35126,0.63069,1.02900,1.55310,2.21571,3.02371,3.98690");
- }
- cell_fall(template_60) {
- values("11.02871,11.05319,11.12256,11.23722,11.40858,11.64807,11.96297,12.36092,12.84692,13.42592");
- }
- fall_transition(template_60) {
- values("0.06803,0.09612,0.18538,0.35464,0.63271,1.03200,1.55900,2.22505,3.03989,4.01000");
- }
- }
- }
- pin("io_oeb[35]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_57) {
- values("11.99518,12.01768,12.07946,12.18381,12.34268,12.56616,12.86157,13.23357,13.68764,14.22964");
- }
- rise_transition(template_57) {
- values("0.07281,0.09812,0.18148,0.35124,0.63069,1.02900,1.55306,2.21581,3.02381,3.98694");
- }
- cell_fall(template_58) {
- values("13.10509,13.12958,13.19897,13.31365,13.48504,13.72453,14.03943,14.43741,14.92341,15.50241");
- }
- fall_transition(template_58) {
- values("0.06792,0.09604,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03996,4.01000");
- }
- }
- }
- pin("io_oeb[34]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_55) {
- values("11.99516,12.01767,12.07944,12.18380,12.34266,12.56614,12.86156,13.23356,13.68762,14.22962");
- }
- rise_transition(template_55) {
- values("0.07281,0.09812,0.18148,0.35124,0.63069,1.02900,1.55306,2.21581,3.02381,3.98694");
- }
- cell_fall(template_56) {
- values("13.10508,13.12957,13.19896,13.31364,13.48503,13.72453,14.03943,14.43741,14.92341,15.50241");
- }
- fall_transition(template_56) {
- values("0.06792,0.09604,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03996,4.01000");
- }
- }
- }
- pin("io_oeb[33]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_53) {
- values("11.99788,12.02038,12.08215,12.18650,12.34535,12.56883,12.86423,13.23623,13.69030,14.23230");
- }
- rise_transition(template_53) {
- values("0.07285,0.09815,0.18150,0.35125,0.63069,1.02900,1.55308,2.21577,3.02377,3.98692");
- }
- cell_fall(template_54) {
- values("13.10805,13.13254,13.20192,13.31659,13.48797,13.72746,14.04237,14.44033,14.92633,15.50533");
- }
- fall_transition(template_54) {
- values("0.06796,0.09607,0.18535,0.35462,0.63270,1.03200,1.55900,2.22503,3.03993,4.01000");
- }
- }
- }
- pin("io_oeb[32]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_51) {
- values("12.00084,12.02335,12.08511,12.18944,12.34827,12.57174,12.86710,13.23910,13.69321,14.23521");
- }
- rise_transition(template_51) {
- values("0.07295,0.09820,0.18154,0.35126,0.63069,1.02900,1.55311,2.21568,3.02368,3.98689");
- }
- cell_fall(template_52) {
- values("13.11146,13.13595,13.20531,13.31996,13.49132,13.73080,14.04571,14.44365,14.92965,15.50865");
- }
- fall_transition(template_52) {
- values("0.06805,0.09614,0.18539,0.35464,0.63271,1.03200,1.55900,2.22506,3.03988,4.01000");
- }
- }
- }
- pin("io_oeb[31]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_49) {
- values("10.10115,10.12366,10.18544,10.28981,10.44868,10.67217,10.96761,11.33961,11.79365,12.33565");
- }
- rise_transition(template_49) {
- values("0.07275,0.09809,0.18146,0.35123,0.63070,1.02900,1.55305,2.21586,3.02386,3.98695");
- }
- cell_fall(template_50) {
- values("11.05575,11.08025,11.14965,11.26435,11.43574,11.67524,11.99014,12.38814,12.87414,13.45314");
- }
- fall_transition(template_50) {
- values("0.06787,0.09599,0.18531,0.35460,0.63270,1.03200,1.55900,2.22500,3.03999,4.01000");
- }
- }
- }
- pin("io_oeb[30]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_47) {
- values("12.00306,12.02557,12.08734,12.19170,12.35056,12.57404,12.86946,13.24146,13.69552,14.23752");
- }
- rise_transition(template_47) {
- values("0.07280,0.09812,0.18148,0.35124,0.63069,1.02900,1.55306,2.21581,3.02381,3.98694");
- }
- cell_fall(template_48) {
- values("13.12256,13.14705,13.21644,13.33113,13.50251,13.74201,14.05691,14.45489,14.94089,15.51989");
- }
- fall_transition(template_48) {
- values("0.06792,0.09603,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03996,4.01000");
- }
- }
- }
- pin("io_oeb[29]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_43) {
- values("12.00267,12.02517,12.08695,12.19131,12.35017,12.57365,12.86908,13.24108,13.69514,14.23714");
- }
- rise_transition(template_43) {
- values("0.07279,0.09811,0.18148,0.35124,0.63069,1.02900,1.55306,2.21582,3.02382,3.98694");
- }
- cell_fall(template_44) {
- values("13.12213,13.14663,13.21602,13.33071,13.50210,13.74159,14.05649,14.45448,14.94048,15.51948");
- }
- fall_transition(template_44) {
- values("0.06791,0.09603,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[28]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_41) {
- values("12.00302,12.02552,12.08730,12.19166,12.35053,12.57401,12.86944,13.24144,13.69549,14.23750");
- }
- rise_transition(template_41) {
- values("0.07278,0.09811,0.18147,0.35123,0.63069,1.02900,1.55306,2.21583,3.02383,3.98694");
- }
- cell_fall(template_42) {
- values("13.12253,13.14702,13.21641,13.33110,13.50250,13.74199,14.05689,14.45488,14.94088,15.51988");
- }
- fall_transition(template_42) {
- values("0.06790,0.09602,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[27]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_39) {
- values("12.00835,12.03086,12.09262,12.19695,12.35579,12.57926,12.87463,13.24662,13.70073,14.24273");
- }
- rise_transition(template_39) {
- values("0.07293,0.09819,0.18153,0.35126,0.63069,1.02900,1.55310,2.21569,3.02369,3.98690");
- }
- cell_fall(template_40) {
- values("13.12850,13.15299,13.22235,13.33700,13.50837,13.74785,14.06276,14.46070,14.94670,15.52570");
- }
- fall_transition(template_40) {
- values("0.06804,0.09613,0.18539,0.35464,0.63271,1.03200,1.55900,2.22506,3.03989,4.01000");
- }
- }
- }
- pin("io_oeb[26]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_37) {
- values("10.81101,10.83352,10.89530,10.99966,11.15854,11.38202,11.67746,12.04946,12.50351,13.04551");
- }
- rise_transition(template_37) {
- values("0.07276,0.09809,0.18146,0.35123,0.63070,1.02900,1.55305,2.21585,3.02385,3.98695");
- }
- cell_fall(template_38) {
- values("11.77135,11.79585,11.86525,11.97994,12.15134,12.39084,12.70574,13.10373,13.58973,14.16873");
- }
- fall_transition(template_38) {
- values("0.06788,0.09600,0.18531,0.35461,0.63270,1.03200,1.55900,2.22501,3.03999,4.01000");
- }
- }
- }
- pin("io_oeb[25]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_35) {
- values("10.81248,10.83498,10.89676,11.00112,11.15999,11.38347,11.67890,12.05090,12.50495,13.04696");
- }
- rise_transition(template_35) {
- values("0.07279,0.09811,0.18147,0.35123,0.63069,1.02900,1.55306,2.21583,3.02383,3.98694");
- }
- cell_fall(template_36) {
- values("11.77291,11.79741,11.86680,11.98148,12.15288,12.39237,12.70727,13.10526,13.59126,14.17026");
- }
- fall_transition(template_36) {
- values("0.06791,0.09602,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[24]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_33) {
- values("10.81268,10.83518,10.89696,11.00132,11.16018,11.38367,11.67909,12.05109,12.50515,13.04715");
- }
- rise_transition(template_33) {
- values("0.07279,0.09811,0.18148,0.35123,0.63069,1.02900,1.55306,2.21583,3.02383,3.98694");
- }
- cell_fall(template_34) {
- values("11.77314,11.79763,11.86702,11.98171,12.15310,12.39260,12.70750,13.10548,13.59148,14.17048");
- }
- fall_transition(template_34) {
- values("0.06791,0.09602,0.18532,0.35461,0.63270,1.03200,1.55900,2.22502,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[23]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_31) {
- values("10.81439,10.83690,10.89867,11.00303,11.16189,11.38537,11.68078,12.05278,12.50685,13.04885");
- }
- rise_transition(template_31) {
- values("0.07281,0.09812,0.18148,0.35124,0.63069,1.02900,1.55306,2.21581,3.02381,3.98694");
- }
- cell_fall(template_32) {
- values("11.77501,11.79950,11.86889,11.98357,12.15496,12.39445,12.70935,13.10733,13.59333,14.17233");
- }
- fall_transition(template_32) {
- values("0.06793,0.09604,0.18533,0.35462,0.63270,1.03200,1.55900,2.22502,3.03996,4.01000");
- }
- }
- }
- pin("io_oeb[22]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_29) {
- values("10.87845,10.90096,10.96272,11.06705,11.22589,11.44936,11.74473,12.11673,12.57083,13.11283");
- }
- rise_transition(template_29) {
- values("0.07292,0.09819,0.18153,0.35126,0.63069,1.02900,1.55310,2.21570,3.02370,3.98690");
- }
- cell_fall(template_30) {
- values("11.82889,11.85338,11.92274,12.03740,12.20876,12.44825,12.76315,13.16110,13.64710,14.22610");
- }
- fall_transition(template_30) {
- values("0.06803,0.09612,0.18538,0.35464,0.63271,1.03200,1.55900,2.22505,3.03989,4.01000");
- }
- }
- }
- pin("io_oeb[21]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_27) {
- values("10.86986,10.89236,10.95414,11.05850,11.21737,11.44085,11.73627,12.10827,12.56233,13.10433");
- }
- rise_transition(template_27) {
- values("0.07279,0.09811,0.18148,0.35124,0.63069,1.02900,1.55306,2.21582,3.02382,3.98694");
- }
- cell_fall(template_28) {
- values("11.81951,11.84401,11.91340,12.02809,12.19948,12.43897,12.75388,13.15186,13.63786,14.21686");
- }
- fall_transition(template_28) {
- values("0.06791,0.09602,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[20]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_25) {
- values("10.87142,10.89392,10.95570,11.06005,11.21891,11.44239,11.73781,12.10981,12.56387,13.10587");
- }
- rise_transition(template_25) {
- values("0.07281,0.09812,0.18148,0.35124,0.63069,1.02900,1.55306,2.21581,3.02381,3.98694");
- }
- cell_fall(template_26) {
- values("11.82122,11.84572,11.91510,12.02979,12.20118,12.44067,12.75557,13.15355,13.63955,14.21855");
- }
- fall_transition(template_26) {
- values("0.06793,0.09604,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03996,4.01000");
- }
- }
- }
- pin("io_oeb[19]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_21) {
- values("10.89696,10.91948,10.98122,11.08550,11.24430,11.46775,11.76304,12.13504,12.58920,13.13120");
- }
- rise_transition(template_21) {
- values("0.07314,0.09831,0.18161,0.35130,0.63068,1.02900,1.55316,2.21551,3.02351,3.98684");
- }
- cell_fall(template_22) {
- values("11.84904,11.87351,11.94283,12.05744,12.22877,12.46823,12.78315,13.18103,13.66703,14.24603");
- }
- fall_transition(template_22) {
- values("0.06822,0.09629,0.18547,0.35468,0.63271,1.03200,1.55900,2.22512,3.03977,4.01000");
- }
- }
- }
- pin("io_oeb[18]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_19) {
- values("9.48064,9.50315,9.56491,9.66925,9.82810,10.05158,10.34697,10.71897,11.17305,11.71505");
- }
- rise_transition(template_19) {
- values("0.07287,0.09816,0.18151,0.35125,0.63069,1.02900,1.55308,2.21575,3.02375,3.98692");
- }
- cell_fall(template_20) {
- values("10.44193,10.46642,10.53580,10.65047,10.82184,11.06133,11.37623,11.77419,12.26019,12.83919");
- }
- fall_transition(template_20) {
- values("0.06798,0.09609,0.18536,0.35463,0.63270,1.03200,1.55900,2.22504,3.03992,4.01000");
- }
- }
- }
- pin("io_oeb[17]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_17) {
- values("11.41712,11.43962,11.50140,11.60576,11.76462,11.98810,12.28353,12.65553,13.10959,13.65159");
- }
- rise_transition(template_17) {
- values("0.07279,0.09811,0.18148,0.35124,0.63069,1.02900,1.55306,2.21582,3.02382,3.98694");
- }
- cell_fall(template_18) {
- values("12.53012,12.55462,12.62401,12.73869,12.91008,13.14958,13.46448,13.86247,14.34847,14.92747");
- }
- fall_transition(template_18) {
- values("0.06791,0.09602,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[16]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_15) {
- values("11.41359,11.43610,11.49788,11.60224,11.76110,11.98459,12.28001,12.65201,13.10607,13.64807");
- }
- rise_transition(template_15) {
- values("0.07279,0.09811,0.18147,0.35123,0.63069,1.02900,1.55306,2.21583,3.02383,3.98694");
- }
- cell_fall(template_16) {
- values("12.52631,12.55081,12.62020,12.73488,12.90628,13.14577,13.46067,13.85866,14.34466,14.92366");
- }
- fall_transition(template_16) {
- values("0.06790,0.09602,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[15]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_13) {
- values("11.41305,11.43556,11.49733,11.60170,11.76056,11.98404,12.27947,12.65147,13.10553,13.64753");
- }
- rise_transition(template_13) {
- values("0.07278,0.09811,0.18147,0.35123,0.63069,1.02900,1.55306,2.21583,3.02383,3.98694");
- }
- cell_fall(template_14) {
- values("12.52577,12.55027,12.61966,12.73435,12.90574,13.14524,13.46014,13.85812,14.34412,14.92312");
- }
- fall_transition(template_14) {
- values("0.06790,0.09601,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[14]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_11) {
- values("11.44051,11.46303,11.52477,11.62905,11.78785,12.01131,12.30659,12.67860,13.13276,13.67476");
- }
- rise_transition(template_11) {
- values("0.07313,0.09831,0.18161,0.35130,0.63068,1.02900,1.55316,2.21551,3.02351,3.98684");
- }
- cell_fall(template_12) {
- values("12.55562,12.58009,12.64941,12.76402,12.93535,13.17482,13.48973,13.88762,14.37362,14.95262");
- }
- fall_transition(template_12) {
- values("0.06821,0.09628,0.18547,0.35468,0.63271,1.03200,1.55900,2.22511,3.03977,4.01000");
- }
- }
- }
- pin("io_oeb[13]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_9) {
- values("10.24514,10.26765,10.32941,10.43375,10.59260,10.81607,11.11145,11.48345,11.93754,12.47954");
- }
- rise_transition(template_9) {
- values("0.07289,0.09817,0.18152,0.35125,0.63069,1.02900,1.55309,2.21573,3.02373,3.98691");
- }
- cell_fall(template_10) {
- values("11.21085,11.23534,11.30471,11.41937,11.59074,11.83023,12.14514,12.54309,13.02909,13.60809");
- }
- fall_transition(template_10) {
- values("0.06800,0.09610,0.18537,0.35463,0.63270,1.03200,1.55900,2.22505,3.03991,4.01000");
- }
- }
- }
- pin("io_oeb[12]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_7) {
- values("10.23751,10.26002,10.32180,10.42616,10.58503,10.80852,11.10395,11.47595,11.93000,12.47200");
- }
- rise_transition(template_7) {
- values("0.07277,0.09810,0.18147,0.35123,0.63069,1.02900,1.55305,2.21585,3.02385,3.98695");
- }
- cell_fall(template_8) {
- values("11.20255,11.22705,11.29644,11.41113,11.58253,11.82202,12.13692,12.53492,13.02092,13.59992");
- }
- fall_transition(template_8) {
- values("0.06789,0.09601,0.18531,0.35461,0.63270,1.03200,1.55900,2.22501,3.03998,4.01000");
- }
- }
- }
- pin("io_oeb[11]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_5) {
- values("10.23563,10.25814,10.31991,10.42428,10.58315,10.80663,11.10206,11.47406,11.92812,12.47012");
- }
- rise_transition(template_5) {
- values("0.07277,0.09810,0.18147,0.35123,0.63069,1.02900,1.55305,2.21584,3.02384,3.98695");
- }
- cell_fall(template_6) {
- values("11.20052,11.22501,11.29441,11.40910,11.58049,11.81999,12.13489,12.53288,13.01888,13.59788");
- }
- fall_transition(template_6) {
- values("0.06789,0.09601,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03998,4.01000");
- }
- }
- }
- pin("io_oeb[10]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_3) {
- values("10.23816,10.26067,10.32245,10.42681,10.58568,10.80916,11.10460,11.47659,11.93065,12.47265");
- }
- rise_transition(template_3) {
- values("0.07277,0.09810,0.18147,0.35123,0.63069,1.02900,1.55305,2.21584,3.02384,3.98695");
- }
- cell_fall(template_4) {
- values("11.20327,11.22776,11.29716,11.41185,11.58324,11.82274,12.13764,12.53563,13.02163,13.60063");
- }
- fall_transition(template_4) {
- values("0.06789,0.09601,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03998,4.01000");
- }
- }
- }
- pin("io_oeb[9]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_73) {
- values("9.49193,9.51443,9.57621,9.68058,9.83946,10.06294,10.35839,10.73039,11.18443,11.72643");
- }
- rise_transition(template_73) {
- values("0.07274,0.09808,0.18146,0.35123,0.63070,1.02900,1.55304,2.21587,3.02387,3.98696");
- }
- cell_fall(template_74) {
- values("10.45496,10.47946,10.54886,10.66355,10.83495,11.07445,11.38935,11.78735,12.27335,12.85235");
- }
- fall_transition(template_74) {
- values("0.06787,0.09598,0.18530,0.35460,0.63270,1.03200,1.55900,2.22500,3.04000,4.01000");
- }
- }
- }
- pin("io_oeb[8]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_71) {
- values("11.45538,11.47789,11.53966,11.64400,11.80285,12.02632,12.32171,12.69371,13.14780,13.68980");
- }
- rise_transition(template_71) {
- values("0.07287,0.09816,0.18151,0.35125,0.63069,1.02900,1.55308,2.21575,3.02375,3.98692");
- }
- cell_fall(template_72) {
- values("12.57017,12.59466,12.66403,12.77870,12.95008,13.18956,13.50447,13.90243,14.38843,14.96743");
- }
- fall_transition(template_72) {
- values("0.06798,0.09608,0.18536,0.35463,0.63270,1.03200,1.55900,2.22504,3.03992,4.01000");
- }
- }
- }
- pin("io_oeb[7]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_69) {
- values("11.45050,11.47301,11.53478,11.63914,11.79800,12.02148,12.31690,12.68890,13.14296,13.68497");
- }
- rise_transition(template_69) {
- values("0.07280,0.09812,0.18148,0.35124,0.63069,1.02900,1.55306,2.21581,3.02381,3.98694");
- }
- cell_fall(template_70) {
- values("12.56486,12.58936,12.65874,12.77343,12.94482,13.18431,13.49921,13.89719,14.38320,14.96220");
- }
- fall_transition(template_70) {
- values("0.06792,0.09603,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03996,4.01000");
- }
- }
- }
- pin("io_oeb[6]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_67) {
- values("11.44732,11.46983,11.53160,11.63596,11.79482,12.01830,12.31373,12.68573,13.13979,13.68179");
- }
- rise_transition(template_67) {
- values("0.07280,0.09811,0.18148,0.35124,0.63069,1.02900,1.55306,2.21582,3.02382,3.98694");
- }
- cell_fall(template_68) {
- values("12.56143,12.58592,12.65531,12.77000,12.94139,13.18088,13.49578,13.89377,14.37977,14.95877");
- }
- fall_transition(template_68) {
- values("0.06791,0.09603,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[5]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_65) {
- values("11.44957,11.47207,11.53385,11.63821,11.79707,12.02055,12.31597,12.68797,13.14203,13.68403");
- }
- rise_transition(template_65) {
- values("0.07280,0.09812,0.18148,0.35124,0.63069,1.02900,1.55306,2.21582,3.02382,3.98694");
- }
- cell_fall(template_66) {
- values("12.56387,12.58836,12.65775,12.77244,12.94383,13.18332,13.49822,13.89621,14.38221,14.96121");
- }
- fall_transition(template_66) {
- values("0.06792,0.09603,0.18533,0.35461,0.63270,1.03200,1.55900,2.22502,3.03996,4.01000");
- }
- }
- }
- pin("io_oeb[4]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_63) {
- values("9.39672,9.41923,9.48101,9.58539,9.74427,9.96776,10.26321,10.63521,11.08925,11.63125");
- }
- rise_transition(template_63) {
- values("0.07271,0.09806,0.18144,0.35122,0.63070,1.02900,1.55303,2.21590,3.02390,3.98697");
- }
- cell_fall(template_64) {
- values("10.37026,10.39476,10.46416,10.57886,10.75026,10.98976,11.30466,11.70266,12.18865,12.76766");
- }
- fall_transition(template_64) {
- values("0.06786,0.09598,0.18530,0.35460,0.63270,1.03201,1.55901,2.22500,3.03999,4.01000");
- }
- }
- }
- pin("io_oeb[3]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_61) {
- values("11.29733,11.31984,11.38160,11.48594,11.64479,11.86826,12.16365,12.53565,12.98974,13.53174");
- }
- rise_transition(template_61) {
- values("0.07288,0.09816,0.18151,0.35125,0.63069,1.02900,1.55309,2.21574,3.02374,3.98691");
- }
- cell_fall(template_62) {
- values("12.41324,12.43773,12.50710,12.62177,12.79314,13.03263,13.34753,13.74549,14.23149,14.81049");
- }
- fall_transition(template_62) {
- values("0.06800,0.09610,0.18537,0.35463,0.63270,1.03200,1.55900,2.22504,3.03991,4.01000");
- }
- }
- }
- pin("io_oeb[2]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_45) {
- values("11.31512,11.33764,11.39936,11.50361,11.66239,11.88583,12.18106,12.55306,13.00727,13.54927");
- }
- rise_transition(template_45) {
- values("0.07327,0.09839,0.18167,0.35132,0.63068,1.02900,1.55320,2.21539,3.02339,3.98680");
- }
- cell_fall(template_46) {
- values("12.43283,12.45730,12.52659,12.64117,12.81247,13.05193,13.36684,13.76469,14.25069,14.82969");
- }
- fall_transition(template_46) {
- values("0.06834,0.09640,0.18553,0.35471,0.63272,1.03200,1.55900,2.22515,3.03969,4.01000");
- }
- }
- }
- pin("io_oeb[1]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_23) {
- values("11.28744,11.30994,11.37172,11.47608,11.63495,11.85843,12.15386,12.52586,12.97992,13.52192");
- }
- rise_transition(template_23) {
- values("0.07278,0.09810,0.18147,0.35123,0.63069,1.02900,1.55305,2.21584,3.02384,3.98695");
- }
- cell_fall(template_24) {
- values("12.40254,12.42704,12.49643,12.61112,12.78251,13.02201,13.33691,13.73490,14.22090,14.79990");
- }
- fall_transition(template_24) {
- values("0.06790,0.09601,0.18532,0.35461,0.63270,1.03200,1.55900,2.22501,3.03997,4.01000");
- }
- }
- }
- pin("io_oeb[0]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_rst_i";
- timing_sense : positive_unate;
- timing_type : combinational;
- cell_rise(template_1) {
- values("11.28979,11.31229,11.37407,11.47842,11.63728,11.86075,12.15616,12.52816,12.98223,13.52423");
- }
- rise_transition(template_1) {
- values("0.07283,0.09813,0.18149,0.35124,0.63069,1.02900,1.55307,2.21579,3.02379,3.98693");
- }
- cell_fall(template_2) {
- values("12.40510,12.42960,12.49898,12.61366,12.78504,13.02453,13.33944,13.73741,14.22341,14.80241");
- }
- fall_transition(template_2) {
- values("0.06794,0.09605,0.18534,0.35462,0.63270,1.03200,1.55900,2.22503,3.03995,4.01000");
- }
- }
- }
- }
- bus("io_out") {
- bus_type : io_out;
- direction : output;
- capacitance : 0.0000;
- pin("io_out[37]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[36]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[35]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[34]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[33]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[32]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[31]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_123) {
- values("3.22900,3.25820,3.33050,3.43785,3.59418,3.81423,4.10600,4.47500,4.92739,5.46770");
- }
- rise_transition(template_123) {
- values("0.11847,0.14602,0.22326,0.37419,0.64091,1.03152,1.55400,2.21230,3.02230,3.97991");
- }
- cell_fall(template_124) {
- values("2.78051,2.80751,2.87994,2.99570,3.16476,3.40269,3.71563,4.11163,4.59657,5.17357");
- }
- fall_transition(template_124) {
- values("0.09540,0.12382,0.20896,0.36875,0.63767,1.03318,1.55906,2.22494,3.03406,4.00218");
- }
- }
- }
- pin("io_out[30]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_121) {
- values("2.97606,3.00380,3.07330,3.17904,3.33513,3.55545,3.84778,4.21734,4.67006,5.21090");
- }
- rise_transition(template_121) {
- values("0.10965,0.13611,0.21330,0.36719,0.63682,1.03000,1.55428,2.21284,3.02144,3.98097");
- }
- cell_fall(template_122) {
- values("2.59844,2.62468,2.69576,2.81074,2.98001,3.21818,3.53203,3.92803,4.41303,4.99136");
- }
- fall_transition(template_122) {
- values("0.08857,0.11662,0.20217,0.36424,0.63573,1.03256,1.55900,2.22411,3.03533,4.00600");
- }
- }
- }
- pin("io_out[29]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_117) {
- values("4.63507,4.66281,4.73230,4.83803,4.99411,5.21444,5.50677,5.87634,6.32905,6.86991");
- }
- rise_transition(template_117) {
- values("0.10960,0.13605,0.21325,0.36715,0.63680,1.03000,1.55428,2.21285,3.02143,3.98099");
- }
- cell_fall(template_118) {
- values("4.46687,4.49334,4.56484,4.68005,4.84921,5.08733,5.40086,5.79686,6.28186,6.85971");
- }
- fall_transition(template_118) {
- values("0.09075,0.11889,0.20431,0.36555,0.63627,1.03272,1.55900,2.22444,3.03484,4.00453");
- }
- }
- }
- pin("io_out[28]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_115) {
- values("4.61897,4.64661,4.71597,4.82161,4.97771,5.19808,5.49044,5.86007,6.31276,6.85371");
- }
- rise_transition(template_115) {
- values("0.10911,0.13549,0.21272,0.36682,0.63667,1.03000,1.55432,2.21295,3.02136,3.98122");
- }
- cell_fall(template_116) {
- values("4.45454,4.48098,4.55242,4.66759,4.83677,5.07490,5.38848,5.78448,6.26948,6.84739");
- }
- fall_transition(template_116) {
- values("0.09042,0.11855,0.20399,0.36535,0.63619,1.03269,1.55900,2.22439,3.03492,4.00475");
- }
- }
- }
- pin("io_out[27]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_113) {
- values("3.25542,3.28473,3.35730,3.46479,3.62118,3.84125,4.13297,4.50197,4.95426,5.49461");
- }
- rise_transition(template_113) {
- values("0.11922,0.14685,0.22414,0.37486,0.64138,1.03176,1.55400,2.21235,3.02235,3.98006");
- }
- cell_fall(template_114) {
- values("2.80056,2.82763,2.90019,3.01606,3.18514,3.42304,3.73594,4.13194,4.61685,5.19385");
- }
- fall_transition(template_114) {
- values("0.09596,0.12446,0.20956,0.36934,0.63796,1.03329,1.55910,2.22490,3.03410,4.00229");
- }
- }
- }
- pin("io_out[26]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_111) {
- values("2.90127,2.92842,2.99708,3.10223,3.25838,3.47903,3.77153,4.14153,4.59403,5.13552");
- }
- rise_transition(template_111) {
- values("0.10644,0.13248,0.20983,0.36502,0.63591,1.03000,1.55450,2.21349,3.02100,3.98249");
- }
- cell_fall(template_112) {
- values("2.54843,2.57440,2.64506,2.75980,2.92917,3.16742,3.48159,3.87759,4.36259,4.94143");
- }
- fall_transition(template_112) {
- values("0.08628,0.11424,0.19993,0.36287,0.63517,1.03238,1.55900,2.22377,3.03585,4.00754");
- }
- }
- }
- pin("io_out[25]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_109) {
- values("3.20983,3.23894,3.31102,3.41826,3.57455,3.79458,4.08639,4.45539,4.90786,5.44813");
- }
- rise_transition(template_109) {
- values("0.11787,0.14534,0.22255,0.37364,0.64053,1.03132,1.55400,2.21226,3.02226,3.97979");
- }
- cell_fall(template_110) {
- values("2.76712,2.79407,2.86638,2.98206,3.15109,3.38906,3.70203,4.09803,4.58300,5.16000");
- }
- fall_transition(template_110) {
- values("0.09494,0.12330,0.20847,0.36827,0.63743,1.03309,1.55903,2.22497,3.03403,4.00209");
- }
- }
- }
- pin("io_out[24]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_107) {
- values("4.48362,4.51037,4.57845,4.68320,4.83940,5.06027,5.35288,5.72318,6.17553,6.71747");
- }
- rise_transition(template_107) {
- values("0.10426,0.13000,0.20745,0.36353,0.63528,1.03000,1.55465,2.21394,3.02071,3.98353");
- }
- cell_fall(template_108) {
- values("4.35451,4.38059,4.45143,4.56627,4.73559,4.97381,5.28785,5.68385,6.16885,6.74748");
- }
- fall_transition(template_108) {
- values("0.08723,0.11522,0.20086,0.36344,0.63540,1.03246,1.55900,2.22391,3.03563,4.00690");
- }
- }
- }
- pin("io_out[23]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_105) {
- values("4.51799,4.54504,4.61355,4.71860,4.87476,5.09547,5.38800,5.75807,6.21053,6.75214");
- }
- rise_transition(template_105) {
- values("0.10588,0.13184,0.20922,0.36464,0.63575,1.03000,1.55454,2.21361,3.02093,3.98275");
- }
- cell_fall(template_106) {
- values("4.37819,4.40439,4.47542,4.59037,4.75965,4.99784,5.31172,5.70772,6.19272,6.77112");
- }
- fall_transition(template_106) {
- values("0.08829,0.11633,0.20190,0.36408,0.63566,1.03253,1.55900,2.22407,3.03540,4.00619");
- }
- }
- }
- pin("io_out[22]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_103) {
- values("3.05711,3.08541,3.15574,3.26205,3.41807,3.63808,3.93023,4.29937,4.75230,5.29251");
- }
- rise_transition(template_103) {
- values("0.11276,0.13962,0.21667,0.36929,0.63770,1.03000,1.55407,2.21221,3.02186,3.97949");
- }
- cell_fall(template_104) {
- values("2.65632,2.68280,2.75430,2.86951,3.03867,3.27679,3.59032,3.98632,4.47132,5.04916");
- }
- fall_transition(template_104) {
- values("0.09076,0.11890,0.20433,0.36556,0.63628,1.03272,1.55900,2.22444,3.03484,4.00452");
- }
- }
- }
- pin("io_out[21]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_101) {
- values("2.81306,2.83966,2.90752,3.01212,3.16833,3.38929,3.68195,4.05236,4.50465,5.04676");
- }
- rise_transition(template_101) {
- values("0.10342,0.12905,0.20655,0.36297,0.63505,1.03000,1.55470,2.21411,3.02059,3.98392");
- }
- cell_fall(template_102) {
- values("2.48328,2.50902,2.57927,2.69379,2.86325,3.10156,3.41604,3.81204,4.29704,4.87637");
- }
- fall_transition(template_102) {
- values("0.08414,0.11200,0.19782,0.36159,0.63464,1.03222,1.55900,2.22345,3.03633,4.00899");
- }
- }
- }
- pin("io_out[20]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_99) {
- values("4.50182,4.52850,4.59647,4.70115,4.85735,5.07826,5.37090,5.74125,6.19357,6.73560");
- }
- rise_transition(template_99) {
- values("0.10384,0.12954,0.20701,0.36326,0.63517,1.03000,1.55467,2.21402,3.02065,3.98372");
- }
- cell_fall(template_100) {
- values("4.37374,4.39980,4.47058,4.58539,4.75473,4.99296,5.30703,5.70303,6.18803,6.76673");
- }
- fall_transition(template_100) {
- values("0.08696,0.11495,0.20060,0.36328,0.63534,1.03244,1.55900,2.22387,3.03569,4.00708");
- }
- }
- }
- pin("io_out[19]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_95) {
- values("4.46152,4.48817,4.55609,4.66073,4.81694,5.03787,5.33052,5.70089,6.15321,6.69527");
- }
- rise_transition(template_95) {
- values("0.10365,0.12932,0.20680,0.36312,0.63511,1.03000,1.55469,2.21406,3.02062,3.98381");
- }
- cell_fall(template_96) {
- values("4.33748,4.36352,4.43428,4.54908,4.71842,4.95665,5.27074,5.66675,6.15174,6.73047");
- }
- fall_transition(template_96) {
- values("0.08683,0.11481,0.20047,0.36320,0.63530,1.03242,1.55900,2.22385,3.03572,4.00717");
- }
- }
- }
- pin("io_out[18]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_93) {
- values("2.73619,2.76177,2.82795,2.93164,3.08810,3.30968,3.60285,3.97385,4.42617,4.96885");
- }
- rise_transition(template_93) {
- values("0.09706,0.12215,0.19998,0.35923,0.63339,1.02969,1.55469,2.21484,3.02016,3.98584");
- }
- cell_fall(template_94) {
- values("2.45431,2.47959,2.54919,2.66335,2.83308,3.07157,3.38648,3.78259,4.26770,4.84759");
- }
- fall_transition(template_94) {
- values("0.08005,0.10778,0.19401,0.35931,0.63378,1.03200,1.55900,2.22333,3.03711,4.01089");
- }
- }
- }
- pin("io_out[17]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_91) {
- values("2.85368,2.88059,2.94890,3.05381,3.20999,3.43077,3.72334,4.09352,4.54593,5.08769");
- }
- rise_transition(template_91) {
- values("0.10512,0.13098,0.20840,0.36412,0.63553,1.03000,1.55459,2.21376,3.02082,3.98311");
- }
- cell_fall(template_92) {
- values("2.51076,2.53664,2.60712,2.72176,2.89117,3.12945,3.44375,3.83975,4.32475,4.90381");
- }
- fall_transition(template_92) {
- values("0.08535,0.11327,0.19901,0.36231,0.63494,1.03231,1.55900,2.22363,3.03606,4.00817");
- }
- }
- }
- pin("io_out[16]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_89) {
- values("4.54760,4.57467,4.64321,4.74827,4.90443,5.12513,5.41765,5.78771,6.24018,6.78177");
- }
- rise_transition(template_89) {
- values("0.10598,0.13195,0.20932,0.36470,0.63578,1.03000,1.55453,2.21359,3.02094,3.98271");
- }
- cell_fall(template_90) {
- values("4.40416,4.43037,4.50142,4.61638,4.78565,5.02384,5.33771,5.73371,6.21871,6.79709");
- }
- fall_transition(template_90) {
- values("0.08837,0.11641,0.20198,0.36412,0.63568,1.03254,1.55900,2.22408,3.03538,4.00614");
- }
- }
- }
- pin("io_out[15]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_87) {
- values("3.21564,3.24483,3.31713,3.42447,3.58080,3.80085,4.09262,4.46162,4.91402,5.45432");
- }
- rise_transition(template_87) {
- values("0.11845,0.14599,0.22324,0.37417,0.64090,1.03151,1.55400,2.21230,3.02230,3.97991");
- }
- cell_fall(template_88) {
- values("2.76690,2.79390,2.86632,2.98209,3.15114,3.38908,3.70202,4.09802,4.58296,5.15996");
- }
- fall_transition(template_88) {
- values("0.09539,0.12381,0.20895,0.36874,0.63766,1.03317,1.55906,2.22494,3.03406,4.00217");
- }
- }
- }
- pin("io_out[14]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_85) {
- values("3.15084,3.17981,3.25155,3.35861,3.51484,3.73484,4.02672,4.39572,4.84831,5.38851");
- }
- rise_transition(template_85) {
- values("0.11693,0.14430,0.22146,0.37281,0.63995,1.03102,1.55400,2.21220,3.02220,3.97961");
- }
- cell_fall(template_86) {
- values("2.71609,2.74295,2.81510,2.93067,3.09968,3.33769,3.65073,4.04673,4.53173,5.10880");
- }
- fall_transition(template_86) {
- values("0.09421,0.12250,0.20772,0.36763,0.63713,1.03298,1.55900,2.22496,3.03406,4.00219");
- }
- }
- }
- pin("io_out[13]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_83) {
- values("2.99914,3.02704,3.09677,3.20268,3.35874,3.57897,3.87125,4.24070,4.69347,5.23414");
- }
- rise_transition(template_83) {
- values("0.11053,0.13710,0.21425,0.36778,0.63707,1.03000,1.55422,2.21267,3.02156,3.98055");
- }
- cell_fall(template_84) {
- values("2.61496,2.64127,2.71247,2.82751,2.99675,3.23491,3.54867,3.94467,4.42967,5.00786");
- }
- fall_transition(template_84) {
- values("0.08918,0.11726,0.20278,0.36461,0.63588,1.03260,1.55900,2.22420,3.03520,4.00559");
- }
- }
- }
- pin("io_out[12]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_81) {
- values("4.63291,4.66071,4.73030,4.83610,4.99218,5.21247,5.50477,5.87429,6.32703,6.86781");
- }
- rise_transition(template_81) {
- values("0.10997,0.13647,0.21365,0.36740,0.63691,1.03000,1.55426,2.21278,3.02148,3.98082");
- }
- cell_fall(template_82) {
- values("4.46223,4.48874,4.56028,4.67551,4.84467,5.08277,5.39627,5.79227,6.27727,6.85506");
- }
- fall_transition(template_82) {
- values("0.09099,0.11915,0.20456,0.36570,0.63633,1.03274,1.55900,2.22447,3.03479,4.00437");
- }
- }
- }
- pin("io_out[11]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_79) {
- values("4.72249,4.75089,4.82135,4.92775,5.08376,5.30371,5.59584,5.96492,6.41788,6.95799");
- }
- rise_transition(template_79) {
- values("0.11325,0.14018,0.21721,0.36963,0.63784,1.03000,1.55404,2.21211,3.02193,3.97926");
- }
- cell_fall(template_80) {
- values("4.52744,4.55417,4.62610,4.74155,4.91062,5.14866,5.46187,5.85787,6.34287,6.92019");
- }
- fall_transition(template_80) {
- values("0.09305,0.12129,0.20657,0.36693,0.63684,1.03289,1.55900,2.22478,3.03433,4.00298");
- }
- }
- }
- pin("io_out[10]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_77) {
- values("3.41593,3.44609,3.52073,3.62925,3.78605,4.00631,4.29761,4.66661,5.11817,5.65889");
- }
- rise_transition(template_77) {
- values("0.12491,0.15321,0.23078,0.37996,0.64493,1.03361,1.55400,2.21272,3.02272,3.98116");
- }
- cell_fall(template_78) {
- values("2.90798,2.93556,3.00918,3.12583,3.29517,3.53276,3.84538,4.24138,4.72601,5.30301");
- }
- fall_transition(template_78) {
- values("0.10024,0.12932,0.21415,0.37387,0.64020,1.03412,1.55937,2.22463,3.03437,4.00312");
- }
- }
- }
- pin("io_out[9]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_137) {
- values("2.93355,2.96118,3.03052,3.13615,3.29224,3.51263,3.80499,4.17463,4.62731,5.16828");
- }
- rise_transition(template_137) {
- values("0.10904,0.13541,0.21264,0.36677,0.63664,1.03000,1.55432,2.21297,3.02135,3.98126");
- }
- cell_fall(template_138) {
- values("2.56064,2.58682,2.65783,2.77276,2.94205,3.18024,3.49415,3.89015,4.37515,4.95358");
- }
- fall_transition(template_138) {
- values("0.08813,0.11616,0.20174,0.36398,0.63562,1.03252,1.55900,2.22404,3.03543,4.00630");
- }
- }
- }
- pin("io_out[8]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_135) {
- values("4.67977,4.70800,4.77820,4.88443,5.04046,5.26051,5.55269,5.92189,6.37479,6.91510");
- }
- rise_transition(template_135) {
- values("0.11232,0.13912,0.21619,0.36900,0.63758,1.03000,1.55410,2.21230,3.02180,3.97970");
- }
- cell_fall(template_136) {
- values("4.49154,4.51822,4.59005,4.70545,4.87453,5.11259,5.42587,5.82187,6.30687,6.88431");
- }
- fall_transition(template_136) {
- values("0.09255,0.12077,0.20608,0.36663,0.63672,1.03285,1.55900,2.22471,3.03444,4.00332");
- }
- }
- }
- pin("io_out[7]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_133) {
- values("3.33128,3.36115,3.43508,3.54325,3.69991,3.92010,4.21155,4.58055,5.03236,5.57295");
- }
- rise_transition(template_133) {
- values("0.12297,0.15104,0.22852,0.37822,0.64372,1.03298,1.55400,2.21260,3.02260,3.98079");
- }
- cell_fall(template_134) {
- values("2.84080,2.86820,2.94147,3.05785,3.22710,3.46480,3.77752,4.17352,4.65824,5.23524");
- }
- fall_transition(template_134) {
- values("0.09879,0.12768,0.21260,0.37234,0.63944,1.03384,1.55928,2.22472,3.03428,4.00284");
- }
- }
- }
- pin("io_out[6]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_131) {
- values("3.15503,3.18402,3.25580,3.36289,3.51912,3.73913,4.03100,4.40000,4.85257,5.39278");
- }
- rise_transition(template_131) {
- values("0.11705,0.14443,0.22159,0.37291,0.64002,1.03105,1.55400,2.21221,3.02221,3.97963");
- }
- cell_fall(template_132) {
- values("2.71874,2.74560,2.81774,2.93331,3.10232,3.34033,3.65338,4.04938,4.53438,5.11145");
- }
- fall_transition(template_132) {
- values("0.09419,0.12248,0.20770,0.36762,0.63712,1.03298,1.55900,2.22495,3.03407,4.00221");
- }
- }
- }
- pin("io_out[5]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_129) {
- values("4.81837,4.84670,4.91706,5.02339,5.17941,5.39940,5.69155,6.06068,6.51362,7.05380");
- }
- rise_transition(template_129) {
- values("0.11288,0.13976,0.21680,0.36938,0.63774,1.03000,1.55406,2.21219,3.02188,3.97944");
- }
- cell_fall(template_130) {
- values("4.61377,4.64049,4.71239,4.82782,4.99689,5.23494,5.54817,5.94417,6.42917,7.00653");
- }
- fall_transition(template_130) {
- values("0.09288,0.12112,0.20641,0.36683,0.63680,1.03288,1.55900,2.22476,3.03436,4.00309");
- }
- }
- }
- pin("io_out[4]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_127) {
- values("2.92343,2.95023,3.01838,3.12318,3.27937,3.50021,3.79282,4.16307,4.61544,5.15733");
- }
- rise_transition(template_127) {
- values("0.10452,0.13030,0.20774,0.36371,0.63536,1.03000,1.55463,2.21389,3.02074,3.98340");
- }
- cell_fall(template_128) {
- values("2.58458,2.61042,2.68086,2.79548,2.96490,3.20318,3.51752,3.91352,4.39852,4.97763");
- }
- fall_transition(template_128) {
- values("0.08511,0.11301,0.19877,0.36217,0.63488,1.03230,1.55900,2.22359,3.03611,4.00834");
- }
- }
- }
- pin("io_out[3]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_125) {
- values("3.09923,3.12781,3.19862,3.30522,3.46126,3.68118,3.97324,4.34224,4.79517,5.33521");
- }
- rise_transition(template_125) {
- values("0.11437,0.14143,0.21846,0.37051,0.63835,1.03018,1.55400,2.21204,3.02204,3.97911");
- }
- cell_fall(template_126) {
- values("2.68494,2.71155,2.78326,2.89858,3.06770,3.30578,3.61915,4.01515,4.50015,5.07774");
- }
- fall_transition(template_126) {
- values("0.09189,0.12008,0.20544,0.36624,0.63656,1.03280,1.55900,2.22461,3.03459,4.00376");
- }
- }
- }
- pin("io_out[2]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_119) {
- values("4.72878,4.75719,4.82765,4.93406,5.09007,5.31002,5.60215,5.97122,6.42418,6.96429");
- }
- rise_transition(template_119) {
- values("0.11330,0.14023,0.21726,0.36966,0.63786,1.03000,1.55403,2.21210,3.02193,3.97924");
- }
- cell_fall(template_120) {
- values("4.52991,4.55664,4.62856,4.74400,4.91307,5.15112,5.46433,5.86033,6.34533,6.92267");
- }
- fall_transition(template_120) {
- values("0.09300,0.12123,0.20652,0.36690,0.63683,1.03289,1.55900,2.22477,3.03434,4.00301");
- }
- }
- }
- pin("io_out[1]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_97) {
- values("3.52023,3.55113,3.62755,3.73704,3.89419,4.11467,4.40571,4.77463,5.22567,5.76654");
- }
- rise_transition(template_97) {
- values("0.12987,0.15881,0.23671,0.38455,0.64817,1.03552,1.55435,2.21309,3.02283,3.98213");
- }
- cell_fall(template_98) {
- values("2.96604,2.99406,3.06863,3.18597,3.35553,3.59285,3.90522,4.30122,4.78560,5.36260");
- }
- fall_transition(template_98) {
- values("0.10404,0.13364,0.21822,0.37790,0.64219,1.03487,1.55962,2.22438,3.03462,4.00387");
- }
- }
- }
- pin("io_out[0]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_75) {
- values("3.23951,3.26891,3.34168,3.44927,3.60570,3.82580,4.11747,4.48647,4.93869,5.47908");
- }
- rise_transition(template_75) {
- values("0.11979,0.14749,0.22480,0.37537,0.64173,1.03194,1.55400,2.21239,3.02239,3.98017");
- }
- cell_fall(template_76) {
- values("2.77827,2.80538,2.87803,2.99395,3.16306,3.40093,3.71381,4.10981,4.59470,5.17170");
- }
- fall_transition(template_76) {
- values("0.09628,0.12482,0.20991,0.36968,0.63813,1.03335,1.55912,2.22488,3.03412,4.00235");
- }
- }
- }
- }
- bus("irq") {
- bus_type : irq;
- direction : output;
- capacitance : 0.0000;
- pin("irq[2]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("irq[1]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("irq[0]") {
- direction : output;
- capacitance : 0.0729;
- }
- }
- bus("la_data_in") {
- bus_type : la_data_in;
- direction : input;
- capacitance : 0.0000;
- pin("la_data_in[63]") {
- direction : input;
- capacitance : 0.0082;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.76301");
- }
- fall_constraint(scalar) {
- values("-0.73705");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.44442");
- }
- fall_constraint(scalar) {
- values("1.58432");
- }
- }
- }
- pin("la_data_in[62]") {
- direction : input;
- capacitance : 0.0078;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.64655");
- }
- fall_constraint(scalar) {
- values("-0.62104");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.31715");
- }
- fall_constraint(scalar) {
- values("1.44401");
- }
- }
- }
- pin("la_data_in[61]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.66682");
- }
- fall_constraint(scalar) {
- values("-0.80128");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.32549");
- }
- fall_constraint(scalar) {
- values("1.69177");
- }
- }
- }
- pin("la_data_in[60]") {
- direction : input;
- capacitance : 0.0075;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.70302");
- }
- fall_constraint(scalar) {
- values("-0.83843");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.38952");
- }
- fall_constraint(scalar) {
- values("1.75120");
- }
- }
- }
- pin("la_data_in[59]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.95185");
- }
- fall_constraint(scalar) {
- values("-1.55681");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.76262");
- }
- fall_constraint(scalar) {
- values("2.52687");
- }
- }
- }
- pin("la_data_in[58]") {
- direction : input;
- capacitance : 0.0083;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.81454");
- }
- fall_constraint(scalar) {
- values("-0.95064");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.48596");
- }
- fall_constraint(scalar) {
- values("1.88278");
- }
- }
- }
- pin("la_data_in[57]") {
- direction : input;
- capacitance : 0.0084;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.82092");
- }
- fall_constraint(scalar) {
- values("-0.94697");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.45210");
- }
- fall_constraint(scalar) {
- values("1.71107");
- }
- }
- }
- pin("la_data_in[56]") {
- direction : input;
- capacitance : 0.0089;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.91921");
- }
- fall_constraint(scalar) {
- values("-1.05607");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.59249");
- }
- fall_constraint(scalar) {
- values("2.00918");
- }
- }
- }
- pin("la_data_in[55]") {
- direction : input;
- capacitance : 0.0084;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.83411");
- }
- fall_constraint(scalar) {
- values("-0.96524");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.51695");
- }
- fall_constraint(scalar) {
- values("1.87404");
- }
- }
- }
- pin("la_data_in[54]") {
- direction : input;
- capacitance : 0.0075;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.69853");
- }
- fall_constraint(scalar) {
- values("-0.83264");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.35579");
- }
- fall_constraint(scalar) {
- values("1.73859");
- }
- }
- }
- pin("la_data_in[53]") {
- direction : input;
- capacitance : 0.0078;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.99856");
- }
- fall_constraint(scalar) {
- values("-0.93713");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.71591");
- }
- fall_constraint(scalar) {
- values("1.80226");
- }
- }
- }
- pin("la_data_in[52]") {
- direction : input;
- capacitance : 0.0092;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.97200");
- }
- fall_constraint(scalar) {
- values("-1.10339");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.65215");
- }
- fall_constraint(scalar) {
- values("2.05079");
- }
- }
- }
- pin("la_data_in[51]") {
- direction : input;
- capacitance : 0.0089;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.91050");
- }
- fall_constraint(scalar) {
- values("-1.02483");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.54860");
- }
- fall_constraint(scalar) {
- values("1.79768");
- }
- }
- }
- pin("la_data_in[50]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.90962");
- }
- fall_constraint(scalar) {
- values("-1.03897");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.62559");
- }
- fall_constraint(scalar) {
- values("1.98798");
- }
- }
- }
- pin("la_data_in[49]") {
- direction : input;
- capacitance : 0.0076;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.83927");
- }
- fall_constraint(scalar) {
- values("-0.96834");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.48514");
- }
- fall_constraint(scalar) {
- values("1.72520");
- }
- }
- }
- pin("la_data_in[48]") {
- direction : input;
- capacitance : 0.0084;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.86772");
- }
- fall_constraint(scalar) {
- values("-1.00865");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.53444");
- }
- fall_constraint(scalar) {
- values("1.95102");
- }
- }
- }
- pin("la_data_in[47]") {
- direction : input;
- capacitance : 0.0103;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.92087");
- }
- fall_constraint(scalar) {
- values("-1.05604");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.61788");
- }
- fall_constraint(scalar) {
- values("1.95055");
- }
- }
- }
- pin("la_data_in[46]") {
- direction : input;
- capacitance : 0.0103;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.33625");
- }
- fall_constraint(scalar) {
- values("-1.57203");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("3.32480");
- }
- fall_constraint(scalar) {
- values("2.49656");
- }
- }
- }
- pin("la_data_in[45]") {
- direction : input;
- capacitance : 0.0132;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.00246");
- }
- fall_constraint(scalar) {
- values("-1.12892");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.71448");
- }
- fall_constraint(scalar) {
- values("2.05910");
- }
- }
- }
- pin("la_data_in[44]") {
- direction : input;
- capacitance : 0.0113;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.93296");
- }
- fall_constraint(scalar) {
- values("-1.06278");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.63188");
- }
- fall_constraint(scalar) {
- values("2.02313");
- }
- }
- }
- pin("la_data_in[43]") {
- direction : input;
- capacitance : 0.0118;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.99887");
- }
- fall_constraint(scalar) {
- values("-1.12518");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.68503");
- }
- fall_constraint(scalar) {
- values("2.07778");
- }
- }
- }
- pin("la_data_in[42]") {
- direction : input;
- capacitance : 0.0118;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.01012");
- }
- fall_constraint(scalar) {
- values("-1.13830");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.73286");
- }
- fall_constraint(scalar) {
- values("2.08126");
- }
- }
- }
- pin("la_data_in[41]") {
- direction : input;
- capacitance : 0.0116;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.06882");
- }
- fall_constraint(scalar) {
- values("-0.99305");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.82039");
- }
- fall_constraint(scalar) {
- values("1.81733");
- }
- }
- }
- pin("la_data_in[40]") {
- direction : input;
- capacitance : 0.0141;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.31304");
- }
- fall_constraint(scalar) {
- values("-1.44802");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.04135");
- }
- fall_constraint(scalar) {
- values("2.49995");
- }
- }
- }
- pin("la_data_in[39]") {
- direction : input;
- capacitance : 0.0145;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.37321");
- }
- fall_constraint(scalar) {
- values("-1.50694");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.13996");
- }
- fall_constraint(scalar) {
- values("2.55319");
- }
- }
- }
- pin("la_data_in[38]") {
- direction : input;
- capacitance : 0.0156;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.42922");
- }
- fall_constraint(scalar) {
- values("-1.56498");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.20804");
- }
- fall_constraint(scalar) {
- values("2.67076");
- }
- }
- }
- pin("la_data_in[37]") {
- direction : input;
- capacitance : 0.0132;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.17865");
- }
- fall_constraint(scalar) {
- values("-1.31461");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.93541");
- }
- fall_constraint(scalar) {
- values("2.33613");
- }
- }
- }
- pin("la_data_in[36]") {
- direction : input;
- capacitance : 0.0125;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.79478");
- }
- fall_constraint(scalar) {
- values("-0.90695");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.52567");
- }
- fall_constraint(scalar) {
- values("1.82789");
- }
- }
- }
- pin("la_data_in[35]") {
- direction : input;
- capacitance : 0.0129;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.22133");
- }
- fall_constraint(scalar) {
- values("-1.33925");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.93648");
- }
- fall_constraint(scalar) {
- values("2.19147");
- }
- }
- }
- pin("la_data_in[34]") {
- direction : input;
- capacitance : 0.0158;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.08736");
- }
- fall_constraint(scalar) {
- values("-1.18097");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.77721");
- }
- fall_constraint(scalar) {
- values("1.95036");
- }
- }
- }
- pin("la_data_in[33]") {
- direction : input;
- capacitance : 0.0143;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.10417");
- }
- fall_constraint(scalar) {
- values("-1.20764");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.79577");
- }
- fall_constraint(scalar) {
- values("1.99578");
- }
- }
- }
- pin("la_data_in[32]") {
- direction : input;
- capacitance : 0.0152;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.09924");
- }
- fall_constraint(scalar) {
- values("-1.08420");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.77174");
- }
- fall_constraint(scalar) {
- values("1.91325");
- }
- }
- }
- pin("la_data_in[31]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[30]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[29]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[28]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[27]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[26]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[25]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[24]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[23]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[22]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[21]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[20]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[19]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[18]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[17]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[16]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[15]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[14]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[13]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[12]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[11]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[10]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[9]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[8]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[7]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[6]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[5]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[4]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[3]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[2]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[1]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_data_in[0]") {
- direction : input;
- capacitance : 0.0000;
- }
- }
- bus("la_data_out") {
- bus_type : la_data_out;
- direction : output;
- capacitance : 0.0000;
- pin("la_data_out[63]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[62]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[61]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[60]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[59]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[58]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[57]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[56]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[55]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[54]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[53]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[52]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[51]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[50]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[49]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[48]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[47]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[46]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[45]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[44]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[43]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[42]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[41]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[40]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[39]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[38]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[37]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[36]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[35]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[34]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[33]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[32]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[31]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_187) {
- values("3.42402,3.44655,3.50823,3.61242,3.77115,3.99456,4.28967,4.66167,5.11597,5.65797");
- }
- rise_transition(template_187) {
- values("0.07357,0.09856,0.18179,0.35138,0.63067,1.02900,1.55330,2.21511,3.02311,3.98670");
- }
- cell_fall(template_188) {
- values("2.99953,3.02399,3.09324,3.20777,3.37904,3.61848,3.93340,4.33119,4.81719,5.39619");
- }
- fall_transition(template_188) {
- values("0.06852,0.09655,0.18562,0.35475,0.63272,1.03200,1.55900,2.22521,3.03958,4.01000");
- }
- }
- }
- pin("la_data_out[30]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_185) {
- values("5.14943,5.17196,5.23365,5.33786,5.49659,5.72001,6.01515,6.38715,6.84143,7.38343");
- }
- rise_transition(template_185) {
- values("0.07350,0.09852,0.18176,0.35137,0.63067,1.02900,1.55328,2.21517,3.02317,3.98672");
- }
- cell_fall(template_186) {
- values("5.12222,5.14668,5.21592,5.33045,5.50172,5.74115,6.05607,6.45385,6.93985,7.51885");
- }
- fall_transition(template_186) {
- values("0.06855,0.09657,0.18563,0.35475,0.63272,1.03200,1.55900,2.22522,3.03956,4.01000");
- }
- }
- }
- pin("la_data_out[29]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_181) {
- values("6.23662,6.25915,6.32085,6.42509,6.58385,6.80728,7.10247,7.47447,7.92871,8.47071");
- }
- rise_transition(template_181) {
- values("0.07337,0.09844,0.18171,0.35134,0.63068,1.02900,1.55324,2.21529,3.02329,3.98676");
- }
- cell_fall(template_182) {
- values("6.49223,6.51669,6.58596,6.70050,6.87179,7.11123,7.42615,7.82396,8.30996,8.88896");
- }
- fall_transition(template_182) {
- values("0.06846,0.09649,0.18559,0.35473,0.63272,1.03200,1.55900,2.22519,3.03962,4.01000");
- }
- }
- }
- pin("la_data_out[28]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_179) {
- values("7.59209,7.61461,7.67633,7.78059,7.93936,8.16280,8.45804,8.83004,9.28424,9.82624");
- }
- rise_transition(template_179) {
- values("0.07327,0.09838,0.18167,0.35132,0.63068,1.02900,1.55320,2.21539,3.02339,3.98680");
- }
- cell_fall(template_180) {
- values("7.96924,7.99370,8.06300,8.17757,8.34888,8.58833,8.90325,9.30109,9.78709,10.36609");
- }
- fall_transition(template_180) {
- values("0.06834,0.09639,0.18553,0.35471,0.63272,1.03200,1.55900,2.22515,3.03969,4.01000");
- }
- }
- }
- pin("la_data_out[27]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_177) {
- values("3.45971,3.48224,3.54389,3.64803,3.80670,4.03009,4.32509,4.69709,5.15147,5.69347");
- }
- rise_transition(template_177) {
- values("0.07384,0.09871,0.18189,0.35143,0.63066,1.02900,1.55338,2.21486,3.02286,3.98662");
- }
- cell_fall(template_178) {
- values("3.02968,3.05412,3.12331,3.23778,3.40900,3.64841,3.96334,4.36105,4.84705,5.42605");
- }
- fall_transition(template_178) {
- values("0.06878,0.09677,0.18574,0.35481,0.63273,1.03200,1.55900,2.22529,3.03941,4.01000");
- }
- }
- }
- pin("la_data_out[26]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_175) {
- values("5.25935,5.28187,5.34361,5.44790,5.60671,5.83017,6.12547,6.49747,6.95162,7.49362");
- }
- rise_transition(template_175) {
- values("0.07309,0.09828,0.18159,0.35129,0.63069,1.02900,1.55315,2.21555,3.02355,3.98685");
- }
- cell_fall(template_176) {
- values("5.18016,5.20464,5.27397,5.38860,5.55995,5.79942,6.11433,6.51224,6.99824,7.57724");
- }
- fall_transition(template_176) {
- values("0.06814,0.09622,0.18544,0.35466,0.63271,1.03200,1.55900,2.22509,3.03982,4.01000");
- }
- }
- }
- pin("la_data_out[25]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_173) {
- values("3.39115,3.41367,3.47538,3.57963,3.73840,3.96184,4.25705,4.62905,5.08327,5.62527");
- }
- rise_transition(template_173) {
- values("0.07331,0.09841,0.18168,0.35133,0.63068,1.02900,1.55322,2.21535,3.02335,3.98678");
- }
- cell_fall(template_174) {
- values("2.97088,2.99536,3.06467,3.17926,3.35058,3.59004,3.90495,4.30282,4.78882,5.36782");
- }
- fall_transition(template_174) {
- values("0.06827,0.09633,0.18550,0.35469,0.63271,1.03200,1.55900,2.22513,3.03974,4.01000");
- }
- }
- }
- pin("la_data_out[24]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_171) {
- values("8.20658,8.22911,8.29077,8.39492,8.55360,8.77699,9.07203,9.44402,9.89839,10.44038");
- }
- rise_transition(template_171) {
- values("0.07377,0.09868,0.18187,0.35142,0.63066,1.02900,1.55336,2.21492,3.02292,3.98664");
- }
- cell_fall(template_172) {
- values("8.57833,8.60277,8.67196,8.78642,8.95764,9.19705,9.51198,9.90969,10.39569,10.97469");
- }
- fall_transition(template_172) {
- values("0.06879,0.09678,0.18575,0.35481,0.63273,1.03200,1.55900,2.22530,3.03940,4.01000");
- }
- }
- }
- pin("la_data_out[23]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_169) {
- values("6.14012,6.16266,6.22430,6.32842,6.48708,6.71046,7.00544,7.37744,7.83184,8.37384");
- }
- rise_transition(template_169) {
- values("0.07390,0.09875,0.18192,0.35144,0.63066,1.02900,1.55340,2.21480,3.02280,3.98660");
- }
- cell_fall(template_170) {
- values("6.38966,6.41409,6.48325,6.59768,6.76888,7.00828,7.32321,7.72087,8.20687,8.78587");
- }
- fall_transition(template_170) {
- values("0.06892,0.09689,0.18581,0.35484,0.63273,1.03200,1.55900,2.22534,3.03932,4.01000");
- }
- }
- }
- pin("la_data_out[22]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_167) {
- values("3.26845,3.29098,3.35265,3.45684,3.61555,3.83896,4.13406,4.50606,4.96037,5.50237");
- }
- rise_transition(template_167) {
- values("0.07361,0.09858,0.18180,0.35139,0.63067,1.02900,1.55331,2.21507,3.02307,3.98669");
- }
- cell_fall(template_168) {
- values("2.89040,2.91486,2.98410,3.09862,3.26988,3.50931,3.82424,4.22201,4.70801,5.28701");
- }
- fall_transition(template_168) {
- values("0.06857,0.09659,0.18564,0.35476,0.63272,1.03200,1.55900,2.22523,3.03955,4.01000");
- }
- }
- }
- pin("la_data_out[21]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_165) {
- values("4.36347,4.38599,4.44770,4.55194,4.71071,4.93414,5.22935,5.60135,6.05558,6.59758");
- }
- rise_transition(template_165) {
- values("0.07333,0.09842,0.18169,0.35133,0.63068,1.02900,1.55322,2.21533,3.02333,3.98678");
- }
- cell_fall(template_166) {
- values("4.29775,4.32222,4.39150,4.50607,4.67737,4.91682,5.23174,5.62957,6.11557,6.69457");
- }
- fall_transition(template_166) {
- values("0.06838,0.09642,0.18555,0.35472,0.63272,1.03200,1.55900,2.22517,3.03967,4.01000");
- }
- }
- }
- pin("la_data_out[20]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_163) {
- values("7.52824,7.55077,7.61246,7.71667,7.87541,8.09883,8.39398,8.76598,9.22025,9.76225");
- }
- rise_transition(template_163) {
- values("0.07347,0.09850,0.18175,0.35136,0.63067,1.02900,1.55327,2.21520,3.02320,3.98673");
- }
- cell_fall(template_164) {
- values("7.89038,7.91483,7.98408,8.09861,8.26988,8.50932,8.82424,9.22203,9.70803,10.28703");
- }
- fall_transition(template_164) {
- values("0.06853,0.09655,0.18562,0.35475,0.63272,1.03200,1.55900,2.22521,3.03957,4.01000");
- }
- }
- }
- pin("la_data_out[19]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_159) {
- values("6.37516,6.39842,6.46055,6.56403,6.72196,6.94494,7.23929,7.61092,8.06555,8.60719");
- }
- rise_transition(template_159) {
- values("0.07974,0.10422,0.18546,0.35301,0.63082,1.02863,1.55363,2.21337,3.02100,3.98563");
- }
- cell_fall(template_160) {
- values("6.56666,6.59125,6.66021,6.77419,6.94468,7.18366,7.49864,7.89537,8.38111,8.96037");
- }
- fall_transition(template_160) {
- values("0.07368,0.10138,0.18895,0.35649,0.63309,1.03200,1.55900,2.22520,3.03773,4.01027");
- }
- }
- }
- pin("la_data_out[18]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_157) {
- values("3.03265,3.05522,3.11675,3.22067,3.37916,3.60246,3.89708,4.26908,4.72376,5.26576");
- }
- rise_transition(template_157) {
- values("0.07481,0.09928,0.18228,0.35161,0.63063,1.02900,1.55368,2.21396,3.02196,3.98632");
- }
- cell_fall(template_158) {
- values("2.77231,2.79670,2.86569,2.97993,3.15099,3.39031,3.70527,4.10269,4.58869,5.16769");
- }
- fall_transition(template_158) {
- values("0.06966,0.09753,0.18616,0.35500,0.63276,1.03200,1.55900,2.22558,3.03885,4.01000");
- }
- }
- }
- pin("la_data_out[17]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_155) {
- values("3.72916,3.75167,3.81342,3.91772,4.07654,4.30000,4.59533,4.96733,5.42146,5.96346");
- }
- rise_transition(template_155) {
- values("0.07304,0.09825,0.18157,0.35128,0.63069,1.02900,1.55313,2.21560,3.02360,3.98687");
- }
- cell_fall(template_156) {
- values("3.44023,3.46471,3.53404,3.64865,3.81999,4.05946,4.37437,4.77226,5.25826,5.83726");
- }
- fall_transition(template_156) {
- values("0.06819,0.09626,0.18546,0.35467,0.63271,1.03200,1.55900,2.22511,3.03979,4.01000");
- }
- }
- }
- pin("la_data_out[16]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_153) {
- values("5.65579,5.67832,5.74001,5.84421,6.00295,6.22636,6.52150,6.89350,7.34778,7.88978");
- }
- rise_transition(template_153) {
- values("0.07350,0.09852,0.18176,0.35137,0.63067,1.02900,1.55328,2.21517,3.02317,3.98672");
- }
- cell_fall(template_154) {
- values("5.88730,5.91175,5.98100,6.09552,6.26679,6.50622,6.82115,7.21892,7.70493,8.28393");
- }
- fall_transition(template_154) {
- values("0.06855,0.09657,0.18563,0.35475,0.63272,1.03200,1.55900,2.22522,3.03956,4.01000");
- }
- }
- }
- pin("la_data_out[15]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_151) {
- values("3.41701,3.43955,3.50121,3.60537,3.76407,3.98747,4.28253,4.65453,5.10887,5.65087");
- }
- rise_transition(template_151) {
- values("0.07371,0.09864,0.18184,0.35140,0.63067,1.02900,1.55334,2.21498,3.02298,3.98666");
- }
- cell_fall(template_152) {
- values("2.99290,3.01735,3.08657,3.20107,3.37232,3.61174,3.92666,4.32441,4.81041,5.38941");
- }
- fall_transition(template_152) {
- values("0.06865,0.09666,0.18568,0.35478,0.63273,1.03200,1.55900,2.22525,3.03949,4.01000");
- }
- }
- }
- pin("la_data_out[14]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_149) {
- values("3.33894,3.36147,3.42317,3.52739,3.68614,3.90956,4.20473,4.57673,5.03099,5.57299");
- }
- rise_transition(template_149) {
- values("0.07342,0.09848,0.18173,0.35135,0.63067,1.02900,1.55325,2.21524,3.02324,3.98675");
- }
- cell_fall(template_150) {
- values("2.92688,2.95135,3.02063,3.13520,3.30650,3.54594,3.86086,4.25869,4.74469,5.32369");
- }
- fall_transition(template_150) {
- values("0.06839,0.09643,0.18555,0.35472,0.63272,1.03200,1.55900,2.22517,3.03966,4.01000");
- }
- }
- }
- pin("la_data_out[13]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_147) {
- values("3.88550,3.90802,3.96973,4.07398,4.23274,4.45618,4.75139,5.12339,5.57761,6.11961");
- }
- rise_transition(template_147) {
- values("0.07333,0.09842,0.18169,0.35133,0.63068,1.02900,1.55322,2.21533,3.02333,3.98678");
- }
- cell_fall(template_148) {
- values("3.55454,3.57900,3.64827,3.76282,3.93410,4.17355,4.48847,4.88628,5.37228,5.95128");
- }
- fall_transition(template_148) {
- values("0.06845,0.09648,0.18558,0.35473,0.63272,1.03200,1.55900,2.22519,3.03962,4.01000");
- }
- }
- }
- pin("la_data_out[12]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_145) {
- values("5.77932,5.80185,5.86351,5.96767,6.12636,6.34976,6.64481,7.01681,7.47116,8.01316");
- }
- rise_transition(template_145) {
- values("0.07373,0.09865,0.18185,0.35141,0.63067,1.02900,1.55335,2.21496,3.02296,3.98665");
- }
- cell_fall(template_146) {
- values("6.01417,6.03861,6.10781,6.22228,6.39351,6.63293,6.94786,7.34557,7.83157,8.41057");
- }
- fall_transition(template_146) {
- values("0.06875,0.09674,0.18573,0.35480,0.63273,1.03200,1.55900,2.22528,3.03943,4.01000");
- }
- }
- }
- pin("la_data_out[11]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_143) {
- values("5.85306,5.87561,5.93720,6.04124,6.19982,6.42317,6.71799,7.08999,7.54451,8.08651");
- }
- rise_transition(template_143) {
- values("0.07430,0.09898,0.18208,0.35151,0.63065,1.02900,1.55352,2.21444,3.02244,3.98648");
- }
- cell_fall(template_144) {
- values("6.09494,6.11936,6.18844,6.30279,6.47392,6.71329,7.02823,7.42579,7.91179,8.49079");
- }
- fall_transition(template_144) {
- values("0.06925,0.09717,0.18597,0.35491,0.63274,1.03200,1.55900,2.22544,3.03911,4.01000");
- }
- }
- }
- pin("la_data_out[10]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_141) {
- values("3.62398,3.64653,3.70815,3.81223,3.97086,4.19423,4.48914,4.86114,5.31559,5.85759");
- }
- rise_transition(template_141) {
- values("0.07407,0.09885,0.18198,0.35147,0.63066,1.02900,1.55345,2.21465,3.02265,3.98655");
- }
- cell_fall(template_142) {
- values("3.14390,3.16833,3.23748,3.35189,3.52308,3.76247,4.07741,4.47505,4.96105,5.54005");
- }
- fall_transition(template_142) {
- values("0.06897,0.09693,0.18583,0.35485,0.63274,1.03200,1.55900,2.22536,3.03929,4.01000");
- }
- }
- }
- pin("la_data_out[9]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_201) {
- values("4.33298,4.35550,4.41721,4.52144,4.68019,4.90362,5.19880,5.57080,6.02504,6.56704");
- }
- rise_transition(template_201) {
- values("0.07339,0.09846,0.18172,0.35135,0.63068,1.02900,1.55324,2.21527,3.02327,3.98676");
- }
- cell_fall(template_202) {
- values("4.05315,4.07760,4.14684,4.26135,4.43261,4.67204,4.98696,5.38473,5.87073,6.44973");
- }
- fall_transition(template_202) {
- values("0.06859,0.09661,0.18565,0.35476,0.63272,1.03200,1.55900,2.22523,3.03953,4.01000");
- }
- }
- }
- pin("la_data_out[8]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_199) {
- values("5.84577,5.86834,5.92989,6.03384,6.19237,6.41568,6.71036,7.08236,7.53699,8.07899");
- }
- rise_transition(template_199) {
- values("0.07465,0.09918,0.18222,0.35158,0.63064,1.02900,1.55363,2.21411,3.02211,3.98637");
- }
- cell_fall(template_200) {
- values("6.08680,6.11119,6.18021,6.29448,6.46555,6.70489,7.01984,7.41730,7.90330,8.48230");
- }
- fall_transition(template_200) {
- values("0.06955,0.09744,0.18611,0.35498,0.63275,1.03200,1.55900,2.22554,3.03891,4.01000");
- }
- }
- }
- pin("la_data_out[7]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_197) {
- values("3.66722,3.69003,3.75166,3.85529,4.01347,4.23660,4.53085,4.90273,5.35762,5.89950");
- }
- rise_transition(template_197) {
- values("0.07709,0.10126,0.18357,0.35218,0.63067,1.02888,1.55388,2.21312,3.02100,3.98588");
- }
- cell_fall(template_198) {
- values("3.21268,3.23700,3.30572,3.41963,3.59040,3.82959,4.14458,4.54156,5.02754,5.60656");
- }
- fall_transition(template_198) {
- values("0.07121,0.09889,0.18698,0.35540,0.63282,1.03200,1.55900,2.22593,3.03798,4.01002");
- }
- }
- }
- pin("la_data_out[6]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_195) {
- values("4.39913,4.42261,4.48499,4.58840,4.74621,4.96911,5.26351,5.63502,6.08953,6.63104");
- }
- rise_transition(template_195) {
- values("0.08104,0.10568,0.18638,0.35342,0.63089,1.02851,1.55351,2.21349,3.02100,3.98551");
- }
- cell_fall(template_196) {
- values("4.04526,4.06999,4.13909,4.25311,4.42343,4.66232,4.97728,5.37389,5.85950,6.43889");
- }
- fall_transition(template_196) {
- values("0.07497,0.10268,0.18998,0.35707,0.63323,1.03200,1.55900,2.22482,3.03761,4.01039");
- }
- }
- }
- pin("la_data_out[5]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_193) {
- values("6.24560,6.26897,6.33122,6.43466,6.59254,6.81548,7.10985,7.48142,7.93600,8.47757");
- }
- rise_transition(template_193) {
- values("0.08037,0.10493,0.18590,0.35321,0.63086,1.02857,1.55357,2.21343,3.02100,3.98557");
- }
- cell_fall(template_194) {
- values("6.47329,6.49795,6.56697,6.68097,6.85138,7.09032,7.40529,7.80197,8.28764,8.86697");
- }
- fall_transition(template_194) {
- values("0.07426,0.10196,0.18941,0.35675,0.63315,1.03200,1.55900,2.22503,3.03768,4.01032");
- }
- }
- }
- pin("la_data_out[4]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_191) {
- values("3.22577,3.24835,3.30982,3.41363,3.57203,3.79527,4.08968,4.46168,4.91652,5.45852");
- }
- rise_transition(template_191) {
- values("0.07533,0.09958,0.18249,0.35170,0.63062,1.02900,1.55384,2.21348,3.02148,3.98616");
- }
- cell_fall(template_192) {
- values("2.91230,2.93665,3.00555,3.11967,3.29063,3.52992,3.84489,4.24217,4.72817,5.30717");
- }
- fall_transition(template_192) {
- values("0.07011,0.09792,0.18638,0.35511,0.63277,1.03200,1.55900,2.22572,3.03856,4.01000");
- }
- }
- }
- pin("la_data_out[3]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_189) {
- values("4.47689,4.50033,4.56266,4.66608,4.82391,5.04683,5.34122,5.71276,6.16729,6.70883");
- }
- rise_transition(template_189) {
- values("0.08076,0.10536,0.18618,0.35333,0.63088,1.02854,1.55354,2.21346,3.02100,3.98554");
- }
- cell_fall(template_190) {
- values("4.09400,4.11868,4.18773,4.30174,4.47212,4.71104,5.02600,5.42265,5.90830,6.48765");
- }
- fall_transition(template_190) {
- values("0.07454,0.10225,0.18964,0.35688,0.63319,1.03200,1.55900,2.22495,3.03765,4.01035");
- }
- }
- }
- pin("la_data_out[2]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_183) {
- values("6.46859,6.49280,6.55598,6.65914,6.81655,7.03922,7.33377,7.70488,8.15899,8.70010");
- }
- rise_transition(template_183) {
- values("0.08526,0.11040,0.18937,0.35474,0.63113,1.02811,1.55311,2.21389,3.02100,3.98511");
- }
- cell_fall(template_184) {
- values("6.66919,6.69432,6.76378,6.87791,7.04780,7.28639,7.60132,7.99756,8.48280,9.06256");
- }
- fall_transition(template_184) {
- values("0.07869,0.10642,0.19293,0.35871,0.63363,1.03200,1.55900,2.22373,3.03724,4.01076");
- }
- }
- }
- pin("la_data_out[1]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_161) {
- values("3.78191,3.80450,3.86597,3.96979,4.12820,4.35145,4.64588,5.01788,5.47270,6.01470");
- }
- rise_transition(template_161) {
- values("0.07528,0.09955,0.18247,0.35169,0.63062,1.02900,1.55382,2.21353,3.02153,3.98618");
- }
- cell_fall(template_162) {
- values("3.26115,3.28551,3.35442,3.46856,3.63954,3.87883,4.19380,4.59110,5.07710,5.65610");
- }
- fall_transition(template_162) {
- values("0.07005,0.09786,0.18635,0.35509,0.63277,1.03200,1.55900,2.22570,3.03860,4.01000");
- }
- }
- }
- pin("la_data_out[0]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_139) {
- values("3.64893,3.67224,3.73444,3.83790,3.99580,4.21876,4.51312,4.88473,5.33933,5.88093");
- }
- rise_transition(template_139) {
- values("0.08007,0.10459,0.18569,0.35311,0.63084,1.02860,1.55360,2.21340,3.02100,3.98560");
- }
- cell_fall(template_140) {
- values("3.22599,3.25060,3.31958,3.43357,3.60403,3.84300,4.15797,4.55469,5.04041,5.61969");
- }
- fall_transition(template_140) {
- values("0.07386,0.10155,0.18909,0.35657,0.63311,1.03200,1.55900,2.22515,3.03772,4.01028");
- }
- }
- }
- }
- bus("la_oenb") {
- bus_type : la_oenb;
- direction : input;
- capacitance : 0.0000;
- pin("la_oenb[63]") {
- direction : input;
- capacitance : 0.0077;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.08802");
- }
- fall_constraint(scalar) {
- values("-1.29465");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.20890");
- }
- fall_constraint(scalar) {
- values("7.10875");
- }
- }
- }
- pin("la_oenb[62]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.77672");
- }
- fall_constraint(scalar) {
- values("-1.01514");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.63489");
- }
- fall_constraint(scalar) {
- values("6.40210");
- }
- }
- }
- pin("la_oenb[61]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.14167");
- }
- fall_constraint(scalar) {
- values("-1.22357");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.75365");
- }
- fall_constraint(scalar) {
- values("6.58149");
- }
- }
- }
- pin("la_oenb[60]") {
- direction : input;
- capacitance : 0.0082;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.24739");
- }
- fall_constraint(scalar) {
- values("-1.29406");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.85310");
- }
- fall_constraint(scalar) {
- values("6.65725");
- }
- }
- }
- pin("la_oenb[59]") {
- direction : input;
- capacitance : 0.0073;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.36041");
- }
- fall_constraint(scalar) {
- values("-1.78755");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("5.75468");
- }
- fall_constraint(scalar) {
- values("5.68515");
- }
- }
- }
- pin("la_oenb[58]") {
- direction : input;
- capacitance : 0.0079;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.23762");
- }
- fall_constraint(scalar) {
- values("-1.32221");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.87047");
- }
- fall_constraint(scalar) {
- values("6.70053");
- }
- }
- }
- pin("la_oenb[57]") {
- direction : input;
- capacitance : 0.0074;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.27004");
- }
- fall_constraint(scalar) {
- values("-1.33540");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.68398");
- }
- fall_constraint(scalar) {
- values("6.39737");
- }
- }
- }
- pin("la_oenb[56]") {
- direction : input;
- capacitance : 0.0091;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.44807");
- }
- fall_constraint(scalar) {
- values("-1.50911");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("6.77453");
- }
- fall_constraint(scalar) {
- values("6.82745");
- }
- }
- }
- pin("la_oenb[55]") {
- direction : input;
- capacitance : 0.0084;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.26335");
- }
- fall_constraint(scalar) {
- values("-1.37399");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("6.72895");
- }
- fall_constraint(scalar) {
- values("6.61756");
- }
- }
- }
- pin("la_oenb[54]") {
- direction : input;
- capacitance : 0.0076;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.34339");
- }
- fall_constraint(scalar) {
- values("-1.54939");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.17311");
- }
- fall_constraint(scalar) {
- values("7.47186");
- }
- }
- }
- pin("la_oenb[53]") {
- direction : input;
- capacitance : 0.0085;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.23208");
- }
- fall_constraint(scalar) {
- values("-1.66986");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.26176");
- }
- fall_constraint(scalar) {
- values("7.54041");
- }
- }
- }
- pin("la_oenb[52]") {
- direction : input;
- capacitance : 0.0078;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.30904");
- }
- fall_constraint(scalar) {
- values("-1.51679");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.12245");
- }
- fall_constraint(scalar) {
- values("7.26171");
- }
- }
- }
- pin("la_oenb[51]") {
- direction : input;
- capacitance : 0.0085;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.32376");
- }
- fall_constraint(scalar) {
- values("-1.49606");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.07553");
- }
- fall_constraint(scalar) {
- values("6.56501");
- }
- }
- }
- pin("la_oenb[50]") {
- direction : input;
- capacitance : 0.0082;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.37827");
- }
- fall_constraint(scalar) {
- values("-1.57903");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.20851");
- }
- fall_constraint(scalar) {
- values("7.50902");
- }
- }
- }
- pin("la_oenb[49]") {
- direction : input;
- capacitance : 0.0085;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.54383");
- }
- fall_constraint(scalar) {
- values("-1.79608");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.33204");
- }
- fall_constraint(scalar) {
- values("7.54383");
- }
- }
- }
- pin("la_oenb[48]") {
- direction : input;
- capacitance : 0.0089;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.25798");
- }
- fall_constraint(scalar) {
- values("-1.38386");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("6.72982");
- }
- fall_constraint(scalar) {
- values("6.55004");
- }
- }
- }
- pin("la_oenb[47]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.47759");
- }
- fall_constraint(scalar) {
- values("-1.66525");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.46601");
- }
- fall_constraint(scalar) {
- values("7.72738");
- }
- }
- }
- pin("la_oenb[46]") {
- direction : input;
- capacitance : 0.0093;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.51769");
- }
- fall_constraint(scalar) {
- values("-2.34468");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("6.75925");
- }
- fall_constraint(scalar) {
- values("6.55064");
- }
- }
- }
- pin("la_oenb[45]") {
- direction : input;
- capacitance : 0.0114;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.51269");
- }
- fall_constraint(scalar) {
- values("-1.74471");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.44768");
- }
- fall_constraint(scalar) {
- values("7.56242");
- }
- }
- }
- pin("la_oenb[44]") {
- direction : input;
- capacitance : 0.0096;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.56364");
- }
- fall_constraint(scalar) {
- values("-1.81107");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.32327");
- }
- fall_constraint(scalar) {
- values("7.76226");
- }
- }
- }
- pin("la_oenb[43]") {
- direction : input;
- capacitance : 0.0124;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.45567");
- }
- fall_constraint(scalar) {
- values("-1.64528");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.22419");
- }
- fall_constraint(scalar) {
- values("6.78991");
- }
- }
- }
- pin("la_oenb[42]") {
- direction : input;
- capacitance : 0.0128;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.66102");
- }
- fall_constraint(scalar) {
- values("-1.89997");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.52662");
- }
- fall_constraint(scalar) {
- values("7.81501");
- }
- }
- }
- pin("la_oenb[41]") {
- direction : input;
- capacitance : 0.0137;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.48244");
- }
- fall_constraint(scalar) {
- values("-1.98040");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.49612");
- }
- fall_constraint(scalar) {
- values("7.89390");
- }
- }
- }
- pin("la_oenb[40]") {
- direction : input;
- capacitance : 0.0133;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.54261");
- }
- fall_constraint(scalar) {
- values("-1.75721");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.16774");
- }
- fall_constraint(scalar) {
- values("6.63223");
- }
- }
- }
- pin("la_oenb[39]") {
- direction : input;
- capacitance : 0.0132;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.92956");
- }
- fall_constraint(scalar) {
- values("-2.17581");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("6.61609");
- }
- fall_constraint(scalar) {
- values("6.35389");
- }
- }
- }
- pin("la_oenb[38]") {
- direction : input;
- capacitance : 0.0126;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.75482");
- }
- fall_constraint(scalar) {
- values("-1.98701");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.22560");
- }
- fall_constraint(scalar) {
- values("7.73152");
- }
- }
- }
- pin("la_oenb[37]") {
- direction : input;
- capacitance : 0.0168;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.08297");
- }
- fall_constraint(scalar) {
- values("-2.32946");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.60951");
- }
- fall_constraint(scalar) {
- values("8.25650");
- }
- }
- }
- pin("la_oenb[36]") {
- direction : input;
- capacitance : 0.0163;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.90760");
- }
- fall_constraint(scalar) {
- values("-2.09982");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("6.76888");
- }
- fall_constraint(scalar) {
- values("6.56925");
- }
- }
- }
- pin("la_oenb[35]") {
- direction : input;
- capacitance : 0.0163;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.86005");
- }
- fall_constraint(scalar) {
- values("-2.15021");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.50504");
- }
- fall_constraint(scalar) {
- values("7.90315");
- }
- }
- }
- pin("la_oenb[34]") {
- direction : input;
- capacitance : 0.0142;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.66275");
- }
- fall_constraint(scalar) {
- values("-1.94116");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("6.93456");
- }
- fall_constraint(scalar) {
- values("7.62015");
- }
- }
- }
- pin("la_oenb[33]") {
- direction : input;
- capacitance : 0.0181;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.76710");
- }
- fall_constraint(scalar) {
- values("-2.03608");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.35402");
- }
- fall_constraint(scalar) {
- values("7.21764");
- }
- }
- }
- pin("la_oenb[32]") {
- direction : input;
- capacitance : 0.0162;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.42195");
- }
- fall_constraint(scalar) {
- values("-1.82097");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("7.09789");
- }
- fall_constraint(scalar) {
- values("6.85164");
- }
- }
- }
- pin("la_oenb[31]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[30]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[29]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[28]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[27]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[26]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[25]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[24]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[23]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[22]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[21]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[20]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[19]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[18]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[17]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[16]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[15]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[14]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[13]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[12]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[11]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[10]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[9]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[8]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[7]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[6]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[5]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[4]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[3]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[2]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[1]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("la_oenb[0]") {
- direction : input;
- capacitance : 0.0000;
- }
- }
- bus("wbs_adr_i") {
- bus_type : wbs_adr_i;
- direction : input;
- capacitance : 0.0000;
- pin("wbs_adr_i[31]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[30]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[29]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[28]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[27]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[26]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[25]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[24]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[23]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[22]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[21]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[20]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[19]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[18]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[17]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[16]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[15]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[14]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[13]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[12]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[11]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[10]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[9]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[8]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[7]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[6]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[5]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[4]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[3]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[2]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[1]") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wbs_adr_i[0]") {
- direction : input;
- capacitance : 0.0000;
- }
- }
- bus("wbs_dat_i") {
- bus_type : wbs_dat_i;
- direction : input;
- capacitance : 0.0000;
- pin("wbs_dat_i[31]") {
- direction : input;
- capacitance : 0.0172;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.93146");
- }
- fall_constraint(scalar) {
- values("-0.90149");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.65074");
- }
- fall_constraint(scalar) {
- values("1.75493");
- }
- }
- }
- pin("wbs_dat_i[30]") {
- direction : input;
- capacitance : 0.0199;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.08196");
- }
- fall_constraint(scalar) {
- values("-1.03506");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.82736");
- }
- fall_constraint(scalar) {
- values("1.89398");
- }
- }
- }
- pin("wbs_dat_i[29]") {
- direction : input;
- capacitance : 0.0167;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.20834");
- }
- fall_constraint(scalar) {
- values("-1.35488");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.97613");
- }
- fall_constraint(scalar) {
- values("2.33629");
- }
- }
- }
- pin("wbs_dat_i[28]") {
- direction : input;
- capacitance : 0.0172;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.28188");
- }
- fall_constraint(scalar) {
- values("-1.42492");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.08430");
- }
- fall_constraint(scalar) {
- values("2.43140");
- }
- }
- }
- pin("wbs_dat_i[27]") {
- direction : input;
- capacitance : 0.0160;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.94985");
- }
- fall_constraint(scalar) {
- values("-1.06889");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.61174");
- }
- fall_constraint(scalar) {
- values("1.83852");
- }
- }
- }
- pin("wbs_dat_i[26]") {
- direction : input;
- capacitance : 0.0200;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.24400");
- }
- fall_constraint(scalar) {
- values("-1.39117");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.00527");
- }
- fall_constraint(scalar) {
- values("2.40003");
- }
- }
- }
- pin("wbs_dat_i[25]") {
- direction : input;
- capacitance : 0.0143;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.15316");
- }
- fall_constraint(scalar) {
- values("-1.26716");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.85380");
- }
- fall_constraint(scalar) {
- values("2.08109");
- }
- }
- }
- pin("wbs_dat_i[24]") {
- direction : input;
- capacitance : 0.0137;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.02165");
- }
- fall_constraint(scalar) {
- values("-1.19863");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.73553");
- }
- fall_constraint(scalar) {
- values("2.20229");
- }
- }
- }
- pin("wbs_dat_i[23]") {
- direction : input;
- capacitance : 0.0148;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.23136");
- }
- fall_constraint(scalar) {
- values("-1.37311");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.00775");
- }
- fall_constraint(scalar) {
- values("2.35058");
- }
- }
- }
- pin("wbs_dat_i[22]") {
- direction : input;
- capacitance : 0.0133;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.15368");
- }
- fall_constraint(scalar) {
- values("-1.30535");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.90730");
- }
- fall_constraint(scalar) {
- values("2.29452");
- }
- }
- }
- pin("wbs_dat_i[21]") {
- direction : input;
- capacitance : 0.0118;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.18568");
- }
- fall_constraint(scalar) {
- values("-1.11948");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.95116");
- }
- fall_constraint(scalar) {
- values("1.97912");
- }
- }
- }
- pin("wbs_dat_i[20]") {
- direction : input;
- capacitance : 0.0130;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.02376");
- }
- fall_constraint(scalar) {
- values("-1.18928");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.73991");
- }
- fall_constraint(scalar) {
- values("2.17597");
- }
- }
- }
- pin("wbs_dat_i[19]") {
- direction : input;
- capacitance : 0.0132;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.97356");
- }
- fall_constraint(scalar) {
- values("-1.10582");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.64590");
- }
- fall_constraint(scalar) {
- values("1.90362");
- }
- }
- }
- pin("wbs_dat_i[18]") {
- direction : input;
- capacitance : 0.0113;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.13763");
- }
- fall_constraint(scalar) {
- values("-1.28859");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.92011");
- }
- fall_constraint(scalar) {
- values("2.28980");
- }
- }
- }
- pin("wbs_dat_i[17]") {
- direction : input;
- capacitance : 0.0118;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.13133");
- }
- fall_constraint(scalar) {
- values("-1.25113");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.84312");
- }
- fall_constraint(scalar) {
- values("2.05345");
- }
- }
- }
- pin("wbs_dat_i[16]") {
- direction : input;
- capacitance : 0.0083;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.07210");
- }
- fall_constraint(scalar) {
- values("-1.25496");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.79812");
- }
- fall_constraint(scalar) {
- values("2.25610");
- }
- }
- }
- pin("wbs_dat_i[15]") {
- direction : input;
- capacitance : 0.0094;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.78679");
- }
- fall_constraint(scalar) {
- values("-0.96019");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.49121");
- }
- fall_constraint(scalar) {
- values("1.86713");
- }
- }
- }
- pin("wbs_dat_i[14]") {
- direction : input;
- capacitance : 0.0095;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.80273");
- }
- fall_constraint(scalar) {
- values("-0.92774");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.52258");
- }
- fall_constraint(scalar) {
- values("1.65787");
- }
- }
- }
- pin("wbs_dat_i[13]") {
- direction : input;
- capacitance : 0.0074;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.84996");
- }
- fall_constraint(scalar) {
- values("-1.03175");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.57107");
- }
- fall_constraint(scalar) {
- values("1.97919");
- }
- }
- }
- pin("wbs_dat_i[12]") {
- direction : input;
- capacitance : 0.0083;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.96194");
- }
- fall_constraint(scalar) {
- values("-1.15242");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.69347");
- }
- fall_constraint(scalar) {
- values("2.15868");
- }
- }
- }
- pin("wbs_dat_i[11]") {
- direction : input;
- capacitance : 0.0089;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.92007");
- }
- fall_constraint(scalar) {
- values("-1.10485");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.62352");
- }
- fall_constraint(scalar) {
- values("2.08951");
- }
- }
- }
- pin("wbs_dat_i[10]") {
- direction : input;
- capacitance : 0.0084;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.78973");
- }
- fall_constraint(scalar) {
- values("-0.98168");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.50771");
- }
- fall_constraint(scalar) {
- values("1.94206");
- }
- }
- }
- pin("wbs_dat_i[9]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.87515");
- }
- fall_constraint(scalar) {
- values("-0.83676");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.62106");
- }
- fall_constraint(scalar) {
- values("1.62416");
- }
- }
- }
- pin("wbs_dat_i[8]") {
- direction : input;
- capacitance : 0.0067;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.94292");
- }
- fall_constraint(scalar) {
- values("-1.17725");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.64758");
- }
- fall_constraint(scalar) {
- values("2.24392");
- }
- }
- }
- pin("wbs_dat_i[7]") {
- direction : input;
- capacitance : 0.0071;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.99792");
- }
- fall_constraint(scalar) {
- values("-1.21804");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.74271");
- }
- fall_constraint(scalar) {
- values("2.27019");
- }
- }
- }
- pin("wbs_dat_i[6]") {
- direction : input;
- capacitance : 0.0080;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.12366");
- }
- fall_constraint(scalar) {
- values("-1.35596");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.88969");
- }
- fall_constraint(scalar) {
- values("2.48052");
- }
- }
- }
- pin("wbs_dat_i[5]") {
- direction : input;
- capacitance : 0.0078;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.05744");
- }
- fall_constraint(scalar) {
- values("-1.27016");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.82491");
- }
- fall_constraint(scalar) {
- values("2.32565");
- }
- }
- }
- pin("wbs_dat_i[4]") {
- direction : input;
- capacitance : 0.0083;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.70465");
- }
- fall_constraint(scalar) {
- values("-0.89059");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.44749");
- }
- fall_constraint(scalar) {
- values("1.85391");
- }
- }
- }
- pin("wbs_dat_i[3]") {
- direction : input;
- capacitance : 0.0080;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.36958");
- }
- fall_constraint(scalar) {
- values("-1.34607");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.11673");
- }
- fall_constraint(scalar) {
- values("2.36612");
- }
- }
- }
- pin("wbs_dat_i[2]") {
- direction : input;
- capacitance : 0.0086;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.31315");
- }
- fall_constraint(scalar) {
- values("-1.20279");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.04106");
- }
- fall_constraint(scalar) {
- values("2.07372");
- }
- }
- }
- pin("wbs_dat_i[1]") {
- direction : input;
- capacitance : 0.0079;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.28590");
- }
- fall_constraint(scalar) {
- values("-1.23748");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("2.01098");
- }
- fall_constraint(scalar) {
- values("2.15975");
- }
- }
- }
- pin("wbs_dat_i[0]") {
- direction : input;
- capacitance : 0.0070;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-0.98352");
- }
- fall_constraint(scalar) {
- values("-0.92121");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("1.60618");
- }
- fall_constraint(scalar) {
- values("1.65166");
- }
- }
- }
- }
- bus("wbs_dat_o") {
- bus_type : wbs_dat_o;
- direction : output;
- capacitance : 0.0000;
- pin("wbs_dat_o[31]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_253) {
- values("2.32687,2.35105,2.41420,2.51738,2.67480,2.89747,3.19202,3.56315,4.01727,4.55839");
- }
- rise_transition(template_253) {
- values("0.08512,0.11024,0.18927,0.35469,0.63113,1.02812,1.55312,2.21388,3.02100,3.98512");
- }
- cell_fall(template_254) {
- values("2.12797,2.15238,2.22119,2.33512,2.50579,2.74491,3.05990,3.45680,3.94269,4.52180");
- }
- fall_transition(template_254) {
- values("0.07204,0.09973,0.18764,0.35577,0.63291,1.03200,1.55900,2.22569,3.03790,4.01010");
- }
- }
- }
- pin("wbs_dat_o[30]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_251) {
- values("2.25150,2.27506,2.33753,2.44091,2.59868,2.82156,3.11597,3.48744,3.94190,4.48337");
- }
- rise_transition(template_251) {
- values("0.08151,0.10620,0.18671,0.35356,0.63092,1.02847,1.55347,2.21353,3.02100,3.98547");
- }
- cell_fall(template_252) {
- values("2.07582,2.10014,2.16894,2.28295,2.45383,2.69307,3.00806,3.40520,3.89120,4.47020");
- }
- fall_transition(template_252) {
- values("0.07055,0.09829,0.18659,0.35520,0.63279,1.03200,1.55900,2.22586,3.03827,4.01000");
- }
- }
- }
- pin("wbs_dat_o[29]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_247) {
- values("2.25377,2.27733,2.33979,2.44317,2.60094,2.82382,3.11823,3.48970,3.94417,4.48564");
- }
- rise_transition(template_247) {
- values("0.08147,0.10615,0.18668,0.35355,0.63092,1.02847,1.55347,2.21353,3.02100,3.98547");
- }
- cell_fall(template_248) {
- values("2.07854,2.10287,2.17167,2.28568,2.45656,2.69581,3.01079,3.40793,3.89393,4.47293");
- }
- fall_transition(template_248) {
- values("0.07054,0.09828,0.18659,0.35520,0.63279,1.03200,1.55900,2.22586,3.03828,4.01000");
- }
- }
- }
- pin("wbs_dat_o[28]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_245) {
- values("3.05629,3.08460,3.15492,3.26123,3.41725,3.63726,3.92941,4.29856,4.75148,5.29170");
- }
- rise_transition(template_245) {
- values("0.11275,0.13961,0.21666,0.36929,0.63770,1.03000,1.55407,2.21221,3.02186,3.97950");
- }
- cell_fall(template_246) {
- values("2.65492,2.68139,2.75287,2.86807,3.03724,3.27535,3.58890,3.98490,4.46990,5.04776");
- }
- fall_transition(template_246) {
- values("0.09066,0.11880,0.20423,0.36550,0.63625,1.03271,1.55900,2.22442,3.03486,4.00459");
- }
- }
- }
- pin("wbs_dat_o[27]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_243) {
- values("2.72129,2.74722,2.81411,2.91805,3.07433,3.29566,3.58852,3.95942,4.41147,4.95432");
- }
- rise_transition(template_243) {
- values("0.09977,0.12493,0.20259,0.36050,0.63401,1.03000,1.55495,2.21485,3.02010,3.98565");
- }
- cell_fall(template_244) {
- values("2.41992,2.44536,2.51514,2.62938,2.79896,3.03735,3.35219,3.74819,4.23319,4.81311");
- }
- fall_transition(template_244) {
- values("0.08155,0.10930,0.19528,0.36003,0.63400,1.03203,1.55900,2.22306,3.03691,4.01074");
- }
- }
- }
- pin("wbs_dat_o[26]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_241) {
- values("3.26128,3.29066,3.36339,3.47096,3.62738,3.84747,4.13915,4.50815,4.96039,5.50077");
- }
- rise_transition(template_241) {
- values("0.11968,0.14737,0.22467,0.37527,0.64167,1.03191,1.55400,2.21238,3.02238,3.98015");
- }
- cell_fall(template_242) {
- values("2.80132,2.82842,2.90104,3.01695,3.18604,3.42392,3.73681,4.13281,4.61770,5.19470");
- }
- fall_transition(template_242) {
- values("0.09619,0.12472,0.20981,0.36959,0.63808,1.03333,1.55911,2.22489,3.03411,4.00233");
- }
- }
- }
- pin("wbs_dat_o[25]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_239) {
- values("2.13622,2.15884,2.22026,2.32396,2.48225,2.70544,2.99964,3.37163,3.82662,4.36861");
- }
- rise_transition(template_239) {
- values("0.07598,0.10001,0.18279,0.35184,0.63061,1.02899,1.55399,2.21301,3.02100,3.98599");
- }
- cell_fall(template_240) {
- values("1.99299,2.01741,2.08652,2.20090,2.37206,2.61143,2.92637,3.32397,3.80997,4.38897");
- }
- fall_transition(template_240) {
- values("0.06913,0.09707,0.18591,0.35488,0.63274,1.03200,1.55900,2.22541,3.03919,4.01000");
- }
- }
- }
- pin("wbs_dat_o[24]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_237) {
- values("2.88506,2.91203,2.98043,3.08540,3.24157,3.46232,3.75487,4.12500,4.57744,5.11913");
- }
- rise_transition(template_237) {
- values("0.10546,0.13137,0.20876,0.36435,0.63563,1.03000,1.55456,2.21369,3.02087,3.98295");
- }
- cell_fall(template_238) {
- values("2.54070,2.56660,2.63712,2.75179,2.92119,3.15946,3.47373,3.86973,4.35473,4.93373");
- }
- fall_transition(template_238) {
- values("0.08559,0.11351,0.19925,0.36245,0.63499,1.03233,1.55900,2.22366,3.03600,4.00801");
- }
- }
- }
- pin("wbs_dat_o[23]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_235) {
- values("2.15230,2.17510,2.23673,2.34036,2.49855,2.72168,3.01593,3.38781,3.84270,4.38458");
- }
- rise_transition(template_235) {
- values("0.07706,0.10122,0.18355,0.35218,0.63067,1.02889,1.55389,2.21311,3.02100,3.98589");
- }
- cell_fall(template_236) {
- values("2.00315,2.02755,2.09660,2.21090,2.38200,2.62136,2.93630,3.33381,3.81981,4.39881");
- }
- fall_transition(template_236) {
- values("0.06941,0.09731,0.18605,0.35495,0.63275,1.03200,1.55900,2.22550,3.03901,4.01000");
- }
- }
- }
- pin("wbs_dat_o[22]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_233) {
- values("2.09371,2.11628,2.17783,2.28181,2.44035,2.66366,2.95838,3.33038,3.78498,4.32698");
- }
- rise_transition(template_233) {
- values("0.07458,0.09914,0.18219,0.35156,0.63064,1.02900,1.55361,2.21418,3.02218,3.98639");
- }
- cell_fall(template_234) {
- values("1.96904,1.99350,2.06278,2.17733,2.34863,2.58807,2.90299,3.30081,3.78681,4.36581");
- }
- fall_transition(template_234) {
- values("0.06842,0.09646,0.18557,0.35473,0.63272,1.03200,1.55900,2.22518,3.03964,4.01000");
- }
- }
- }
- pin("wbs_dat_o[21]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_231) {
- values("2.96557,2.99323,3.06262,3.16829,3.32438,3.54474,3.83709,4.20671,4.65940,5.20033");
- }
- rise_transition(template_231) {
- values("0.10922,0.13562,0.21284,0.36690,0.63670,1.03000,1.55431,2.21293,3.02138,3.98117");
- }
- cell_fall(template_232) {
- values("2.59183,2.61803,2.68906,2.80400,2.97328,3.21147,3.52536,3.92136,4.40636,4.98476");
- }
- fall_transition(template_232) {
- values("0.08826,0.11629,0.20187,0.36406,0.63566,1.03253,1.55900,2.22406,3.03540,4.00621");
- }
- }
- }
- pin("wbs_dat_o[20]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_229) {
- values("2.89651,2.92362,2.99221,3.09732,3.25347,3.47415,3.76666,4.13669,4.58917,5.13072");
- }
- rise_transition(template_229) {
- values("0.10619,0.13219,0.20955,0.36484,0.63583,1.03000,1.55452,2.21355,3.02097,3.98261");
- }
- cell_fall(template_230) {
- values("2.54617,2.57213,2.64276,2.75748,2.92685,3.16510,3.47930,3.87530,4.36030,4.93919");
- }
- fall_transition(template_230) {
- values("0.08610,0.11405,0.19975,0.36276,0.63512,1.03237,1.55900,2.22374,3.03589,4.00767");
- }
- }
- }
- pin("wbs_dat_o[19]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_225) {
- values("2.72109,2.74695,2.81373,2.91759,3.07389,3.29525,3.58813,3.95909,4.41111,4.95405");
- }
- rise_transition(template_225) {
- values("0.09937,0.12447,0.20215,0.36022,0.63389,1.03000,1.55498,2.21493,3.02004,3.98585");
- }
- cell_fall(template_226) {
- values("2.42310,2.44851,2.51823,2.63244,2.80203,3.04043,3.35532,3.75132,4.23632,4.81629");
- }
- fall_transition(template_226) {
- values("0.08126,0.10900,0.19500,0.35986,0.63392,1.03201,1.55900,2.22301,3.03698,4.01093");
- }
- }
- }
- pin("wbs_dat_o[18]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_223) {
- values("2.70651,2.73229,2.79893,2.90272,3.05904,3.28046,3.57339,3.94439,4.39642,4.93939");
- }
- rise_transition(template_223) {
- values("0.09884,0.12390,0.20161,0.35992,0.63376,1.02997,1.55497,2.21498,3.02002,3.98598");
- }
- cell_fall(template_224) {
- values("2.41219,2.43756,2.50723,2.62143,2.79106,3.02948,3.34438,3.74041,4.22543,4.80541");
- }
- fall_transition(template_224) {
- values("0.08090,0.10863,0.19469,0.35968,0.63387,1.03200,1.55900,2.22308,3.03703,4.01097");
- }
- }
- }
- pin("wbs_dat_o[17]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_221) {
- values("2.95212,2.97963,3.04879,3.15430,3.31041,3.53086,3.82326,4.19299,4.64562,5.18673");
- }
- rise_transition(template_221) {
- values("0.10837,0.13466,0.21192,0.36632,0.63646,1.03000,1.55437,2.21310,3.02127,3.98157");
- }
- cell_fall(template_222) {
- values("2.58497,2.61110,2.68202,2.79690,2.96621,3.20441,3.51839,3.91439,4.39939,4.97793");
- }
- fall_transition(template_222) {
- values("0.08765,0.11567,0.20128,0.36369,0.63551,1.03249,1.55900,2.22397,3.03554,4.00662");
- }
- }
- }
- pin("wbs_dat_o[16]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_219) {
- values("2.62649,2.65205,2.71818,2.82186,2.97833,3.19994,3.49313,3.86413,4.31648,4.85913");
- }
- rise_transition(template_219) {
- values("0.09685,0.12195,0.19979,0.35915,0.63335,1.02965,1.55465,2.21483,3.02017,3.98583");
- }
- cell_fall(template_220) {
- values("2.34603,2.37126,2.44081,2.55496,2.72475,2.96327,3.27818,3.67434,4.15949,4.73934");
- }
- fall_transition(template_220) {
- values("0.07959,0.10732,0.19365,0.35911,0.63373,1.03200,1.55900,2.22346,3.03715,4.01085");
- }
- }
- }
- pin("wbs_dat_o[15]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_217) {
- values("2.29850,2.32209,2.38460,2.48797,2.64572,2.86858,3.16301,3.53445,3.98890,4.53034");
- }
- rise_transition(template_217) {
- values("0.08171,0.10643,0.18686,0.35363,0.63093,1.02845,1.55345,2.21355,3.02100,3.98545");
- }
- cell_fall(template_218) {
- values("2.12240,2.14673,2.21551,2.32951,2.50038,2.73962,3.05460,3.45172,3.93772,4.51672");
- }
- fall_transition(template_218) {
- values("0.07060,0.09834,0.18662,0.35522,0.63279,1.03200,1.55900,2.22588,3.03824,4.01000");
- }
- }
- }
- pin("wbs_dat_o[14]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_215) {
- values("2.33294,2.35684,2.41968,2.52294,2.68053,2.90329,3.19778,3.56906,4.02334,4.56463");
- }
- rise_transition(template_215) {
- values("0.08345,0.10837,0.18809,0.35417,0.63103,1.02828,1.55328,2.21372,3.02100,3.98528");
- }
- cell_fall(template_216) {
- values("2.14588,2.17020,2.23891,2.35282,2.52360,2.76279,3.07779,3.47477,3.96076,4.53977");
- }
- fall_transition(template_216) {
- values("0.07113,0.09881,0.18692,0.35537,0.63282,1.03200,1.55900,2.22596,3.03799,4.01002");
- }
- }
- }
- pin("wbs_dat_o[13]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_213) {
- values("2.31788,2.34196,2.40499,2.50820,2.66568,2.88839,3.18292,3.55410,4.00828,4.54947");
- }
- rise_transition(template_213) {
- values("0.08449,0.10954,0.18883,0.35450,0.63109,1.02818,1.55318,2.21382,3.02100,3.98518");
- }
- cell_fall(template_214) {
- values("2.12347,2.14785,2.21662,2.33055,2.50126,2.74040,3.05540,3.45232,3.93825,4.51732");
- }
- fall_transition(template_214) {
- values("0.07170,0.09939,0.18738,0.35562,0.63288,1.03200,1.55900,2.22579,3.03793,4.01007");
- }
- }
- }
- pin("wbs_dat_o[12]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_211) {
- values("2.36142,2.38583,2.44926,2.55237,2.70966,2.93225,3.22683,3.59783,4.05181,4.59283");
- }
- rise_transition(template_211) {
- values("0.08654,0.11181,0.19031,0.35515,0.63122,1.02802,1.55302,2.21401,3.02099,3.98501");
- }
- cell_fall(template_212) {
- values("2.15280,2.17730,2.24618,2.36014,2.53072,2.76977,3.08475,3.48157,3.96739,4.54657");
- }
- fall_transition(template_212) {
- values("0.07283,0.10052,0.18827,0.35612,0.63300,1.03200,1.55900,2.22546,3.03782,4.01018");
- }
- }
- }
- pin("wbs_dat_o[11]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_209) {
- values("2.32155,2.34568,2.40878,2.51197,2.66942,2.89211,3.18665,3.55780,4.01195,4.55310");
- }
- rise_transition(template_209) {
- values("0.08485,0.10994,0.18908,0.35461,0.63111,1.02815,1.55315,2.21385,3.02100,3.98515");
- }
- cell_fall(template_210) {
- values("2.12445,2.14885,2.21764,2.33157,2.50226,2.74139,3.05638,3.45329,3.93920,4.51829");
- }
- fall_transition(template_210) {
- values("0.07190,0.09958,0.18753,0.35570,0.63290,1.03200,1.55900,2.22573,3.03791,4.01009");
- }
- }
- }
- pin("wbs_dat_o[10]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_207) {
- values("2.28334,2.30695,2.36947,2.47284,2.63058,2.85344,3.14786,3.51930,3.97374,4.51518");
- }
- rise_transition(template_207) {
- values("0.08177,0.10650,0.18690,0.35365,0.63094,1.02844,1.55344,2.21356,3.02100,3.98544");
- }
- cell_fall(template_208) {
- values("2.10683,2.13116,2.19994,2.31393,2.48480,2.72403,3.03902,3.43614,3.92214,4.50114");
- }
- fall_transition(template_208) {
- values("0.07062,0.09835,0.18663,0.35522,0.63279,1.03200,1.55900,2.22588,3.03823,4.01000");
- }
- }
- }
- pin("wbs_dat_o[9]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_267) {
- values("2.24297,2.26615,2.32820,2.43171,2.58968,2.81269,3.10702,3.47869,3.93337,4.47505");
- }
- rise_transition(template_267) {
- values("0.07928,0.10371,0.18513,0.35287,0.63079,1.02868,1.55368,2.21332,3.02100,3.98568");
- }
- cell_fall(template_268) {
- values("2.08082,2.10518,2.17411,2.28827,2.45926,2.69855,3.01352,3.41084,3.89684,4.47584");
- }
- fall_transition(template_268) {
- values("0.06998,0.09780,0.18632,0.35508,0.63277,1.03200,1.55900,2.22568,3.03864,4.01000");
- }
- }
- }
- pin("wbs_dat_o[8]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_265) {
- values("2.29423,2.31798,2.38064,2.48396,2.64163,2.86445,3.15890,3.53027,3.98463,4.52600");
- }
- rise_transition(template_265) {
- values("0.08255,0.10737,0.18745,0.35389,0.63098,1.02837,1.55337,2.21363,3.02100,3.98537");
- }
- cell_fall(template_266) {
- values("2.11248,2.13679,2.20553,2.31947,2.49030,2.72951,3.04451,3.44156,3.92756,4.50656");
- }
- fall_transition(template_266) {
- values("0.07082,0.09852,0.18672,0.35526,0.63279,1.03200,1.55900,2.22595,3.03810,4.01000");
- }
- }
- }
- pin("wbs_dat_o[7]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_263) {
- values("2.30059,2.32436,2.38707,2.49038,2.64803,2.87083,3.16530,3.53664,3.99099,4.53234");
- }
- rise_transition(template_263) {
- values("0.08276,0.10760,0.18760,0.35396,0.63099,1.02835,1.55335,2.21365,3.02100,3.98535");
- }
- cell_fall(template_264) {
- values("2.11780,2.14210,2.21083,2.32475,2.49557,2.73478,3.04978,3.44681,3.93281,4.51181");
- }
- fall_transition(template_264) {
- values("0.07087,0.09857,0.18675,0.35528,0.63280,1.03200,1.55900,2.22597,3.03807,4.01000");
- }
- }
- }
- pin("wbs_dat_o[6]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_261) {
- values("2.26478,2.28813,2.35036,2.45381,2.61170,2.83465,3.12901,3.50060,3.95518,4.49677");
- }
- rise_transition(template_261) {
- values("0.08023,0.10478,0.18581,0.35317,0.63085,1.02859,1.55359,2.21341,3.02100,3.98559");
- }
- cell_fall(template_262) {
- values("2.09699,2.12134,2.19020,2.30430,2.47524,2.71452,3.02949,3.42674,3.91274,4.49174");
- }
- fall_transition(template_262) {
- values("0.07022,0.09801,0.18644,0.35513,0.63278,1.03200,1.55900,2.22576,3.03849,4.01000");
- }
- }
- }
- pin("wbs_dat_o[5]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_259) {
- values("2.19114,2.21392,2.27552,2.37916,2.53736,2.76050,3.05474,3.42664,3.88154,4.42344");
- }
- rise_transition(template_259) {
- values("0.07692,0.10106,0.18345,0.35213,0.63066,1.02890,1.55390,2.21310,3.02100,3.98590");
- }
- cell_fall(template_260) {
- values("2.04274,2.06714,2.13621,2.25052,2.42163,2.66098,2.97593,3.37345,3.85945,4.43845");
- }
- fall_transition(template_260) {
- values("0.06937,0.09728,0.18603,0.35494,0.63275,1.03200,1.55900,2.22548,3.03903,4.01000");
- }
- }
- }
- pin("wbs_dat_o[4]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_257) {
- values("2.14432,2.16690,2.22837,2.33220,2.49061,2.71386,3.00829,3.38029,3.83511,4.37711");
- }
- rise_transition(template_257) {
- values("0.07528,0.09954,0.18247,0.35169,0.63062,1.02900,1.55382,2.21354,3.02154,3.98618");
- }
- cell_fall(template_258) {
- values("2.00959,2.03403,2.10322,2.21768,2.38890,2.62832,2.94325,3.34095,3.82695,4.40595");
- }
- fall_transition(template_258) {
- values("0.06879,0.09678,0.18575,0.35481,0.63273,1.03200,1.55900,2.22530,3.03940,4.01000");
- }
- }
- }
- pin("wbs_dat_o[3]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_255) {
- values("2.08878,2.11134,2.17290,2.27688,2.43543,2.65875,2.95348,3.32548,3.78007,4.32207");
- }
- rise_transition(template_255) {
- values("0.07454,0.09912,0.18217,0.35156,0.63064,1.02900,1.55359,2.21422,3.02222,3.98641");
- }
- cell_fall(template_256) {
- values("1.96419,1.98866,2.05794,2.17250,2.34379,2.58324,2.89816,3.29599,3.78199,4.36099");
- }
- fall_transition(template_256) {
- values("0.06840,0.09644,0.18556,0.35472,0.63272,1.03200,1.55900,2.22517,3.03965,4.01000");
- }
- }
- }
- pin("wbs_dat_o[2]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_249) {
- values("2.11953,2.14210,2.20363,2.30756,2.46606,2.68936,2.98399,3.35599,3.81066,4.35266");
- }
- rise_transition(template_249) {
- values("0.07478,0.09926,0.18227,0.35160,0.63063,1.02900,1.55367,2.21399,3.02199,3.98633");
- }
- cell_fall(template_250) {
- values("1.99147,2.01593,2.08518,2.19970,2.37097,2.61041,2.92533,3.32312,3.80912,4.38812");
- }
- fall_transition(template_250) {
- values("0.06853,0.09656,0.18562,0.35475,0.63272,1.03200,1.55900,2.22521,3.03957,4.01000");
- }
- }
- }
- pin("wbs_dat_o[1]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_227) {
- values("2.12196,2.14453,2.20606,2.30998,2.46848,2.69177,2.98639,3.35839,3.81307,4.35507");
- }
- rise_transition(template_227) {
- values("0.07481,0.09927,0.18228,0.35161,0.63063,1.02900,1.55368,2.21397,3.02197,3.98632");
- }
- cell_fall(template_228) {
- values("1.99376,2.01821,2.08746,2.20199,2.37326,2.61269,2.92761,3.32539,3.81139,4.39039");
- }
- fall_transition(template_228) {
- values("0.06854,0.09657,0.18563,0.35475,0.63272,1.03200,1.55900,2.22522,3.03956,4.01000");
- }
- }
- }
- pin("wbs_dat_o[0]") {
- direction : output;
- capacitance : 0.0729;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : rising_edge;
- cell_rise(template_205) {
- values("2.43565,2.46023,2.52404,2.62723,2.78441,3.00686,3.30124,3.67224,4.12599,4.66724");
- }
- rise_transition(template_205) {
- values("0.08800,0.11326,0.19166,0.35571,0.63153,1.02825,1.55325,2.21413,3.02087,3.98513");
- }
- cell_fall(template_206) {
- values("2.21723,2.24183,2.31080,2.42478,2.59526,2.83424,3.14921,3.54594,4.03167,4.61094");
- }
- fall_transition(template_206) {
- values("0.07376,0.10145,0.18901,0.35653,0.63310,1.03200,1.55900,2.22518,3.03773,4.01027");
- }
- }
- }
- }
- bus("wbs_sel_i") {
- bus_type : wbs_sel_i;
- direction : input;
- capacitance : 0.0000;
- pin("wbs_sel_i[3]") {
- direction : input;
- capacitance : 0.0085;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.80488");
- }
- fall_constraint(scalar) {
- values("-2.63702");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("4.53962");
- }
- fall_constraint(scalar) {
- values("4.57922");
- }
- }
- }
- pin("wbs_sel_i[2]") {
- direction : input;
- capacitance : 0.0103;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.40377");
- }
- fall_constraint(scalar) {
- values("-2.24496");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("4.58613");
- }
- fall_constraint(scalar) {
- values("4.28181");
- }
- }
- }
- pin("wbs_sel_i[1]") {
- direction : input;
- capacitance : 0.0072;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-2.03774");
- }
- fall_constraint(scalar) {
- values("-2.08050");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("4.86168");
- }
- fall_constraint(scalar) {
- values("4.38576");
- }
- }
- }
- pin("wbs_sel_i[0]") {
- direction : input;
- capacitance : 0.0077;
- timing() {
- related_pin : "wb_clk_i";
- timing_type : hold_rising;
- rise_constraint(scalar) {
- values("-1.82035");
- }
- fall_constraint(scalar) {
- values("-1.77441");
- }
- }
- timing() {
- related_pin : "wb_clk_i";
- timing_type : setup_rising;
- rise_constraint(scalar) {
- values("4.18758");
- }
- fall_constraint(scalar) {
- values("3.99898");
- }
- }
- }
- }
- }
-
-}
diff --git a/lib/user_project_wrapper.lib b/lib/user_project_wrapper.lib
deleted file mode 100644
index bda7752..0000000
--- a/lib/user_project_wrapper.lib
+++ /dev/null
@@ -1,1836 +0,0 @@
-library (user_project_wrapper) {
- comment : "";
- delay_model : table_lookup;
- simulation : false;
- capacitive_load_unit (1,pF);
- leakage_power_unit : 1pW;
- current_unit : "1A";
- pulling_resistance_unit : "1ohm";
- time_unit : "1ns";
- voltage_unit : "1v";
- library_features(report_delay_calculation);
-
- input_threshold_pct_rise : 50;
- input_threshold_pct_fall : 50;
- output_threshold_pct_rise : 50;
- output_threshold_pct_fall : 50;
- slew_lower_threshold_pct_rise : 30;
- slew_lower_threshold_pct_fall : 30;
- slew_upper_threshold_pct_rise : 70;
- slew_upper_threshold_pct_fall : 70;
- slew_derate_from_library : 1.0;
-
-
- nom_process : 1.0;
- nom_temperature : 25.0;
- nom_voltage : 5.00;
-
- type ("io_in") {
- base_type : array;
- data_type : bit;
- bit_width : 38;
- bit_from : 37;
- bit_to : 0;
- }
- type ("io_oeb") {
- base_type : array;
- data_type : bit;
- bit_width : 38;
- bit_from : 37;
- bit_to : 0;
- }
- type ("io_out") {
- base_type : array;
- data_type : bit;
- bit_width : 38;
- bit_from : 37;
- bit_to : 0;
- }
- type ("la_data_in") {
- base_type : array;
- data_type : bit;
- bit_width : 64;
- bit_from : 63;
- bit_to : 0;
- }
- type ("la_data_out") {
- base_type : array;
- data_type : bit;
- bit_width : 64;
- bit_from : 63;
- bit_to : 0;
- }
- type ("la_oenb") {
- base_type : array;
- data_type : bit;
- bit_width : 64;
- bit_from : 63;
- bit_to : 0;
- }
- type ("user_irq") {
- base_type : array;
- data_type : bit;
- bit_width : 3;
- bit_from : 2;
- bit_to : 0;
- }
- type ("wbs_adr_i") {
- base_type : array;
- data_type : bit;
- bit_width : 32;
- bit_from : 31;
- bit_to : 0;
- }
- type ("wbs_dat_i") {
- base_type : array;
- data_type : bit;
- bit_width : 32;
- bit_from : 31;
- bit_to : 0;
- }
- type ("wbs_dat_o") {
- base_type : array;
- data_type : bit;
- bit_width : 32;
- bit_from : 31;
- bit_to : 0;
- }
- type ("wbs_sel_i") {
- base_type : array;
- data_type : bit;
- bit_width : 4;
- bit_from : 3;
- bit_to : 0;
- }
-
- cell ("user_project_wrapper") {
- pin("user_clock2") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("wb_clk_i") {
- direction : input;
- capacitance : 0.2516;
- }
- pin("wb_rst_i") {
- direction : input;
- capacitance : 0.3106;
- }
- pin("wbs_ack_o") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_cyc_i") {
- direction : input;
- capacitance : 0.2833;
- }
- pin("wbs_stb_i") {
- direction : input;
- capacitance : 0.3521;
- }
- pin("wbs_we_i") {
- direction : input;
- capacitance : 0.4100;
- }
- pin("vss") {
- direction : input;
- capacitance : 0.0000;
- }
- pin("vdd") {
- direction : input;
- capacitance : 0.0000;
- }
- bus("io_in") {
- bus_type : io_in;
- direction : input;
- capacitance : 0.0000;
- pin("io_in[37]") {
- direction : input;
- capacitance : 0.4869;
- }
- pin("io_in[36]") {
- direction : input;
- capacitance : 0.3623;
- }
- pin("io_in[35]") {
- direction : input;
- capacitance : 0.4258;
- }
- pin("io_in[34]") {
- direction : input;
- capacitance : 0.4755;
- }
- pin("io_in[33]") {
- direction : input;
- capacitance : 0.4126;
- }
- pin("io_in[32]") {
- direction : input;
- capacitance : 0.4202;
- }
- pin("io_in[31]") {
- direction : input;
- capacitance : 0.2910;
- }
- pin("io_in[30]") {
- direction : input;
- capacitance : 0.2559;
- }
- pin("io_in[29]") {
- direction : input;
- capacitance : 0.2419;
- }
- pin("io_in[28]") {
- direction : input;
- capacitance : 0.2358;
- }
- pin("io_in[27]") {
- direction : input;
- capacitance : 0.3073;
- }
- pin("io_in[26]") {
- direction : input;
- capacitance : 0.1685;
- }
- pin("io_in[25]") {
- direction : input;
- capacitance : 0.2182;
- }
- pin("io_in[24]") {
- direction : input;
- capacitance : 0.3664;
- }
- pin("io_in[23]") {
- direction : input;
- capacitance : 0.4353;
- }
- pin("io_in[22]") {
- direction : input;
- capacitance : 0.1503;
- }
- pin("io_in[21]") {
- direction : input;
- capacitance : 0.1209;
- }
- pin("io_in[20]") {
- direction : input;
- capacitance : 0.1060;
- }
- pin("io_in[19]") {
- direction : input;
- capacitance : 0.0627;
- }
- pin("io_in[18]") {
- direction : input;
- capacitance : 0.0916;
- }
- pin("io_in[17]") {
- direction : input;
- capacitance : 0.1296;
- }
- pin("io_in[16]") {
- direction : input;
- capacitance : 0.1461;
- }
- pin("io_in[15]") {
- direction : input;
- capacitance : 0.2646;
- }
- pin("io_in[14]") {
- direction : input;
- capacitance : 0.2077;
- }
- pin("io_in[13]") {
- direction : input;
- capacitance : 0.2071;
- }
- pin("io_in[12]") {
- direction : input;
- capacitance : 0.1416;
- }
- pin("io_in[11]") {
- direction : input;
- capacitance : 0.2497;
- }
- pin("io_in[10]") {
- direction : input;
- capacitance : 0.2810;
- }
- pin("io_in[9]") {
- direction : input;
- capacitance : 0.2962;
- }
- pin("io_in[8]") {
- direction : input;
- capacitance : 0.3101;
- }
- pin("io_in[7]") {
- direction : input;
- capacitance : 0.3289;
- }
- pin("io_in[6]") {
- direction : input;
- capacitance : 0.4441;
- }
- pin("io_in[5]") {
- direction : input;
- capacitance : 0.6101;
- }
- pin("io_in[4]") {
- direction : input;
- capacitance : 0.6494;
- }
- pin("io_in[3]") {
- direction : input;
- capacitance : 0.7697;
- }
- pin("io_in[2]") {
- direction : input;
- capacitance : 0.7674;
- }
- pin("io_in[1]") {
- direction : input;
- capacitance : 0.8831;
- }
- pin("io_in[0]") {
- direction : input;
- capacitance : 0.5089;
- }
- }
- bus("io_oeb") {
- bus_type : io_oeb;
- direction : output;
- capacitance : 0.0000;
- pin("io_oeb[37]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[36]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[35]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[34]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[33]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[32]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[31]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[30]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[29]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[28]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[27]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[26]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[25]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[24]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[23]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[22]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[21]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[20]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[19]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[18]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[17]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[16]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[15]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[14]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[13]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[12]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[11]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[10]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[9]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[8]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[7]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[6]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[5]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[4]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[3]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[2]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[1]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_oeb[0]") {
- direction : output;
- capacitance : 0.0729;
- }
- }
- bus("io_out") {
- bus_type : io_out;
- direction : output;
- capacitance : 0.0000;
- pin("io_out[37]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[36]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[35]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[34]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[33]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[32]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[31]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[30]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[29]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[28]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[27]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[26]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[25]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[24]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[23]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[22]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[21]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[20]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[19]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[18]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[17]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[16]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[15]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[14]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[13]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[12]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[11]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[10]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[9]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[8]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[7]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[6]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[5]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[4]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[3]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[2]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[1]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("io_out[0]") {
- direction : output;
- capacitance : 0.0729;
- }
- }
- bus("la_data_in") {
- bus_type : la_data_in;
- direction : input;
- capacitance : 0.0000;
- pin("la_data_in[63]") {
- direction : input;
- capacitance : 0.2832;
- }
- pin("la_data_in[62]") {
- direction : input;
- capacitance : 0.2187;
- }
- pin("la_data_in[61]") {
- direction : input;
- capacitance : 0.3156;
- }
- pin("la_data_in[60]") {
- direction : input;
- capacitance : 0.2466;
- }
- pin("la_data_in[59]") {
- direction : input;
- capacitance : 0.2379;
- }
- pin("la_data_in[58]") {
- direction : input;
- capacitance : 0.2251;
- }
- pin("la_data_in[57]") {
- direction : input;
- capacitance : 0.2141;
- }
- pin("la_data_in[56]") {
- direction : input;
- capacitance : 0.2358;
- }
- pin("la_data_in[55]") {
- direction : input;
- capacitance : 0.2010;
- }
- pin("la_data_in[54]") {
- direction : input;
- capacitance : 0.2550;
- }
- pin("la_data_in[53]") {
- direction : input;
- capacitance : 0.1982;
- }
- pin("la_data_in[52]") {
- direction : input;
- capacitance : 0.2794;
- }
- pin("la_data_in[51]") {
- direction : input;
- capacitance : 0.2228;
- }
- pin("la_data_in[50]") {
- direction : input;
- capacitance : 0.2192;
- }
- pin("la_data_in[49]") {
- direction : input;
- capacitance : 0.2563;
- }
- pin("la_data_in[48]") {
- direction : input;
- capacitance : 0.2282;
- }
- pin("la_data_in[47]") {
- direction : input;
- capacitance : 0.2280;
- }
- pin("la_data_in[46]") {
- direction : input;
- capacitance : 0.2790;
- }
- pin("la_data_in[45]") {
- direction : input;
- capacitance : 0.2367;
- }
- pin("la_data_in[44]") {
- direction : input;
- capacitance : 0.2138;
- }
- pin("la_data_in[43]") {
- direction : input;
- capacitance : 0.2339;
- }
- pin("la_data_in[42]") {
- direction : input;
- capacitance : 0.2404;
- }
- pin("la_data_in[41]") {
- direction : input;
- capacitance : 0.2045;
- }
- pin("la_data_in[40]") {
- direction : input;
- capacitance : 0.2017;
- }
- pin("la_data_in[39]") {
- direction : input;
- capacitance : 0.2043;
- }
- pin("la_data_in[38]") {
- direction : input;
- capacitance : 0.2233;
- }
- pin("la_data_in[37]") {
- direction : input;
- capacitance : 0.2011;
- }
- pin("la_data_in[36]") {
- direction : input;
- capacitance : 0.3020;
- }
- pin("la_data_in[35]") {
- direction : input;
- capacitance : 0.3242;
- }
- pin("la_data_in[34]") {
- direction : input;
- capacitance : 0.2109;
- }
- pin("la_data_in[33]") {
- direction : input;
- capacitance : 0.3151;
- }
- pin("la_data_in[32]") {
- direction : input;
- capacitance : 0.2417;
- }
- pin("la_data_in[31]") {
- direction : input;
- capacitance : 0.2392;
- }
- pin("la_data_in[30]") {
- direction : input;
- capacitance : 0.3778;
- }
- pin("la_data_in[29]") {
- direction : input;
- capacitance : 0.2396;
- }
- pin("la_data_in[28]") {
- direction : input;
- capacitance : 0.3629;
- }
- pin("la_data_in[27]") {
- direction : input;
- capacitance : 0.2104;
- }
- pin("la_data_in[26]") {
- direction : input;
- capacitance : 0.1530;
- }
- pin("la_data_in[25]") {
- direction : input;
- capacitance : 0.2161;
- }
- pin("la_data_in[24]") {
- direction : input;
- capacitance : 0.1508;
- }
- pin("la_data_in[23]") {
- direction : input;
- capacitance : 0.1514;
- }
- pin("la_data_in[22]") {
- direction : input;
- capacitance : 0.1497;
- }
- pin("la_data_in[21]") {
- direction : input;
- capacitance : 0.2820;
- }
- pin("la_data_in[20]") {
- direction : input;
- capacitance : 0.1498;
- }
- pin("la_data_in[19]") {
- direction : input;
- capacitance : 0.1500;
- }
- pin("la_data_in[18]") {
- direction : input;
- capacitance : 0.1518;
- }
- pin("la_data_in[17]") {
- direction : input;
- capacitance : 0.1657;
- }
- pin("la_data_in[16]") {
- direction : input;
- capacitance : 0.2948;
- }
- pin("la_data_in[15]") {
- direction : input;
- capacitance : 0.2104;
- }
- pin("la_data_in[14]") {
- direction : input;
- capacitance : 0.1762;
- }
- pin("la_data_in[13]") {
- direction : input;
- capacitance : 0.1645;
- }
- pin("la_data_in[12]") {
- direction : input;
- capacitance : 0.3041;
- }
- pin("la_data_in[11]") {
- direction : input;
- capacitance : 0.1871;
- }
- pin("la_data_in[10]") {
- direction : input;
- capacitance : 0.1861;
- }
- pin("la_data_in[9]") {
- direction : input;
- capacitance : 0.3298;
- }
- pin("la_data_in[8]") {
- direction : input;
- capacitance : 0.2897;
- }
- pin("la_data_in[7]") {
- direction : input;
- capacitance : 0.1899;
- }
- pin("la_data_in[6]") {
- direction : input;
- capacitance : 0.2000;
- }
- pin("la_data_in[5]") {
- direction : input;
- capacitance : 0.2124;
- }
- pin("la_data_in[4]") {
- direction : input;
- capacitance : 0.3067;
- }
- pin("la_data_in[3]") {
- direction : input;
- capacitance : 0.2108;
- }
- pin("la_data_in[2]") {
- direction : input;
- capacitance : 0.2711;
- }
- pin("la_data_in[1]") {
- direction : input;
- capacitance : 0.3299;
- }
- pin("la_data_in[0]") {
- direction : input;
- capacitance : 0.2354;
- }
- }
- bus("la_data_out") {
- bus_type : la_data_out;
- direction : output;
- capacitance : 0.0000;
- pin("la_data_out[63]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[62]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[61]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[60]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[59]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[58]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[57]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[56]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[55]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[54]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[53]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[52]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[51]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[50]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[49]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[48]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[47]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[46]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[45]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[44]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[43]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[42]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[41]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[40]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[39]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[38]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[37]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[36]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[35]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[34]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[33]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[32]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[31]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[30]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[29]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[28]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[27]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[26]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[25]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[24]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[23]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[22]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[21]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[20]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[19]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[18]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[17]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[16]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[15]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[14]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[13]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[12]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[11]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[10]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[9]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[8]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[7]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[6]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[5]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[4]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[3]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[2]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[1]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("la_data_out[0]") {
- direction : output;
- capacitance : 0.0729;
- }
- }
- bus("la_oenb") {
- bus_type : la_oenb;
- direction : input;
- capacitance : 0.0000;
- pin("la_oenb[63]") {
- direction : input;
- capacitance : 0.3630;
- }
- pin("la_oenb[62]") {
- direction : input;
- capacitance : 0.2374;
- }
- pin("la_oenb[61]") {
- direction : input;
- capacitance : 0.2900;
- }
- pin("la_oenb[60]") {
- direction : input;
- capacitance : 0.3339;
- }
- pin("la_oenb[59]") {
- direction : input;
- capacitance : 0.3420;
- }
- pin("la_oenb[58]") {
- direction : input;
- capacitance : 0.2476;
- }
- pin("la_oenb[57]") {
- direction : input;
- capacitance : 0.4590;
- }
- pin("la_oenb[56]") {
- direction : input;
- capacitance : 0.2787;
- }
- pin("la_oenb[55]") {
- direction : input;
- capacitance : 0.2282;
- }
- pin("la_oenb[54]") {
- direction : input;
- capacitance : 0.3493;
- }
- pin("la_oenb[53]") {
- direction : input;
- capacitance : 0.1984;
- }
- pin("la_oenb[52]") {
- direction : input;
- capacitance : 0.2178;
- }
- pin("la_oenb[51]") {
- direction : input;
- capacitance : 0.1987;
- }
- pin("la_oenb[50]") {
- direction : input;
- capacitance : 0.2601;
- }
- pin("la_oenb[49]") {
- direction : input;
- capacitance : 0.1975;
- }
- pin("la_oenb[48]") {
- direction : input;
- capacitance : 0.2355;
- }
- pin("la_oenb[47]") {
- direction : input;
- capacitance : 0.1926;
- }
- pin("la_oenb[46]") {
- direction : input;
- capacitance : 0.1935;
- }
- pin("la_oenb[45]") {
- direction : input;
- capacitance : 0.1911;
- }
- pin("la_oenb[44]") {
- direction : input;
- capacitance : 0.3265;
- }
- pin("la_oenb[43]") {
- direction : input;
- capacitance : 0.1895;
- }
- pin("la_oenb[42]") {
- direction : input;
- capacitance : 0.2055;
- }
- pin("la_oenb[41]") {
- direction : input;
- capacitance : 0.1782;
- }
- pin("la_oenb[40]") {
- direction : input;
- capacitance : 0.1770;
- }
- pin("la_oenb[39]") {
- direction : input;
- capacitance : 0.2454;
- }
- pin("la_oenb[38]") {
- direction : input;
- capacitance : 0.1799;
- }
- pin("la_oenb[37]") {
- direction : input;
- capacitance : 0.2024;
- }
- pin("la_oenb[36]") {
- direction : input;
- capacitance : 0.1814;
- }
- pin("la_oenb[35]") {
- direction : input;
- capacitance : 0.3346;
- }
- pin("la_oenb[34]") {
- direction : input;
- capacitance : 0.1883;
- }
- pin("la_oenb[33]") {
- direction : input;
- capacitance : 0.1759;
- }
- pin("la_oenb[32]") {
- direction : input;
- capacitance : 0.1651;
- }
- pin("la_oenb[31]") {
- direction : input;
- capacitance : 0.1626;
- }
- pin("la_oenb[30]") {
- direction : input;
- capacitance : 0.2418;
- }
- pin("la_oenb[29]") {
- direction : input;
- capacitance : 0.1639;
- }
- pin("la_oenb[28]") {
- direction : input;
- capacitance : 0.2877;
- }
- pin("la_oenb[27]") {
- direction : input;
- capacitance : 0.1671;
- }
- pin("la_oenb[26]") {
- direction : input;
- capacitance : 0.2912;
- }
- pin("la_oenb[25]") {
- direction : input;
- capacitance : 0.1612;
- }
- pin("la_oenb[24]") {
- direction : input;
- capacitance : 0.1553;
- }
- pin("la_oenb[23]") {
- direction : input;
- capacitance : 0.1489;
- }
- pin("la_oenb[22]") {
- direction : input;
- capacitance : 0.1507;
- }
- pin("la_oenb[21]") {
- direction : input;
- capacitance : 0.1490;
- }
- pin("la_oenb[20]") {
- direction : input;
- capacitance : 0.1481;
- }
- pin("la_oenb[19]") {
- direction : input;
- capacitance : 0.2880;
- }
- pin("la_oenb[18]") {
- direction : input;
- capacitance : 0.1725;
- }
- pin("la_oenb[17]") {
- direction : input;
- capacitance : 0.2775;
- }
- pin("la_oenb[16]") {
- direction : input;
- capacitance : 0.1771;
- }
- pin("la_oenb[15]") {
- direction : input;
- capacitance : 0.1552;
- }
- pin("la_oenb[14]") {
- direction : input;
- capacitance : 0.1766;
- }
- pin("la_oenb[13]") {
- direction : input;
- capacitance : 0.2978;
- }
- pin("la_oenb[12]") {
- direction : input;
- capacitance : 0.1801;
- }
- pin("la_oenb[11]") {
- direction : input;
- capacitance : 0.2754;
- }
- pin("la_oenb[10]") {
- direction : input;
- capacitance : 0.3137;
- }
- pin("la_oenb[9]") {
- direction : input;
- capacitance : 0.1712;
- }
- pin("la_oenb[8]") {
- direction : input;
- capacitance : 0.2010;
- }
- pin("la_oenb[7]") {
- direction : input;
- capacitance : 0.2228;
- }
- pin("la_oenb[6]") {
- direction : input;
- capacitance : 0.2480;
- }
- pin("la_oenb[5]") {
- direction : input;
- capacitance : 0.2972;
- }
- pin("la_oenb[4]") {
- direction : input;
- capacitance : 0.2011;
- }
- pin("la_oenb[3]") {
- direction : input;
- capacitance : 0.1770;
- }
- pin("la_oenb[2]") {
- direction : input;
- capacitance : 0.3164;
- }
- pin("la_oenb[1]") {
- direction : input;
- capacitance : 0.3002;
- }
- pin("la_oenb[0]") {
- direction : input;
- capacitance : 0.2737;
- }
- }
- bus("user_irq") {
- bus_type : user_irq;
- direction : output;
- capacitance : 0.0000;
- pin("user_irq[2]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("user_irq[1]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("user_irq[0]") {
- direction : output;
- capacitance : 0.0729;
- }
- }
- bus("wbs_adr_i") {
- bus_type : wbs_adr_i;
- direction : input;
- capacitance : 0.0000;
- pin("wbs_adr_i[31]") {
- direction : input;
- capacitance : 0.2422;
- }
- pin("wbs_adr_i[30]") {
- direction : input;
- capacitance : 0.2763;
- }
- pin("wbs_adr_i[29]") {
- direction : input;
- capacitance : 0.2538;
- }
- pin("wbs_adr_i[28]") {
- direction : input;
- capacitance : 0.2269;
- }
- pin("wbs_adr_i[27]") {
- direction : input;
- capacitance : 0.2313;
- }
- pin("wbs_adr_i[26]") {
- direction : input;
- capacitance : 0.3488;
- }
- pin("wbs_adr_i[25]") {
- direction : input;
- capacitance : 0.2742;
- }
- pin("wbs_adr_i[24]") {
- direction : input;
- capacitance : 0.2337;
- }
- pin("wbs_adr_i[23]") {
- direction : input;
- capacitance : 0.2478;
- }
- pin("wbs_adr_i[22]") {
- direction : input;
- capacitance : 0.2927;
- }
- pin("wbs_adr_i[21]") {
- direction : input;
- capacitance : 0.2369;
- }
- pin("wbs_adr_i[20]") {
- direction : input;
- capacitance : 0.4150;
- }
- pin("wbs_adr_i[19]") {
- direction : input;
- capacitance : 0.2983;
- }
- pin("wbs_adr_i[18]") {
- direction : input;
- capacitance : 0.3050;
- }
- pin("wbs_adr_i[17]") {
- direction : input;
- capacitance : 0.3078;
- }
- pin("wbs_adr_i[16]") {
- direction : input;
- capacitance : 0.3219;
- }
- pin("wbs_adr_i[15]") {
- direction : input;
- capacitance : 0.3075;
- }
- pin("wbs_adr_i[14]") {
- direction : input;
- capacitance : 0.2562;
- }
- pin("wbs_adr_i[13]") {
- direction : input;
- capacitance : 0.2987;
- }
- pin("wbs_adr_i[12]") {
- direction : input;
- capacitance : 0.2976;
- }
- pin("wbs_adr_i[11]") {
- direction : input;
- capacitance : 0.2433;
- }
- pin("wbs_adr_i[10]") {
- direction : input;
- capacitance : 0.2711;
- }
- pin("wbs_adr_i[9]") {
- direction : input;
- capacitance : 0.2745;
- }
- pin("wbs_adr_i[8]") {
- direction : input;
- capacitance : 0.3466;
- }
- pin("wbs_adr_i[7]") {
- direction : input;
- capacitance : 0.2429;
- }
- pin("wbs_adr_i[6]") {
- direction : input;
- capacitance : 0.2814;
- }
- pin("wbs_adr_i[5]") {
- direction : input;
- capacitance : 0.2691;
- }
- pin("wbs_adr_i[4]") {
- direction : input;
- capacitance : 0.2580;
- }
- pin("wbs_adr_i[3]") {
- direction : input;
- capacitance : 0.2274;
- }
- pin("wbs_adr_i[2]") {
- direction : input;
- capacitance : 0.2813;
- }
- pin("wbs_adr_i[1]") {
- direction : input;
- capacitance : 0.3030;
- }
- pin("wbs_adr_i[0]") {
- direction : input;
- capacitance : 0.2469;
- }
- }
- bus("wbs_dat_i") {
- bus_type : wbs_dat_i;
- direction : input;
- capacitance : 0.0000;
- pin("wbs_dat_i[31]") {
- direction : input;
- capacitance : 0.2195;
- }
- pin("wbs_dat_i[30]") {
- direction : input;
- capacitance : 0.1920;
- }
- pin("wbs_dat_i[29]") {
- direction : input;
- capacitance : 0.2466;
- }
- pin("wbs_dat_i[28]") {
- direction : input;
- capacitance : 0.2307;
- }
- pin("wbs_dat_i[27]") {
- direction : input;
- capacitance : 0.2188;
- }
- pin("wbs_dat_i[26]") {
- direction : input;
- capacitance : 0.2395;
- }
- pin("wbs_dat_i[25]") {
- direction : input;
- capacitance : 0.2404;
- }
- pin("wbs_dat_i[24]") {
- direction : input;
- capacitance : 0.2383;
- }
- pin("wbs_dat_i[23]") {
- direction : input;
- capacitance : 0.2441;
- }
- pin("wbs_dat_i[22]") {
- direction : input;
- capacitance : 0.2833;
- }
- pin("wbs_dat_i[21]") {
- direction : input;
- capacitance : 0.2496;
- }
- pin("wbs_dat_i[20]") {
- direction : input;
- capacitance : 0.3896;
- }
- pin("wbs_dat_i[19]") {
- direction : input;
- capacitance : 0.2042;
- }
- pin("wbs_dat_i[18]") {
- direction : input;
- capacitance : 0.3017;
- }
- pin("wbs_dat_i[17]") {
- direction : input;
- capacitance : 0.2956;
- }
- pin("wbs_dat_i[16]") {
- direction : input;
- capacitance : 0.2138;
- }
- pin("wbs_dat_i[15]") {
- direction : input;
- capacitance : 0.3045;
- }
- pin("wbs_dat_i[14]") {
- direction : input;
- capacitance : 0.2121;
- }
- pin("wbs_dat_i[13]") {
- direction : input;
- capacitance : 0.2623;
- }
- pin("wbs_dat_i[12]") {
- direction : input;
- capacitance : 0.2149;
- }
- pin("wbs_dat_i[11]") {
- direction : input;
- capacitance : 0.2184;
- }
- pin("wbs_dat_i[10]") {
- direction : input;
- capacitance : 0.2184;
- }
- pin("wbs_dat_i[9]") {
- direction : input;
- capacitance : 0.2214;
- }
- pin("wbs_dat_i[8]") {
- direction : input;
- capacitance : 0.2298;
- }
- pin("wbs_dat_i[7]") {
- direction : input;
- capacitance : 0.2784;
- }
- pin("wbs_dat_i[6]") {
- direction : input;
- capacitance : 0.2261;
- }
- pin("wbs_dat_i[5]") {
- direction : input;
- capacitance : 0.2853;
- }
- pin("wbs_dat_i[4]") {
- direction : input;
- capacitance : 0.3083;
- }
- pin("wbs_dat_i[3]") {
- direction : input;
- capacitance : 0.2671;
- }
- pin("wbs_dat_i[2]") {
- direction : input;
- capacitance : 0.2636;
- }
- pin("wbs_dat_i[1]") {
- direction : input;
- capacitance : 0.2901;
- }
- pin("wbs_dat_i[0]") {
- direction : input;
- capacitance : 0.2398;
- }
- }
- bus("wbs_dat_o") {
- bus_type : wbs_dat_o;
- direction : output;
- capacitance : 0.0000;
- pin("wbs_dat_o[31]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[30]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[29]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[28]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[27]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[26]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[25]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[24]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[23]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[22]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[21]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[20]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[19]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[18]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[17]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[16]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[15]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[14]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[13]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[12]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[11]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[10]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[9]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[8]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[7]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[6]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[5]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[4]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[3]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[2]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[1]") {
- direction : output;
- capacitance : 0.0729;
- }
- pin("wbs_dat_o[0]") {
- direction : output;
- capacitance : 0.0729;
- }
- }
- bus("wbs_sel_i") {
- bus_type : wbs_sel_i;
- direction : input;
- capacitance : 0.0000;
- pin("wbs_sel_i[3]") {
- direction : input;
- capacitance : 0.3378;
- }
- pin("wbs_sel_i[2]") {
- direction : input;
- capacitance : 0.3960;
- }
- pin("wbs_sel_i[1]") {
- direction : input;
- capacitance : 0.2360;
- }
- pin("wbs_sel_i[0]") {
- direction : input;
- capacitance : 0.2403;
- }
- }
- }
-
-}
diff --git a/openlane/user_proj_example/config.tcl b/openlane/user_proj_example/config.tcl
deleted file mode 100644
index 48e913c..0000000
--- a/openlane/user_proj_example/config.tcl
+++ /dev/null
@@ -1,56 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-# SPDX-License-Identifier: Apache-2.0
-
-set ::env(PDK) "gf180mcuC"
-set ::env(STD_CELL_LIBRARY) "gf180mcu_fd_sc_mcu7t5v0"
-
-set ::env(DESIGN_NAME) user_proj_example
-
-set ::env(VERILOG_FILES) "\
- $::env(CARAVEL_ROOT)/verilog/rtl/defines.v \
- $::env(DESIGN_DIR)/../../verilog/rtl/user_proj_example.v"
-
-set ::env(DESIGN_IS_CORE) 0
-
-set ::env(CLOCK_PORT) "wb_clk_i"
-set ::env(CLOCK_NET) "counter.clk"
-set ::env(CLOCK_PERIOD) "24.0"
-
-set ::env(FP_SIZING) absolute
-set ::env(DIE_AREA) "0 0 900 600"
-
-set ::env(FP_PIN_ORDER_CFG) $::env(DESIGN_DIR)/pin_order.cfg
-
-set ::env(PL_BASIC_PLACEMENT) 0
-set ::env(PL_TARGET_DENSITY) 0.45
-
-set ::env(FP_CORE_UTIL) 40
-
-set ::env(SYNTH_MAX_FANOUT) 4
-
-# Maximum layer used for routing is metal 4.
-# This is because this macro will be inserted in a top level (user_project_wrapper)
-# where the PDN is planned on metal 5. So, to avoid having shorts between routes
-# in this macro and the top level metal 5 stripes, we have to restrict routes to metal4.
-#
-set ::env(RT_MAX_LAYER) {Metal4}
-
-# You can draw more power domains if you need to
-set ::env(VDD_NETS) [list {vdd}]
-set ::env(GND_NETS) [list {vss}]
-
-set ::env(DIODE_INSERTION_STRATEGY) 4
-# If you're going to use multiple power domains, then disable cvc run.
-set ::env(RUN_CVC) 1
\ No newline at end of file
diff --git a/openlane/user_proj_example/pin_order.cfg b/openlane/user_proj_example/pin_order.cfg
deleted file mode 100644
index 2fda806..0000000
--- a/openlane/user_proj_example/pin_order.cfg
+++ /dev/null
@@ -1,10 +0,0 @@
-#BUS_SORT
-
-#S
-wb_.*
-wbs_.*
-la_.*
-irq.*
-
-#N
-io_.*
diff --git a/sdc/user_proj_example.sdc b/sdc/user_proj_example.sdc
deleted file mode 100644
index ecd669c..0000000
--- a/sdc/user_proj_example.sdc
+++ /dev/null
@@ -1,850 +0,0 @@
-###############################################################################
-# Created by write_sdc
-# Mon Dec 5 18:20:12 2022
-###############################################################################
-current_design user_proj_example
-###############################################################################
-# Timing Constraints
-###############################################################################
-create_clock -name wb_clk_i -period 24.0000 [get_ports {wb_clk_i}]
-set_clock_transition 0.1500 [get_clocks {wb_clk_i}]
-set_clock_uncertainty 0.2500 wb_clk_i
-set_propagated_clock [get_clocks {wb_clk_i}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[0]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[10]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[11]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[12]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[13]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[14]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[15]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[16]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[17]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[18]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[19]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[1]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[20]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[21]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[22]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[23]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[24]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[25]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[26]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[27]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[28]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[29]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[2]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[30]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[31]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[32]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[33]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[34]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[35]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[36]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[37]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[3]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[4]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[5]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[6]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[7]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[8]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_in[9]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[0]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[10]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[11]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[12]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[13]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[14]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[15]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[16]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[17]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[18]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[19]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[1]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[20]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[21]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[22]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[23]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[24]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[25]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[26]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[27]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[28]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[29]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[2]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[30]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[31]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[32]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[33]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[34]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[35]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[36]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[37]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[38]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[39]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[3]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[40]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[41]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[42]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[43]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[44]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[45]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[46]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[47]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[48]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[49]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[4]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[50]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[51]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[52]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[53]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[54]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[55]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[56]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[57]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[58]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[59]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[5]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[60]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[61]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[62]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[63]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[6]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[7]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[8]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_in[9]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[0]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[10]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[11]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[12]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[13]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[14]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[15]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[16]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[17]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[18]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[19]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[1]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[20]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[21]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[22]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[23]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[24]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[25]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[26]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[27]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[28]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[29]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[2]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[30]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[31]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[32]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[33]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[34]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[35]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[36]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[37]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[38]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[39]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[3]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[40]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[41]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[42]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[43]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[44]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[45]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[46]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[47]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[48]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[49]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[4]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[50]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[51]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[52]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[53]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[54]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[55]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[56]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[57]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[58]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[59]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[5]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[60]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[61]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[62]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[63]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[6]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[7]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[8]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_oenb[9]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wb_rst_i}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[0]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[10]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[11]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[12]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[13]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[14]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[15]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[16]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[17]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[18]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[19]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[1]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[20]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[21]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[22]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[23]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[24]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[25]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[26]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[27]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[28]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[29]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[2]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[30]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[31]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[3]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[4]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[5]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[6]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[7]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[8]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_adr_i[9]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_cyc_i}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[0]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[10]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[11]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[12]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[13]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[14]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[15]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[16]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[17]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[18]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[19]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[1]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[20]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[21]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[22]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[23]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[24]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[25]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[26]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[27]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[28]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[29]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[2]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[30]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[31]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[3]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[4]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[5]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[6]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[7]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[8]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_i[9]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_sel_i[0]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_sel_i[1]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_sel_i[2]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_sel_i[3]}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_stb_i}]
-set_input_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_we_i}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[0]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[10]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[11]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[12]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[13]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[14]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[15]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[16]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[17]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[18]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[19]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[1]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[20]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[21]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[22]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[23]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[24]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[25]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[26]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[27]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[28]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[29]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[2]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[30]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[31]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[32]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[33]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[34]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[35]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[36]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[37]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[3]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[4]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[5]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[6]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[7]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[8]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_oeb[9]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[0]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[10]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[11]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[12]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[13]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[14]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[15]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[16]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[17]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[18]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[19]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[1]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[20]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[21]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[22]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[23]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[24]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[25]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[26]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[27]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[28]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[29]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[2]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[30]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[31]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[32]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[33]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[34]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[35]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[36]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[37]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[3]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[4]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[5]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[6]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[7]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[8]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {io_out[9]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {irq[0]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {irq[1]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {irq[2]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[0]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[10]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[11]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[12]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[13]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[14]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[15]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[16]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[17]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[18]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[19]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[1]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[20]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[21]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[22]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[23]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[24]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[25]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[26]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[27]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[28]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[29]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[2]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[30]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[31]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[32]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[33]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[34]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[35]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[36]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[37]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[38]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[39]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[3]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[40]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[41]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[42]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[43]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[44]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[45]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[46]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[47]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[48]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[49]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[4]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[50]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[51]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[52]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[53]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[54]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[55]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[56]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[57]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[58]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[59]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[5]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[60]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[61]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[62]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[63]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[6]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[7]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[8]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {la_data_out[9]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_ack_o}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[0]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[10]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[11]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[12]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[13]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[14]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[15]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[16]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[17]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[18]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[19]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[1]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[20]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[21]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[22]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[23]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[24]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[25]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[26]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[27]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[28]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[29]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[2]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[30]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[31]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[3]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[4]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[5]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[6]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[7]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[8]}]
-set_output_delay 4.8000 -clock [get_clocks {wb_clk_i}] -add_delay [get_ports {wbs_dat_o[9]}]
-###############################################################################
-# Environment
-###############################################################################
-set_load -pin_load 0.0729 [get_ports {wbs_ack_o}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[37]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[36]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[35]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[34]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[33]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[32]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[31]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[30]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[29]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[28]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[27]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[26]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[25]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[24]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[23]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[22]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[21]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[20]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[19]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[18]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[17]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[16]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[15]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[14]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[13]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[12]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[11]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[10]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[9]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[8]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[7]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[6]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[5]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[4]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[3]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[2]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[1]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[0]}]
-set_load -pin_load 0.0729 [get_ports {io_out[37]}]
-set_load -pin_load 0.0729 [get_ports {io_out[36]}]
-set_load -pin_load 0.0729 [get_ports {io_out[35]}]
-set_load -pin_load 0.0729 [get_ports {io_out[34]}]
-set_load -pin_load 0.0729 [get_ports {io_out[33]}]
-set_load -pin_load 0.0729 [get_ports {io_out[32]}]
-set_load -pin_load 0.0729 [get_ports {io_out[31]}]
-set_load -pin_load 0.0729 [get_ports {io_out[30]}]
-set_load -pin_load 0.0729 [get_ports {io_out[29]}]
-set_load -pin_load 0.0729 [get_ports {io_out[28]}]
-set_load -pin_load 0.0729 [get_ports {io_out[27]}]
-set_load -pin_load 0.0729 [get_ports {io_out[26]}]
-set_load -pin_load 0.0729 [get_ports {io_out[25]}]
-set_load -pin_load 0.0729 [get_ports {io_out[24]}]
-set_load -pin_load 0.0729 [get_ports {io_out[23]}]
-set_load -pin_load 0.0729 [get_ports {io_out[22]}]
-set_load -pin_load 0.0729 [get_ports {io_out[21]}]
-set_load -pin_load 0.0729 [get_ports {io_out[20]}]
-set_load -pin_load 0.0729 [get_ports {io_out[19]}]
-set_load -pin_load 0.0729 [get_ports {io_out[18]}]
-set_load -pin_load 0.0729 [get_ports {io_out[17]}]
-set_load -pin_load 0.0729 [get_ports {io_out[16]}]
-set_load -pin_load 0.0729 [get_ports {io_out[15]}]
-set_load -pin_load 0.0729 [get_ports {io_out[14]}]
-set_load -pin_load 0.0729 [get_ports {io_out[13]}]
-set_load -pin_load 0.0729 [get_ports {io_out[12]}]
-set_load -pin_load 0.0729 [get_ports {io_out[11]}]
-set_load -pin_load 0.0729 [get_ports {io_out[10]}]
-set_load -pin_load 0.0729 [get_ports {io_out[9]}]
-set_load -pin_load 0.0729 [get_ports {io_out[8]}]
-set_load -pin_load 0.0729 [get_ports {io_out[7]}]
-set_load -pin_load 0.0729 [get_ports {io_out[6]}]
-set_load -pin_load 0.0729 [get_ports {io_out[5]}]
-set_load -pin_load 0.0729 [get_ports {io_out[4]}]
-set_load -pin_load 0.0729 [get_ports {io_out[3]}]
-set_load -pin_load 0.0729 [get_ports {io_out[2]}]
-set_load -pin_load 0.0729 [get_ports {io_out[1]}]
-set_load -pin_load 0.0729 [get_ports {io_out[0]}]
-set_load -pin_load 0.0729 [get_ports {irq[2]}]
-set_load -pin_load 0.0729 [get_ports {irq[1]}]
-set_load -pin_load 0.0729 [get_ports {irq[0]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[63]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[62]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[61]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[60]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[59]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[58]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[57]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[56]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[55]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[54]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[53]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[52]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[51]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[50]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[49]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[48]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[47]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[46]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[45]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[44]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[43]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[42]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[41]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[40]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[39]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[38]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[37]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[36]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[35]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[34]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[33]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[32]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[31]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[30]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[29]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[28]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[27]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[26]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[25]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[24]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[23]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[22]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[21]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[20]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[19]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[18]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[17]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[16]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[15]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[14]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[13]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[12]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[11]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[10]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[9]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[8]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[7]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[6]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[5]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[4]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[3]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[2]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[1]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[0]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[31]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[30]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[29]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[28]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[27]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[26]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[25]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[24]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[23]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[22]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[21]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[20]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[19]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[18]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[17]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[16]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[15]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[14]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[13]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[12]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[11]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[10]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[9]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[8]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[7]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[6]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[5]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[4]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[3]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[2]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[1]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_4 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wb_clk_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wb_rst_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_cyc_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_stb_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_we_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[37]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[36]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[35]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[34]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[33]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[32]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[63]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[62]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[61]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[60]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[59]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[58]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[57]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[56]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[55]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[54]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[53]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[52]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[51]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[50]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[49]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[48]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[47]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[46]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[45]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[44]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[43]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[42]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[41]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[40]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[39]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[38]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[37]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[36]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[35]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[34]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[33]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[32]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[63]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[62]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[61]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[60]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[59]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[58]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[57]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[56]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[55]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[54]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[53]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[52]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[51]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[50]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[49]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[48]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[47]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[46]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[45]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[44]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[43]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[42]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[41]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[40]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[39]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[38]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[37]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[36]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[35]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[34]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[33]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[32]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[0]}]
-set_timing_derate -early 0.9500
-set_timing_derate -late 1.0500
-###############################################################################
-# Design Rules
-###############################################################################
-set_max_fanout 4.0000 [current_design]
diff --git a/sdc/user_project_wrapper.sdc b/sdc/user_project_wrapper.sdc
deleted file mode 100644
index 62c7979..0000000
--- a/sdc/user_project_wrapper.sdc
+++ /dev/null
@@ -1,852 +0,0 @@
-###############################################################################
-# Created by write_sdc
-# Mon Dec 5 19:02:27 2022
-###############################################################################
-current_design user_project_wrapper
-###############################################################################
-# Timing Constraints
-###############################################################################
-create_clock -name user_clock2 -period 30.0000 [get_ports {user_clock2}]
-set_clock_transition 0.1500 [get_clocks {user_clock2}]
-set_clock_uncertainty 0.2500 user_clock2
-set_propagated_clock [get_clocks {user_clock2}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[0]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[10]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[11]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[12]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[13]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[14]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[15]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[16]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[17]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[18]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[19]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[1]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[20]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[21]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[22]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[23]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[24]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[25]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[26]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[27]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[28]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[29]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[2]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[30]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[31]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[32]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[33]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[34]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[35]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[36]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[37]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[3]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[4]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[5]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[6]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[7]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[8]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_in[9]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[0]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[10]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[11]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[12]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[13]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[14]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[15]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[16]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[17]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[18]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[19]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[1]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[20]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[21]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[22]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[23]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[24]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[25]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[26]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[27]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[28]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[29]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[2]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[30]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[31]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[32]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[33]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[34]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[35]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[36]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[37]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[38]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[39]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[3]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[40]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[41]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[42]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[43]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[44]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[45]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[46]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[47]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[48]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[49]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[4]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[50]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[51]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[52]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[53]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[54]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[55]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[56]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[57]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[58]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[59]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[5]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[60]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[61]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[62]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[63]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[6]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[7]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[8]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_in[9]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[0]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[10]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[11]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[12]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[13]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[14]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[15]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[16]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[17]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[18]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[19]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[1]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[20]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[21]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[22]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[23]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[24]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[25]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[26]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[27]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[28]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[29]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[2]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[30]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[31]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[32]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[33]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[34]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[35]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[36]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[37]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[38]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[39]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[3]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[40]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[41]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[42]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[43]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[44]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[45]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[46]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[47]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[48]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[49]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[4]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[50]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[51]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[52]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[53]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[54]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[55]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[56]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[57]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[58]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[59]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[5]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[60]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[61]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[62]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[63]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[6]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[7]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[8]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_oenb[9]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wb_clk_i}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wb_rst_i}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[0]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[10]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[11]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[12]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[13]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[14]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[15]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[16]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[17]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[18]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[19]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[1]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[20]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[21]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[22]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[23]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[24]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[25]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[26]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[27]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[28]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[29]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[2]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[30]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[31]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[3]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[4]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[5]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[6]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[7]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[8]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_adr_i[9]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_cyc_i}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[0]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[10]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[11]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[12]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[13]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[14]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[15]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[16]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[17]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[18]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[19]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[1]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[20]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[21]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[22]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[23]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[24]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[25]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[26]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[27]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[28]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[29]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[2]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[30]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[31]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[3]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[4]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[5]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[6]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[7]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[8]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_i[9]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_sel_i[0]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_sel_i[1]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_sel_i[2]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_sel_i[3]}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_stb_i}]
-set_input_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_we_i}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[0]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[10]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[11]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[12]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[13]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[14]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[15]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[16]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[17]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[18]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[19]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[1]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[20]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[21]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[22]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[23]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[24]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[25]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[26]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[27]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[28]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[29]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[2]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[30]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[31]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[32]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[33]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[34]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[35]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[36]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[37]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[3]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[4]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[5]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[6]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[7]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[8]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_oeb[9]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[0]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[10]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[11]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[12]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[13]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[14]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[15]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[16]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[17]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[18]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[19]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[1]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[20]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[21]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[22]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[23]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[24]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[25]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[26]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[27]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[28]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[29]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[2]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[30]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[31]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[32]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[33]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[34]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[35]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[36]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[37]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[3]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[4]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[5]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[6]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[7]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[8]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {io_out[9]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[0]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[10]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[11]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[12]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[13]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[14]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[15]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[16]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[17]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[18]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[19]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[1]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[20]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[21]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[22]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[23]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[24]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[25]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[26]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[27]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[28]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[29]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[2]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[30]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[31]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[32]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[33]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[34]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[35]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[36]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[37]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[38]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[39]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[3]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[40]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[41]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[42]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[43]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[44]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[45]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[46]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[47]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[48]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[49]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[4]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[50]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[51]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[52]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[53]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[54]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[55]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[56]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[57]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[58]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[59]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[5]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[60]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[61]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[62]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[63]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[6]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[7]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[8]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {la_data_out[9]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {user_irq[0]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {user_irq[1]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {user_irq[2]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_ack_o}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[0]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[10]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[11]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[12]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[13]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[14]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[15]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[16]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[17]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[18]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[19]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[1]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[20]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[21]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[22]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[23]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[24]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[25]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[26]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[27]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[28]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[29]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[2]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[30]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[31]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[3]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[4]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[5]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[6]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[7]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[8]}]
-set_output_delay 6.0000 -clock [get_clocks {user_clock2}] -add_delay [get_ports {wbs_dat_o[9]}]
-###############################################################################
-# Environment
-###############################################################################
-set_load -pin_load 0.0729 [get_ports {wbs_ack_o}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[37]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[36]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[35]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[34]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[33]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[32]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[31]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[30]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[29]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[28]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[27]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[26]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[25]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[24]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[23]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[22]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[21]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[20]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[19]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[18]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[17]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[16]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[15]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[14]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[13]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[12]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[11]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[10]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[9]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[8]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[7]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[6]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[5]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[4]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[3]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[2]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[1]}]
-set_load -pin_load 0.0729 [get_ports {io_oeb[0]}]
-set_load -pin_load 0.0729 [get_ports {io_out[37]}]
-set_load -pin_load 0.0729 [get_ports {io_out[36]}]
-set_load -pin_load 0.0729 [get_ports {io_out[35]}]
-set_load -pin_load 0.0729 [get_ports {io_out[34]}]
-set_load -pin_load 0.0729 [get_ports {io_out[33]}]
-set_load -pin_load 0.0729 [get_ports {io_out[32]}]
-set_load -pin_load 0.0729 [get_ports {io_out[31]}]
-set_load -pin_load 0.0729 [get_ports {io_out[30]}]
-set_load -pin_load 0.0729 [get_ports {io_out[29]}]
-set_load -pin_load 0.0729 [get_ports {io_out[28]}]
-set_load -pin_load 0.0729 [get_ports {io_out[27]}]
-set_load -pin_load 0.0729 [get_ports {io_out[26]}]
-set_load -pin_load 0.0729 [get_ports {io_out[25]}]
-set_load -pin_load 0.0729 [get_ports {io_out[24]}]
-set_load -pin_load 0.0729 [get_ports {io_out[23]}]
-set_load -pin_load 0.0729 [get_ports {io_out[22]}]
-set_load -pin_load 0.0729 [get_ports {io_out[21]}]
-set_load -pin_load 0.0729 [get_ports {io_out[20]}]
-set_load -pin_load 0.0729 [get_ports {io_out[19]}]
-set_load -pin_load 0.0729 [get_ports {io_out[18]}]
-set_load -pin_load 0.0729 [get_ports {io_out[17]}]
-set_load -pin_load 0.0729 [get_ports {io_out[16]}]
-set_load -pin_load 0.0729 [get_ports {io_out[15]}]
-set_load -pin_load 0.0729 [get_ports {io_out[14]}]
-set_load -pin_load 0.0729 [get_ports {io_out[13]}]
-set_load -pin_load 0.0729 [get_ports {io_out[12]}]
-set_load -pin_load 0.0729 [get_ports {io_out[11]}]
-set_load -pin_load 0.0729 [get_ports {io_out[10]}]
-set_load -pin_load 0.0729 [get_ports {io_out[9]}]
-set_load -pin_load 0.0729 [get_ports {io_out[8]}]
-set_load -pin_load 0.0729 [get_ports {io_out[7]}]
-set_load -pin_load 0.0729 [get_ports {io_out[6]}]
-set_load -pin_load 0.0729 [get_ports {io_out[5]}]
-set_load -pin_load 0.0729 [get_ports {io_out[4]}]
-set_load -pin_load 0.0729 [get_ports {io_out[3]}]
-set_load -pin_load 0.0729 [get_ports {io_out[2]}]
-set_load -pin_load 0.0729 [get_ports {io_out[1]}]
-set_load -pin_load 0.0729 [get_ports {io_out[0]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[63]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[62]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[61]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[60]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[59]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[58]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[57]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[56]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[55]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[54]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[53]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[52]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[51]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[50]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[49]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[48]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[47]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[46]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[45]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[44]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[43]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[42]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[41]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[40]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[39]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[38]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[37]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[36]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[35]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[34]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[33]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[32]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[31]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[30]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[29]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[28]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[27]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[26]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[25]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[24]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[23]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[22]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[21]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[20]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[19]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[18]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[17]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[16]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[15]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[14]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[13]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[12]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[11]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[10]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[9]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[8]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[7]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[6]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[5]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[4]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[3]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[2]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[1]}]
-set_load -pin_load 0.0729 [get_ports {la_data_out[0]}]
-set_load -pin_load 0.0729 [get_ports {user_irq[2]}]
-set_load -pin_load 0.0729 [get_ports {user_irq[1]}]
-set_load -pin_load 0.0729 [get_ports {user_irq[0]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[31]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[30]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[29]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[28]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[27]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[26]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[25]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[24]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[23]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[22]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[21]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[20]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[19]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[18]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[17]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[16]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[15]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[14]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[13]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[12]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[11]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[10]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[9]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[8]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[7]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[6]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[5]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[4]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[3]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[2]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[1]}]
-set_load -pin_load 0.0729 [get_ports {wbs_dat_o[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_4 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {user_clock2}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wb_clk_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wb_rst_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_cyc_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_stb_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_we_i}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[37]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[36]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[35]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[34]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[33]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[32]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_in[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[63]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[62]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[61]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[60]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[59]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[58]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[57]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[56]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[55]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[54]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[53]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[52]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[51]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[50]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[49]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[48]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[47]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[46]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[45]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[44]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[43]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[42]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[41]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[40]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[39]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[38]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[37]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[36]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[35]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[34]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[33]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[32]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_data_in[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[63]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[62]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[61]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[60]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[59]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[58]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[57]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[56]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[55]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[54]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[53]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[52]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[51]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[50]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[49]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[48]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[47]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[46]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[45]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[44]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[43]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[42]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[41]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[40]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[39]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[38]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[37]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[36]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[35]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[34]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[33]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[32]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {la_oenb[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_adr_i[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[31]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[30]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[29]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[28]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[27]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[26]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[25]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[24]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[23]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[22]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[21]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[20]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[19]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[18]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[17]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[16]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[15]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[14]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[13]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[12]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[11]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[10]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[9]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[8]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[7]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[6]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[5]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[4]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_dat_i[0]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[3]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[2]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[1]}]
-set_driving_cell -lib_cell gf180mcu_fd_sc_mcu7t5v0__inv_1 -pin {ZN} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbs_sel_i[0]}]
-set_timing_derate -early 0.9500
-set_timing_derate -late 1.0500
-###############################################################################
-# Design Rules
-###############################################################################
-set_max_fanout 10.0000 [current_design]
diff --git a/sdf/multicorner/nom/user_project_wrapper.ff.sdf b/sdf/multicorner/nom/user_project_wrapper.ff.sdf
deleted file mode 100644
index 96b0f0f..0000000
--- a/sdf/multicorner/nom/user_project_wrapper.ff.sdf
+++ /dev/null
@@ -1,433 +0,0 @@
-(DELAYFILE
- (SDFVERSION "3.0")
- (DESIGN "user_project_wrapper")
- (DATE "Mon Dec 5 19:02:47 2022")
- (VENDOR "Parallax")
- (PROGRAM "STA")
- (VERSION "2.3.2")
- (DIVIDER .)
- (TIMESCALE 1ns)
- (CELL
- (CELLTYPE "user_project_wrapper")
- (INSTANCE)
- (DELAY
- (ABSOLUTE
- (INTERCONNECT io_in[0] mprj.io_in[0] (3.375:3.375:3.375) (2.164:2.164:2.164))
- (INTERCONNECT io_in[10] mprj.io_in[10] (1.824:1.824:1.824) (1.163:1.163:1.163))
- (INTERCONNECT io_in[11] mprj.io_in[11] (1.620:1.620:1.620) (1.034:1.034:1.034))
- (INTERCONNECT io_in[12] mprj.io_in[12] (0.922:0.922:0.922) (0.589:0.589:0.589))
- (INTERCONNECT io_in[13] mprj.io_in[13] (1.346:1.346:1.346) (0.861:0.861:0.861))
- (INTERCONNECT io_in[14] mprj.io_in[14] (1.352:1.352:1.352) (0.864:0.864:0.864))
- (INTERCONNECT io_in[15] mprj.io_in[15] (1.724:1.724:1.724) (1.103:1.103:1.103))
- (INTERCONNECT io_in[16] mprj.io_in[16] (0.949:0.949:0.949) (0.606:0.606:0.606))
- (INTERCONNECT io_in[17] mprj.io_in[17] (0.839:0.839:0.839) (0.534:0.534:0.534))
- (INTERCONNECT io_in[18] mprj.io_in[18] (0.593:0.593:0.593) (0.376:0.376:0.376))
- (INTERCONNECT io_in[19] mprj.io_in[19] (0.405:0.405:0.405) (0.257:0.257:0.257))
- (INTERCONNECT io_in[1] mprj.io_in[1] (5.752:5.752:5.752) (3.637:3.637:3.637))
- (INTERCONNECT io_in[20] mprj.io_in[20] (0.685:0.685:0.685) (0.436:0.436:0.436))
- (INTERCONNECT io_in[21] mprj.io_in[21] (0.783:0.783:0.783) (0.499:0.499:0.499))
- (INTERCONNECT io_in[22] mprj.io_in[22] (0.977:0.977:0.977) (0.624:0.624:0.624))
- (INTERCONNECT io_in[23] mprj.io_in[23] (2.787:2.787:2.787) (1.763:1.763:1.763))
- (INTERCONNECT io_in[24] mprj.io_in[24] (2.368:2.368:2.368) (1.505:1.505:1.505))
- (INTERCONNECT io_in[25] mprj.io_in[25] (1.425:1.425:1.425) (0.914:0.914:0.914))
- (INTERCONNECT io_in[26] mprj.io_in[26] (1.101:1.101:1.101) (0.705:0.705:0.705))
- (INTERCONNECT io_in[27] mprj.io_in[27] (1.985:1.985:1.985) (1.260:1.260:1.260))
- (INTERCONNECT io_in[28] mprj.io_in[28] (1.539:1.539:1.539) (0.982:0.982:0.982))
- (INTERCONNECT io_in[29] mprj.io_in[29] (1.582:1.582:1.582) (1.012:1.012:1.012))
- (INTERCONNECT io_in[2] mprj.io_in[2] (4.995:4.995:4.995) (3.171:3.171:3.171))
- (INTERCONNECT io_in[30] mprj.io_in[30] (1.675:1.675:1.675) (1.072:1.072:1.072))
- (INTERCONNECT io_in[31] mprj.io_in[31] (1.910:1.910:1.910) (1.225:1.225:1.225))
- (INTERCONNECT io_in[32] mprj.io_in[32] (2.755:2.755:2.755) (1.764:1.764:1.764))
- (INTERCONNECT io_in[33] mprj.io_in[33] (2.717:2.717:2.717) (1.742:1.742:1.742))
- (INTERCONNECT io_in[34] mprj.io_in[34] (3.128:3.128:3.128) (2.003:2.003:2.003))
- (INTERCONNECT io_in[35] mprj.io_in[35] (2.823:2.823:2.823) (1.817:1.817:1.817))
- (INTERCONNECT io_in[36] mprj.io_in[36] (2.405:2.405:2.405) (1.551:1.551:1.551))
- (INTERCONNECT io_in[37] mprj.io_in[37] (3.239:3.239:3.239) (2.084:2.084:2.084))
- (INTERCONNECT io_in[3] mprj.io_in[3] (5.012:5.012:5.012) (3.187:3.187:3.187))
- (INTERCONNECT io_in[4] mprj.io_in[4] (4.222:4.222:4.222) (2.689:2.689:2.689))
- (INTERCONNECT io_in[5] mprj.io_in[5] (3.966:3.966:3.966) (2.529:2.529:2.529))
- (INTERCONNECT io_in[6] mprj.io_in[6] (2.892:2.892:2.892) (1.848:1.848:1.848))
- (INTERCONNECT io_in[7] mprj.io_in[7] (2.152:2.152:2.152) (1.377:1.377:1.377))
- (INTERCONNECT io_in[8] mprj.io_in[8] (2.024:2.024:2.024) (1.293:1.293:1.293))
- (INTERCONNECT io_in[9] mprj.io_in[9] (1.927:1.927:1.927) (1.229:1.229:1.229))
- (INTERCONNECT la_data_in[0] mprj.la_data_in[0] (1.539:1.539:1.539) (0.986:0.986:0.986))
- (INTERCONNECT la_data_in[10] mprj.la_data_in[10] (1.214:1.214:1.214) (0.777:0.777:0.777))
- (INTERCONNECT la_data_in[11] mprj.la_data_in[11] (1.221:1.221:1.221) (0.781:0.781:0.781))
- (INTERCONNECT la_data_in[12] mprj.la_data_in[12] (1.965:1.965:1.965) (1.248:1.248:1.248))
- (INTERCONNECT la_data_in[13] mprj.la_data_in[13] (1.074:1.074:1.074) (0.686:0.686:0.686))
- (INTERCONNECT la_data_in[14] mprj.la_data_in[14] (1.151:1.151:1.151) (0.736:0.736:0.736))
- (INTERCONNECT la_data_in[15] mprj.la_data_in[15] (1.371:1.371:1.371) (0.876:0.876:0.876))
- (INTERCONNECT la_data_in[16] mprj.la_data_in[16] (1.907:1.907:1.907) (1.212:1.212:1.212))
- (INTERCONNECT la_data_in[17] mprj.la_data_in[17] (1.081:1.081:1.081) (0.690:0.690:0.690))
- (INTERCONNECT la_data_in[18] mprj.la_data_in[18] (0.991:0.991:0.991) (0.633:0.633:0.633))
- (INTERCONNECT la_data_in[19] mprj.la_data_in[19] (0.978:0.978:0.978) (0.626:0.626:0.626))
- (INTERCONNECT la_data_in[1] mprj.la_data_in[1] (2.135:2.135:2.135) (1.358:1.358:1.358))
- (INTERCONNECT la_data_in[20] mprj.la_data_in[20] (0.977:0.977:0.977) (0.625:0.625:0.625))
- (INTERCONNECT la_data_in[21] mprj.la_data_in[21] (1.820:1.820:1.820) (1.155:1.155:1.155))
- (INTERCONNECT la_data_in[22] mprj.la_data_in[22] (0.975:0.975:0.975) (0.622:0.622:0.622))
- (INTERCONNECT la_data_in[23] mprj.la_data_in[23] (0.986:0.986:0.986) (0.629:0.629:0.629))
- (INTERCONNECT la_data_in[24] mprj.la_data_in[24] (0.983:0.983:0.983) (0.629:0.629:0.629))
- (INTERCONNECT la_data_in[25] mprj.la_data_in[25] (1.411:1.411:1.411) (0.904:0.904:0.904))
- (INTERCONNECT la_data_in[26] mprj.la_data_in[26] (0.999:0.999:0.999) (0.639:0.639:0.639))
- (INTERCONNECT la_data_in[27] mprj.la_data_in[27] (1.373:1.373:1.373) (0.879:0.879:0.879))
- (INTERCONNECT la_data_in[28] mprj.la_data_in[28] (2.349:2.349:2.349) (1.494:1.494:1.494))
- (INTERCONNECT la_data_in[29] mprj.la_data_in[29] (1.566:1.566:1.566) (1.004:1.004:1.004))
- (INTERCONNECT la_data_in[2] mprj.la_data_in[2] (1.766:1.766:1.766) (1.128:1.128:1.128))
- (INTERCONNECT la_data_in[30] mprj.la_data_in[30] (2.446:2.446:2.446) (1.557:1.557:1.557))
- (INTERCONNECT la_data_in[31] mprj.la_data_in[31] (1.563:1.563:1.563) (1.002:1.002:1.002))
- (INTERCONNECT la_data_in[32] mprj.la_data_in[32] (1.580:1.580:1.580) (1.013:1.013:1.013))
- (INTERCONNECT la_data_in[33] mprj.la_data_in[33] (2.032:2.032:2.032) (1.289:1.289:1.289))
- (INTERCONNECT la_data_in[34] mprj.la_data_in[34] (1.372:1.372:1.372) (0.873:0.873:0.873))
- (INTERCONNECT la_data_in[35] mprj.la_data_in[35] (2.092:2.092:2.092) (1.328:1.328:1.328))
- (INTERCONNECT la_data_in[36] mprj.la_data_in[36] (1.957:1.957:1.957) (1.245:1.245:1.245))
- (INTERCONNECT la_data_in[37] mprj.la_data_in[37] (1.313:1.313:1.313) (0.841:0.841:0.841))
- (INTERCONNECT la_data_in[38] mprj.la_data_in[38] (1.458:1.458:1.458) (0.934:0.934:0.934))
- (INTERCONNECT la_data_in[39] mprj.la_data_in[39] (1.335:1.335:1.335) (0.855:0.855:0.855))
- (INTERCONNECT la_data_in[3] mprj.la_data_in[3] (1.377:1.377:1.377) (0.882:0.882:0.882))
- (INTERCONNECT la_data_in[40] mprj.la_data_in[40] (1.318:1.318:1.318) (0.844:0.844:0.844))
- (INTERCONNECT la_data_in[41] mprj.la_data_in[41] (1.335:1.335:1.335) (0.855:0.855:0.855))
- (INTERCONNECT la_data_in[42] mprj.la_data_in[42] (1.567:1.567:1.567) (1.005:1.005:1.005))
- (INTERCONNECT la_data_in[43] mprj.la_data_in[43] (1.527:1.527:1.527) (0.978:0.978:0.978))
- (INTERCONNECT la_data_in[44] mprj.la_data_in[44] (1.397:1.397:1.397) (0.895:0.895:0.895))
- (INTERCONNECT la_data_in[45] mprj.la_data_in[45] (1.546:1.546:1.546) (0.990:0.990:0.990))
- (INTERCONNECT la_data_in[46] mprj.la_data_in[46] (1.822:1.822:1.822) (1.169:1.169:1.169))
- (INTERCONNECT la_data_in[47] mprj.la_data_in[47] (1.489:1.489:1.489) (0.954:0.954:0.954))
- (INTERCONNECT la_data_in[48] mprj.la_data_in[48] (1.490:1.490:1.490) (0.955:0.955:0.955))
- (INTERCONNECT la_data_in[49] mprj.la_data_in[49] (1.677:1.677:1.677) (1.073:1.073:1.073))
- (INTERCONNECT la_data_in[4] mprj.la_data_in[4] (1.983:1.983:1.983) (1.260:1.260:1.260))
- (INTERCONNECT la_data_in[50] mprj.la_data_in[50] (1.433:1.433:1.433) (0.918:0.918:0.918))
- (INTERCONNECT la_data_in[51] mprj.la_data_in[51] (1.457:1.457:1.457) (0.934:0.934:0.934))
- (INTERCONNECT la_data_in[52] mprj.la_data_in[52] (1.827:1.827:1.827) (1.169:1.169:1.169))
- (INTERCONNECT la_data_in[53] mprj.la_data_in[53] (1.295:1.295:1.295) (0.829:0.829:0.829))
- (INTERCONNECT la_data_in[54] mprj.la_data_in[54] (1.668:1.668:1.668) (1.067:1.067:1.067))
- (INTERCONNECT la_data_in[55] mprj.la_data_in[55] (1.314:1.314:1.314) (0.842:0.842:0.842))
- (INTERCONNECT la_data_in[56] mprj.la_data_in[56] (1.544:1.544:1.544) (0.991:0.991:0.991))
- (INTERCONNECT la_data_in[57] mprj.la_data_in[57] (1.402:1.402:1.402) (0.899:0.899:0.899))
- (INTERCONNECT la_data_in[58] mprj.la_data_in[58] (1.472:1.472:1.472) (0.943:0.943:0.943))
- (INTERCONNECT la_data_in[59] mprj.la_data_in[59] (1.558:1.558:1.558) (0.999:0.999:0.999))
- (INTERCONNECT la_data_in[5] mprj.la_data_in[5] (1.387:1.387:1.387) (0.889:0.889:0.889))
- (INTERCONNECT la_data_in[60] mprj.la_data_in[60] (1.617:1.617:1.617) (1.036:1.036:1.036))
- (INTERCONNECT la_data_in[61] mprj.la_data_in[61] (2.066:2.066:2.066) (1.322:1.322:1.322))
- (INTERCONNECT la_data_in[62] mprj.la_data_in[62] (1.432:1.432:1.432) (0.919:0.919:0.919))
- (INTERCONNECT la_data_in[63] mprj.la_data_in[63] (1.855:1.855:1.855) (1.188:1.188:1.188))
- (INTERCONNECT la_data_in[6] mprj.la_data_in[6] (1.305:1.305:1.305) (0.835:0.835:0.835))
- (INTERCONNECT la_data_in[7] mprj.la_data_in[7] (1.240:1.240:1.240) (0.794:0.794:0.794))
- (INTERCONNECT la_data_in[8] mprj.la_data_in[8] (1.883:1.883:1.883) (1.201:1.201:1.201))
- (INTERCONNECT la_data_in[9] mprj.la_data_in[9] (2.135:2.135:2.135) (1.358:1.358:1.358))
- (INTERCONNECT la_oenb[0] mprj.la_oenb[0] (1.778:1.778:1.778) (1.133:1.133:1.133))
- (INTERCONNECT la_oenb[10] mprj.la_oenb[10] (2.032:2.032:2.032) (1.292:1.292:1.292))
- (INTERCONNECT la_oenb[11] mprj.la_oenb[11] (1.787:1.787:1.787) (1.137:1.137:1.137))
- (INTERCONNECT la_oenb[12] mprj.la_oenb[12] (1.176:1.176:1.176) (0.751:0.751:0.751))
- (INTERCONNECT la_oenb[13] mprj.la_oenb[13] (1.925:1.925:1.925) (1.225:1.225:1.225))
- (INTERCONNECT la_oenb[14] mprj.la_oenb[14] (1.152:1.152:1.152) (0.737:0.737:0.737))
- (INTERCONNECT la_oenb[15] mprj.la_oenb[15] (1.012:1.012:1.012) (0.647:0.647:0.647))
- (INTERCONNECT la_oenb[16] mprj.la_oenb[16] (1.156:1.156:1.156) (0.739:0.739:0.739))
- (INTERCONNECT la_oenb[17] mprj.la_oenb[17] (1.793:1.793:1.793) (1.138:1.138:1.138))
- (INTERCONNECT la_oenb[18] mprj.la_oenb[18] (1.126:1.126:1.126) (0.720:0.720:0.720))
- (INTERCONNECT la_oenb[19] mprj.la_oenb[19] (1.859:1.859:1.859) (1.179:1.179:1.179))
- (INTERCONNECT la_oenb[1] mprj.la_oenb[1] (1.954:1.954:1.954) (1.247:1.247:1.247))
- (INTERCONNECT la_oenb[20] mprj.la_oenb[20] (0.966:0.966:0.966) (0.618:0.618:0.618))
- (INTERCONNECT la_oenb[21] mprj.la_oenb[21] (0.970:0.970:0.970) (0.619:0.619:0.619))
- (INTERCONNECT la_oenb[22] mprj.la_oenb[22] (0.982:0.982:0.982) (0.627:0.627:0.627))
- (INTERCONNECT la_oenb[23] mprj.la_oenb[23] (0.972:0.972:0.972) (0.621:0.621:0.621))
- (INTERCONNECT la_oenb[24] mprj.la_oenb[24] (1.014:1.014:1.014) (0.648:0.648:0.648))
- (INTERCONNECT la_oenb[25] mprj.la_oenb[25] (1.052:1.052:1.052) (0.672:0.672:0.672))
- (INTERCONNECT la_oenb[26] mprj.la_oenb[26] (1.880:1.880:1.880) (1.193:1.193:1.193))
- (INTERCONNECT la_oenb[27] mprj.la_oenb[27] (1.090:1.090:1.090) (0.697:0.697:0.697))
- (INTERCONNECT la_oenb[28] mprj.la_oenb[28] (1.856:1.856:1.856) (1.178:1.178:1.178))
- (INTERCONNECT la_oenb[29] mprj.la_oenb[29] (1.070:1.070:1.070) (0.684:0.684:0.684))
- (INTERCONNECT la_oenb[2] mprj.la_oenb[2] (2.044:2.044:2.044) (1.299:1.299:1.299))
- (INTERCONNECT la_oenb[30] mprj.la_oenb[30] (1.561:1.561:1.561) (0.994:0.994:0.994))
- (INTERCONNECT la_oenb[31] mprj.la_oenb[31] (1.062:1.062:1.062) (0.679:0.679:0.679))
- (INTERCONNECT la_oenb[32] mprj.la_oenb[32] (1.078:1.078:1.078) (0.690:0.690:0.690))
- (INTERCONNECT la_oenb[33] mprj.la_oenb[33] (1.149:1.149:1.149) (0.735:0.735:0.735))
- (INTERCONNECT la_oenb[34] mprj.la_oenb[34] (1.229:1.229:1.229) (0.787:0.787:0.787))
- (INTERCONNECT la_oenb[35] mprj.la_oenb[35] (2.173:2.173:2.173) (1.386:1.386:1.386))
- (INTERCONNECT la_oenb[36] mprj.la_oenb[36] (1.185:1.185:1.185) (0.758:0.758:0.758))
- (INTERCONNECT la_oenb[37] mprj.la_oenb[37] (1.322:1.322:1.322) (0.846:0.846:0.846))
- (INTERCONNECT la_oenb[38] mprj.la_oenb[38] (1.175:1.175:1.175) (0.752:0.752:0.752))
- (INTERCONNECT la_oenb[39] mprj.la_oenb[39] (1.601:1.601:1.601) (1.023:1.023:1.023))
- (INTERCONNECT la_oenb[3] mprj.la_oenb[3] (1.158:1.158:1.158) (0.741:0.741:0.741))
- (INTERCONNECT la_oenb[40] mprj.la_oenb[40] (1.154:1.154:1.154) (0.737:0.737:0.737))
- (INTERCONNECT la_oenb[41] mprj.la_oenb[41] (1.163:1.163:1.163) (0.743:0.743:0.743))
- (INTERCONNECT la_oenb[42] mprj.la_oenb[42] (1.336:1.336:1.336) (0.853:0.853:0.853))
- (INTERCONNECT la_oenb[43] mprj.la_oenb[43] (1.238:1.238:1.238) (0.792:0.792:0.792))
- (INTERCONNECT la_oenb[44] mprj.la_oenb[44] (2.124:2.124:2.124) (1.354:1.354:1.354))
- (INTERCONNECT la_oenb[45] mprj.la_oenb[45] (1.248:1.248:1.248) (0.798:0.798:0.798))
- (INTERCONNECT la_oenb[46] mprj.la_oenb[46] (1.265:1.265:1.265) (0.810:0.810:0.810))
- (INTERCONNECT la_oenb[47] mprj.la_oenb[47] (1.259:1.259:1.259) (0.806:0.806:0.806))
- (INTERCONNECT la_oenb[48] mprj.la_oenb[48] (1.539:1.539:1.539) (0.987:0.987:0.987))
- (INTERCONNECT la_oenb[49] mprj.la_oenb[49] (1.291:1.291:1.291) (0.827:0.827:0.827))
- (INTERCONNECT la_oenb[4] mprj.la_oenb[4] (1.313:1.313:1.313) (0.841:0.841:0.841))
- (INTERCONNECT la_oenb[50] mprj.la_oenb[50] (1.700:1.700:1.700) (1.088:1.088:1.088))
- (INTERCONNECT la_oenb[51] mprj.la_oenb[51] (1.298:1.298:1.298) (0.831:0.831:0.831))
- (INTERCONNECT la_oenb[52] mprj.la_oenb[52] (1.425:1.425:1.425) (0.914:0.914:0.914))
- (INTERCONNECT la_oenb[53] mprj.la_oenb[53] (1.297:1.297:1.297) (0.831:0.831:0.831))
- (INTERCONNECT la_oenb[54] mprj.la_oenb[54] (2.276:2.276:2.276) (1.453:1.453:1.453))
- (INTERCONNECT la_oenb[55] mprj.la_oenb[55] (1.493:1.493:1.493) (0.957:0.957:0.957))
- (INTERCONNECT la_oenb[56] mprj.la_oenb[56] (1.810:1.810:1.810) (1.158:1.158:1.158))
- (INTERCONNECT la_oenb[57] mprj.la_oenb[57] (2.991:2.991:2.991) (1.914:1.914:1.914))
- (INTERCONNECT la_oenb[58] mprj.la_oenb[58] (1.620:1.620:1.620) (1.038:1.038:1.038))
- (INTERCONNECT la_oenb[59] mprj.la_oenb[59] (2.218:2.218:2.218) (1.419:1.419:1.419))
- (INTERCONNECT la_oenb[5] mprj.la_oenb[5] (1.930:1.930:1.930) (1.230:1.230:1.230))
- (INTERCONNECT la_oenb[60] mprj.la_oenb[60] (2.161:2.161:2.161) (1.381:1.381:1.381))
- (INTERCONNECT la_oenb[61] mprj.la_oenb[61] (1.884:1.884:1.884) (1.206:1.206:1.206))
- (INTERCONNECT la_oenb[62] mprj.la_oenb[62] (1.554:1.554:1.554) (0.997:0.997:0.997))
- (INTERCONNECT la_oenb[63] mprj.la_oenb[63] (2.352:2.352:2.352) (1.499:1.499:1.499))
- (INTERCONNECT la_oenb[6] mprj.la_oenb[6] (1.615:1.615:1.615) (1.031:1.031:1.031))
- (INTERCONNECT la_oenb[7] mprj.la_oenb[7] (1.453:1.453:1.453) (0.927:0.927:0.927))
- (INTERCONNECT la_oenb[8] mprj.la_oenb[8] (1.310:1.310:1.310) (0.839:0.839:0.839))
- (INTERCONNECT la_oenb[9] mprj.la_oenb[9] (1.119:1.119:1.119) (0.716:0.716:0.716))
- (INTERCONNECT wb_clk_i mprj.wb_clk_i (1.653:1.653:1.653) (1.061:1.061:1.061))
- (INTERCONNECT wb_rst_i mprj.wb_rst_i (2.040:2.040:2.040) (1.308:1.308:1.308))
- (INTERCONNECT wbs_adr_i[0] mprj.wbs_adr_i[0] (1.619:1.619:1.619) (1.040:1.040:1.040))
- (INTERCONNECT wbs_adr_i[10] mprj.wbs_adr_i[10] (1.778:1.778:1.778) (1.140:1.140:1.140))
- (INTERCONNECT wbs_adr_i[11] mprj.wbs_adr_i[11] (1.596:1.596:1.596) (1.024:1.024:1.024))
- (INTERCONNECT wbs_adr_i[12] mprj.wbs_adr_i[12] (1.948:1.948:1.948) (1.249:1.249:1.249))
- (INTERCONNECT wbs_adr_i[13] mprj.wbs_adr_i[13] (1.954:1.954:1.954) (1.251:1.251:1.251))
- (INTERCONNECT wbs_adr_i[14] mprj.wbs_adr_i[14] (1.677:1.677:1.677) (1.074:1.074:1.074))
- (INTERCONNECT wbs_adr_i[15] mprj.wbs_adr_i[15] (2.011:2.011:2.011) (1.287:1.287:1.287))
- (INTERCONNECT wbs_adr_i[16] mprj.wbs_adr_i[16] (2.103:2.103:2.103) (1.345:1.345:1.345))
- (INTERCONNECT wbs_adr_i[17] mprj.wbs_adr_i[17] (2.014:2.014:2.014) (1.289:1.289:1.289))
- (INTERCONNECT wbs_adr_i[18] mprj.wbs_adr_i[18] (1.994:1.994:1.994) (1.276:1.276:1.276))
- (INTERCONNECT wbs_adr_i[19] mprj.wbs_adr_i[19] (1.952:1.952:1.952) (1.250:1.250:1.250))
- (INTERCONNECT wbs_adr_i[1] mprj.wbs_adr_i[1] (1.990:1.990:1.990) (1.276:1.276:1.276))
- (INTERCONNECT wbs_adr_i[20] mprj.wbs_adr_i[20] (2.691:2.691:2.691) (1.714:1.714:1.714))
- (INTERCONNECT wbs_adr_i[21] mprj.wbs_adr_i[21] (1.549:1.549:1.549) (0.993:0.993:0.993))
- (INTERCONNECT wbs_adr_i[22] mprj.wbs_adr_i[22] (1.912:1.912:1.912) (1.223:1.223:1.223))
- (INTERCONNECT wbs_adr_i[23] mprj.wbs_adr_i[23] (1.621:1.621:1.621) (1.038:1.038:1.038))
- (INTERCONNECT wbs_adr_i[24] mprj.wbs_adr_i[24] (1.527:1.527:1.527) (0.979:0.979:0.979))
- (INTERCONNECT wbs_adr_i[25] mprj.wbs_adr_i[25] (1.792:1.792:1.792) (1.146:1.146:1.146))
- (INTERCONNECT wbs_adr_i[26] mprj.wbs_adr_i[26] (2.254:2.254:2.254) (1.433:1.433:1.433))
- (INTERCONNECT wbs_adr_i[27] mprj.wbs_adr_i[27] (1.513:1.513:1.513) (0.970:0.970:0.970))
- (INTERCONNECT wbs_adr_i[28] mprj.wbs_adr_i[28] (1.484:1.484:1.484) (0.951:0.951:0.951))
- (INTERCONNECT wbs_adr_i[29] mprj.wbs_adr_i[29] (1.659:1.659:1.659) (1.062:1.062:1.062))
- (INTERCONNECT wbs_adr_i[2] mprj.wbs_adr_i[2] (1.847:1.847:1.847) (1.185:1.185:1.185))
- (INTERCONNECT wbs_adr_i[30] mprj.wbs_adr_i[30] (1.804:1.804:1.804) (1.157:1.157:1.157))
- (INTERCONNECT wbs_adr_i[31] mprj.wbs_adr_i[31] (1.580:1.580:1.580) (1.013:1.013:1.013))
- (INTERCONNECT wbs_adr_i[3] mprj.wbs_adr_i[3] (1.491:1.491:1.491) (0.957:0.957:0.957))
- (INTERCONNECT wbs_adr_i[4] mprj.wbs_adr_i[4] (1.693:1.693:1.693) (1.086:1.086:1.086))
- (INTERCONNECT wbs_adr_i[5] mprj.wbs_adr_i[5] (1.764:1.764:1.764) (1.130:1.130:1.130))
- (INTERCONNECT wbs_adr_i[6] mprj.wbs_adr_i[6] (1.846:1.846:1.846) (1.183:1.183:1.183))
- (INTERCONNECT wbs_adr_i[7] mprj.wbs_adr_i[7] (1.590:1.590:1.590) (1.020:1.020:1.020))
- (INTERCONNECT wbs_adr_i[8] mprj.wbs_adr_i[8] (2.271:2.271:2.271) (1.457:1.457:1.457))
- (INTERCONNECT wbs_adr_i[9] mprj.wbs_adr_i[9] (1.800:1.800:1.800) (1.153:1.153:1.153))
- (INTERCONNECT wbs_cyc_i mprj.wbs_cyc_i (1.859:1.859:1.859) (1.192:1.192:1.192))
- (INTERCONNECT wbs_dat_i[0] mprj.wbs_dat_i[0] (1.572:1.572:1.572) (1.009:1.009:1.009))
- (INTERCONNECT wbs_dat_i[10] mprj.wbs_dat_i[10] (1.429:1.429:1.429) (0.916:0.916:0.916))
- (INTERCONNECT wbs_dat_i[11] mprj.wbs_dat_i[11] (1.429:1.429:1.429) (0.916:0.916:0.916))
- (INTERCONNECT wbs_dat_i[12] mprj.wbs_dat_i[12] (1.406:1.406:1.406) (0.901:0.901:0.901))
- (INTERCONNECT wbs_dat_i[13] mprj.wbs_dat_i[13] (1.719:1.719:1.719) (1.101:1.101:1.101))
- (INTERCONNECT wbs_dat_i[14] mprj.wbs_dat_i[14] (1.387:1.387:1.387) (0.889:0.889:0.889))
- (INTERCONNECT wbs_dat_i[15] mprj.wbs_dat_i[15] (1.993:1.993:1.993) (1.276:1.276:1.276))
- (INTERCONNECT wbs_dat_i[16] mprj.wbs_dat_i[16] (1.399:1.399:1.399) (0.896:0.896:0.896))
- (INTERCONNECT wbs_dat_i[17] mprj.wbs_dat_i[17] (1.934:1.934:1.934) (1.238:1.238:1.238))
- (INTERCONNECT wbs_dat_i[18] mprj.wbs_dat_i[18] (1.973:1.973:1.973) (1.262:1.262:1.262))
- (INTERCONNECT wbs_dat_i[19] mprj.wbs_dat_i[19] (1.335:1.335:1.335) (0.855:0.855:0.855))
- (INTERCONNECT wbs_dat_i[1] mprj.wbs_dat_i[1] (1.905:1.905:1.905) (1.222:1.222:1.222))
- (INTERCONNECT wbs_dat_i[20] mprj.wbs_dat_i[20] (2.523:2.523:2.523) (1.606:1.606:1.606))
- (INTERCONNECT wbs_dat_i[21] mprj.wbs_dat_i[21] (1.632:1.632:1.632) (1.044:1.044:1.044))
- (INTERCONNECT wbs_dat_i[22] mprj.wbs_dat_i[22] (1.851:1.851:1.851) (1.184:1.184:1.184))
- (INTERCONNECT wbs_dat_i[23] mprj.wbs_dat_i[23] (1.596:1.596:1.596) (1.023:1.023:1.023))
- (INTERCONNECT wbs_dat_i[24] mprj.wbs_dat_i[24] (1.558:1.558:1.558) (0.998:0.998:0.998))
- (INTERCONNECT wbs_dat_i[25] mprj.wbs_dat_i[25] (1.571:1.571:1.571) (1.007:1.007:1.007))
- (INTERCONNECT wbs_dat_i[26] mprj.wbs_dat_i[26] (1.566:1.566:1.566) (1.004:1.004:1.004))
- (INTERCONNECT wbs_dat_i[27] mprj.wbs_dat_i[27] (1.429:1.429:1.429) (0.915:0.915:0.915))
- (INTERCONNECT wbs_dat_i[28] mprj.wbs_dat_i[28] (1.508:1.508:1.508) (0.966:0.966:0.966))
- (INTERCONNECT wbs_dat_i[29] mprj.wbs_dat_i[29] (1.609:1.609:1.609) (1.028:1.028:1.028))
- (INTERCONNECT wbs_dat_i[2] mprj.wbs_dat_i[2] (1.729:1.729:1.729) (1.108:1.108:1.108))
- (INTERCONNECT wbs_dat_i[30] mprj.wbs_dat_i[30] (1.254:1.254:1.254) (0.803:0.803:0.803))
- (INTERCONNECT wbs_dat_i[31] mprj.wbs_dat_i[31] (1.435:1.435:1.435) (0.919:0.919:0.919))
- (INTERCONNECT wbs_dat_i[3] mprj.wbs_dat_i[3] (1.752:1.752:1.752) (1.123:1.123:1.123))
- (INTERCONNECT wbs_dat_i[4] mprj.wbs_dat_i[4] (2.021:2.021:2.021) (1.295:1.295:1.295))
- (INTERCONNECT wbs_dat_i[5] mprj.wbs_dat_i[5] (1.873:1.873:1.873) (1.201:1.201:1.201))
- (INTERCONNECT wbs_dat_i[6] mprj.wbs_dat_i[6] (1.481:1.481:1.481) (0.950:0.950:0.950))
- (INTERCONNECT wbs_dat_i[7] mprj.wbs_dat_i[7] (1.825:1.825:1.825) (1.170:1.170:1.170))
- (INTERCONNECT wbs_dat_i[8] mprj.wbs_dat_i[8] (1.505:1.505:1.505) (0.965:0.965:0.965))
- (INTERCONNECT wbs_dat_i[9] mprj.wbs_dat_i[9] (1.449:1.449:1.449) (0.929:0.929:0.929))
- (INTERCONNECT wbs_sel_i[0] mprj.wbs_sel_i[0] (1.575:1.575:1.575) (1.011:1.011:1.011))
- (INTERCONNECT wbs_sel_i[1] mprj.wbs_sel_i[1] (1.546:1.546:1.546) (0.992:0.992:0.992))
- (INTERCONNECT wbs_sel_i[2] mprj.wbs_sel_i[2] (2.561:2.561:2.561) (1.632:1.632:1.632))
- (INTERCONNECT wbs_sel_i[3] mprj.wbs_sel_i[3] (2.197:2.197:2.197) (1.404:1.404:1.404))
- (INTERCONNECT wbs_stb_i mprj.wbs_stb_i (2.290:2.290:2.290) (1.464:1.464:1.464))
- (INTERCONNECT wbs_we_i mprj.wbs_we_i (2.653:2.653:2.653) (1.691:1.691:1.691))
- (INTERCONNECT mprj.io_oeb[0] io_oeb[0] (0.448:0.448:0.448))
- (INTERCONNECT mprj.io_oeb[10] io_oeb[10] (0.078:0.078:0.078))
- (INTERCONNECT mprj.io_oeb[11] io_oeb[11] (0.101:0.101:0.101))
- (INTERCONNECT mprj.io_oeb[12] io_oeb[12] (0.059:0.059:0.059))
- (INTERCONNECT mprj.io_oeb[13] io_oeb[13] (0.098:0.098:0.098))
- (INTERCONNECT mprj.io_oeb[14] io_oeb[14] (0.085:0.085:0.085))
- (INTERCONNECT mprj.io_oeb[15] io_oeb[15] (0.072:0.072:0.072))
- (INTERCONNECT mprj.io_oeb[16] io_oeb[16] (0.050:0.050:0.050))
- (INTERCONNECT mprj.io_oeb[17] io_oeb[17] (0.032:0.032:0.032))
- (INTERCONNECT mprj.io_oeb[18] io_oeb[18] (0.021:0.021:0.021))
- (INTERCONNECT mprj.io_oeb[19] io_oeb[19] (0.026:0.026:0.026))
- (INTERCONNECT mprj.io_oeb[1] io_oeb[1] (0.524:0.524:0.524))
- (INTERCONNECT mprj.io_oeb[20] io_oeb[20] (0.041:0.041:0.041))
- (INTERCONNECT mprj.io_oeb[21] io_oeb[21] (0.054:0.054:0.054))
- (INTERCONNECT mprj.io_oeb[22] io_oeb[22] (0.071:0.071:0.071))
- (INTERCONNECT mprj.io_oeb[23] io_oeb[23] (0.174:0.174:0.174))
- (INTERCONNECT mprj.io_oeb[24] io_oeb[24] (0.088:0.088:0.088))
- (INTERCONNECT mprj.io_oeb[25] io_oeb[25] (0.074:0.074:0.074))
- (INTERCONNECT mprj.io_oeb[26] io_oeb[26] (0.137:0.137:0.137))
- (INTERCONNECT mprj.io_oeb[27] io_oeb[27] (0.111:0.111:0.111))
- (INTERCONNECT mprj.io_oeb[28] io_oeb[28] (0.112:0.112:0.112))
- (INTERCONNECT mprj.io_oeb[29] io_oeb[29] (0.198:0.198:0.198))
- (INTERCONNECT mprj.io_oeb[2] io_oeb[2] (0.458:0.458:0.458))
- (INTERCONNECT mprj.io_oeb[30] io_oeb[30] (0.126:0.126:0.126))
- (INTERCONNECT mprj.io_oeb[31] io_oeb[31] (0.174:0.174:0.174))
- (INTERCONNECT mprj.io_oeb[32] io_oeb[32] (0.190:0.190:0.190))
- (INTERCONNECT mprj.io_oeb[33] io_oeb[33] (0.220:0.220:0.220))
- (INTERCONNECT mprj.io_oeb[34] io_oeb[34] (0.258:0.258:0.258))
- (INTERCONNECT mprj.io_oeb[35] io_oeb[35] (0.238:0.238:0.238))
- (INTERCONNECT mprj.io_oeb[36] io_oeb[36] (0.247:0.247:0.247))
- (INTERCONNECT mprj.io_oeb[37] io_oeb[37] (0.295:0.295:0.295))
- (INTERCONNECT mprj.io_oeb[3] io_oeb[3] (0.475:0.475:0.475))
- (INTERCONNECT mprj.io_oeb[4] io_oeb[4] (0.158:0.158:0.158))
- (INTERCONNECT mprj.io_oeb[5] io_oeb[5] (0.167:0.167:0.167))
- (INTERCONNECT mprj.io_oeb[6] io_oeb[6] (0.134:0.134:0.134))
- (INTERCONNECT mprj.io_oeb[7] io_oeb[7] (0.110:0.110:0.110))
- (INTERCONNECT mprj.io_oeb[8] io_oeb[8] (0.099:0.099:0.099))
- (INTERCONNECT mprj.io_oeb[9] io_oeb[9] (0.104:0.104:0.104))
- (INTERCONNECT mprj.io_out[0] io_out[0] (0.248:0.248:0.248))
- (INTERCONNECT mprj.io_out[10] io_out[10] (0.077:0.077:0.077))
- (INTERCONNECT mprj.io_out[11] io_out[11] (0.052:0.052:0.052))
- (INTERCONNECT mprj.io_out[12] io_out[12] (0.056:0.056:0.056))
- (INTERCONNECT mprj.io_out[13] io_out[13] (0.065:0.065:0.065))
- (INTERCONNECT mprj.io_out[14] io_out[14] (0.075:0.075:0.075))
- (INTERCONNECT mprj.io_out[15] io_out[15] (0.109:0.109:0.109))
- (INTERCONNECT mprj.io_out[16] io_out[16] (0.076:0.076:0.076))
- (INTERCONNECT mprj.io_out[17] io_out[17] (0.035:0.035:0.035))
- (INTERCONNECT mprj.io_out[18] io_out[18] (0.024:0.024:0.024))
- (INTERCONNECT mprj.io_out[19] io_out[19] (0.024:0.024:0.024))
- (INTERCONNECT mprj.io_out[1] io_out[1] (0.554:0.554:0.554))
- (INTERCONNECT mprj.io_out[20] io_out[20] (0.037:0.037:0.037))
- (INTERCONNECT mprj.io_out[21] io_out[21] (0.060:0.060:0.060))
- (INTERCONNECT mprj.io_out[22] io_out[22] (0.066:0.066:0.066))
- (INTERCONNECT mprj.io_out[23] io_out[23] (0.161:0.161:0.161))
- (INTERCONNECT mprj.io_out[24] io_out[24] (0.089:0.089:0.089))
- (INTERCONNECT mprj.io_out[25] io_out[25] (0.078:0.078:0.078))
- (INTERCONNECT mprj.io_out[26] io_out[26] (0.068:0.068:0.068))
- (INTERCONNECT mprj.io_out[27] io_out[27] (0.113:0.113:0.113))
- (INTERCONNECT mprj.io_out[28] io_out[28] (0.112:0.112:0.112))
- (INTERCONNECT mprj.io_out[29] io_out[29] (0.120:0.120:0.120))
- (INTERCONNECT mprj.io_out[2] io_out[2] (0.321:0.321:0.321))
- (INTERCONNECT mprj.io_out[30] io_out[30] (0.148:0.148:0.148))
- (INTERCONNECT mprj.io_out[31] io_out[31] (0.171:0.171:0.171))
- (INTERCONNECT mprj.io_out[32] io_out[32] (0.178:0.178:0.178))
- (INTERCONNECT mprj.io_out[33] io_out[33] (0.176:0.176:0.176))
- (INTERCONNECT mprj.io_out[34] io_out[34] (0.280:0.280:0.280))
- (INTERCONNECT mprj.io_out[35] io_out[35] (0.239:0.239:0.239))
- (INTERCONNECT mprj.io_out[36] io_out[36] (0.296:0.296:0.296))
- (INTERCONNECT mprj.io_out[37] io_out[37] (0.311:0.311:0.311))
- (INTERCONNECT mprj.io_out[3] io_out[3] (0.196:0.196:0.196))
- (INTERCONNECT mprj.io_out[4] io_out[4] (0.213:0.213:0.213))
- (INTERCONNECT mprj.io_out[5] io_out[5] (0.183:0.183:0.183))
- (INTERCONNECT mprj.io_out[6] io_out[6] (0.145:0.145:0.145))
- (INTERCONNECT mprj.io_out[7] io_out[7] (0.131:0.131:0.131))
- (INTERCONNECT mprj.io_out[8] io_out[8] (0.099:0.099:0.099))
- (INTERCONNECT mprj.io_out[9] io_out[9] (0.102:0.102:0.102))
- (INTERCONNECT mprj.irq[0] user_irq[0] (0.116:0.116:0.116))
- (INTERCONNECT mprj.irq[1] user_irq[1] (0.107:0.107:0.107))
- (INTERCONNECT mprj.irq[2] user_irq[2] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[0] la_data_out[0] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[10] la_data_out[10] (0.073:0.073:0.073))
- (INTERCONNECT mprj.la_data_out[11] la_data_out[11] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[12] la_data_out[12] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[13] la_data_out[13] (0.074:0.074:0.074))
- (INTERCONNECT mprj.la_data_out[14] la_data_out[14] (0.130:0.130:0.130))
- (INTERCONNECT mprj.la_data_out[15] la_data_out[15] (0.100:0.100:0.100))
- (INTERCONNECT mprj.la_data_out[16] la_data_out[16] (0.067:0.067:0.067))
- (INTERCONNECT mprj.la_data_out[17] la_data_out[17] (0.061:0.061:0.061))
- (INTERCONNECT mprj.la_data_out[18] la_data_out[18] (0.076:0.076:0.076))
- (INTERCONNECT mprj.la_data_out[19] la_data_out[19] (0.122:0.122:0.122))
- (INTERCONNECT mprj.la_data_out[1] la_data_out[1] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[20] la_data_out[20] (0.071:0.071:0.071))
- (INTERCONNECT mprj.la_data_out[21] la_data_out[21] (0.062:0.062:0.062))
- (INTERCONNECT mprj.la_data_out[22] la_data_out[22] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[23] la_data_out[23] (0.071:0.071:0.071))
- (INTERCONNECT mprj.la_data_out[24] la_data_out[24] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[25] la_data_out[25] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[26] la_data_out[26] (0.087:0.087:0.087))
- (INTERCONNECT mprj.la_data_out[27] la_data_out[27] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[28] la_data_out[28] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[29] la_data_out[29] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[2] la_data_out[2] (0.077:0.077:0.077))
- (INTERCONNECT mprj.la_data_out[30] la_data_out[30] (0.070:0.070:0.070))
- (INTERCONNECT mprj.la_data_out[31] la_data_out[31] (0.076:0.076:0.076))
- (INTERCONNECT mprj.la_data_out[32] la_data_out[32] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[33] la_data_out[33] (0.082:0.082:0.082))
- (INTERCONNECT mprj.la_data_out[34] la_data_out[34] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[35] la_data_out[35] (0.138:0.138:0.138))
- (INTERCONNECT mprj.la_data_out[36] la_data_out[36] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[37] la_data_out[37] (0.075:0.075:0.075))
- (INTERCONNECT mprj.la_data_out[38] la_data_out[38] (0.073:0.073:0.073))
- (INTERCONNECT mprj.la_data_out[39] la_data_out[39] (0.077:0.077:0.077))
- (INTERCONNECT mprj.la_data_out[3] la_data_out[3] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[40] la_data_out[40] (0.084:0.084:0.084))
- (INTERCONNECT mprj.la_data_out[41] la_data_out[41] (0.085:0.085:0.085))
- (INTERCONNECT mprj.la_data_out[42] la_data_out[42] (0.082:0.082:0.082))
- (INTERCONNECT mprj.la_data_out[43] la_data_out[43] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[44] la_data_out[44] (0.084:0.084:0.084))
- (INTERCONNECT mprj.la_data_out[45] la_data_out[45] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[46] la_data_out[46] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[47] la_data_out[47] (0.083:0.083:0.083))
- (INTERCONNECT mprj.la_data_out[48] la_data_out[48] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[49] la_data_out[49] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[4] la_data_out[4] (0.086:0.086:0.086))
- (INTERCONNECT mprj.la_data_out[50] la_data_out[50] (0.091:0.091:0.091))
- (INTERCONNECT mprj.la_data_out[51] la_data_out[51] (0.105:0.105:0.105))
- (INTERCONNECT mprj.la_data_out[52] la_data_out[52] (0.124:0.124:0.124))
- (INTERCONNECT mprj.la_data_out[53] la_data_out[53] (0.090:0.090:0.090))
- (INTERCONNECT mprj.la_data_out[54] la_data_out[54] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[55] la_data_out[55] (0.103:0.103:0.103))
- (INTERCONNECT mprj.la_data_out[56] la_data_out[56] (0.094:0.094:0.094))
- (INTERCONNECT mprj.la_data_out[57] la_data_out[57] (0.104:0.104:0.104))
- (INTERCONNECT mprj.la_data_out[58] la_data_out[58] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[59] la_data_out[59] (0.103:0.103:0.103))
- (INTERCONNECT mprj.la_data_out[5] la_data_out[5] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[60] la_data_out[60] (0.109:0.109:0.109))
- (INTERCONNECT mprj.la_data_out[61] la_data_out[61] (0.108:0.108:0.108))
- (INTERCONNECT mprj.la_data_out[62] la_data_out[62] (0.114:0.114:0.114))
- (INTERCONNECT mprj.la_data_out[63] la_data_out[63] (0.201:0.201:0.201))
- (INTERCONNECT mprj.la_data_out[6] la_data_out[6] (0.094:0.094:0.094))
- (INTERCONNECT mprj.la_data_out[7] la_data_out[7] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[8] la_data_out[8] (0.127:0.127:0.127))
- (INTERCONNECT mprj.la_data_out[9] la_data_out[9] (0.139:0.139:0.139))
- (INTERCONNECT mprj.wbs_ack_o wbs_ack_o (0.138:0.138:0.138))
- (INTERCONNECT mprj.wbs_dat_o[0] wbs_dat_o[0] (0.121:0.121:0.121))
- (INTERCONNECT mprj.wbs_dat_o[10] wbs_dat_o[10] (0.105:0.105:0.105))
- (INTERCONNECT mprj.wbs_dat_o[11] wbs_dat_o[11] (0.108:0.108:0.108))
- (INTERCONNECT mprj.wbs_dat_o[12] wbs_dat_o[12] (0.103:0.103:0.103))
- (INTERCONNECT mprj.wbs_dat_o[13] wbs_dat_o[13] (0.104:0.104:0.104))
- (INTERCONNECT mprj.wbs_dat_o[14] wbs_dat_o[14] (0.104:0.104:0.104))
- (INTERCONNECT mprj.wbs_dat_o[15] wbs_dat_o[15] (0.126:0.126:0.126))
- (INTERCONNECT mprj.wbs_dat_o[16] wbs_dat_o[16] (0.101:0.101:0.101))
- (INTERCONNECT mprj.wbs_dat_o[17] wbs_dat_o[17] (0.109:0.109:0.109))
- (INTERCONNECT mprj.wbs_dat_o[18] wbs_dat_o[18] (0.106:0.106:0.106))
- (INTERCONNECT mprj.wbs_dat_o[19] wbs_dat_o[19] (0.108:0.108:0.108))
- (INTERCONNECT mprj.wbs_dat_o[1] wbs_dat_o[1] (0.134:0.134:0.134))
- (INTERCONNECT mprj.wbs_dat_o[20] wbs_dat_o[20] (0.093:0.093:0.093))
- (INTERCONNECT mprj.wbs_dat_o[21] wbs_dat_o[21] (0.098:0.098:0.098))
- (INTERCONNECT mprj.wbs_dat_o[22] wbs_dat_o[22] (0.143:0.143:0.143))
- (INTERCONNECT mprj.wbs_dat_o[23] wbs_dat_o[23] (0.090:0.090:0.090))
- (INTERCONNECT mprj.wbs_dat_o[24] wbs_dat_o[24] (0.087:0.087:0.087))
- (INTERCONNECT mprj.wbs_dat_o[25] wbs_dat_o[25] (0.088:0.088:0.088))
- (INTERCONNECT mprj.wbs_dat_o[26] wbs_dat_o[26] (0.175:0.175:0.175))
- (INTERCONNECT mprj.wbs_dat_o[27] wbs_dat_o[27] (0.086:0.086:0.086))
- (INTERCONNECT mprj.wbs_dat_o[28] wbs_dat_o[28] (0.130:0.130:0.130))
- (INTERCONNECT mprj.wbs_dat_o[29] wbs_dat_o[29] (0.100:0.100:0.100))
- (INTERCONNECT mprj.wbs_dat_o[2] wbs_dat_o[2] (0.119:0.119:0.119))
- (INTERCONNECT mprj.wbs_dat_o[30] wbs_dat_o[30] (0.106:0.106:0.106))
- (INTERCONNECT mprj.wbs_dat_o[31] wbs_dat_o[31] (0.079:0.079:0.079))
- (INTERCONNECT mprj.wbs_dat_o[3] wbs_dat_o[3] (0.134:0.134:0.134))
- (INTERCONNECT mprj.wbs_dat_o[4] wbs_dat_o[4] (0.115:0.115:0.115))
- (INTERCONNECT mprj.wbs_dat_o[5] wbs_dat_o[5] (0.128:0.128:0.128))
- (INTERCONNECT mprj.wbs_dat_o[6] wbs_dat_o[6] (0.140:0.140:0.140))
- (INTERCONNECT mprj.wbs_dat_o[7] wbs_dat_o[7] (0.145:0.145:0.145))
- (INTERCONNECT mprj.wbs_dat_o[8] wbs_dat_o[8] (0.123:0.123:0.123))
- (INTERCONNECT mprj.wbs_dat_o[9] wbs_dat_o[9] (0.106:0.106:0.106))
- )
- )
- )
-)
diff --git a/sdf/multicorner/nom/user_project_wrapper.ss.sdf b/sdf/multicorner/nom/user_project_wrapper.ss.sdf
deleted file mode 100644
index 0940a78..0000000
--- a/sdf/multicorner/nom/user_project_wrapper.ss.sdf
+++ /dev/null
@@ -1,433 +0,0 @@
-(DELAYFILE
- (SDFVERSION "3.0")
- (DESIGN "user_project_wrapper")
- (DATE "Mon Dec 5 19:02:47 2022")
- (VENDOR "Parallax")
- (PROGRAM "STA")
- (VERSION "2.3.2")
- (DIVIDER .)
- (TIMESCALE 1ns)
- (CELL
- (CELLTYPE "user_project_wrapper")
- (INSTANCE)
- (DELAY
- (ABSOLUTE
- (INTERCONNECT io_in[0] mprj.io_in[0] (8.109:8.109:8.109) (5.066:5.066:5.066))
- (INTERCONNECT io_in[10] mprj.io_in[10] (4.427:4.427:4.427) (2.753:2.753:2.753))
- (INTERCONNECT io_in[11] mprj.io_in[11] (3.933:3.933:3.933) (2.445:2.445:2.445))
- (INTERCONNECT io_in[12] mprj.io_in[12] (2.230:2.230:2.230) (1.389:1.389:1.389))
- (INTERCONNECT io_in[13] mprj.io_in[13] (3.262:3.262:3.262) (2.032:2.032:2.032))
- (INTERCONNECT io_in[14] mprj.io_in[14] (3.275:3.275:3.275) (2.039:2.039:2.039))
- (INTERCONNECT io_in[15] mprj.io_in[15] (4.175:4.175:4.175) (2.599:2.599:2.599))
- (INTERCONNECT io_in[16] mprj.io_in[16] (2.300:2.300:2.300) (1.432:1.432:1.432))
- (INTERCONNECT io_in[17] mprj.io_in[17] (2.037:2.037:2.037) (1.267:1.267:1.267))
- (INTERCONNECT io_in[18] mprj.io_in[18] (1.439:1.439:1.439) (0.893:0.893:0.893))
- (INTERCONNECT io_in[19] mprj.io_in[19] (0.984:0.984:0.984) (0.610:0.610:0.610))
- (INTERCONNECT io_in[1] mprj.io_in[1] (13.975:13.975:13.975) (8.676:8.676:8.676))
- (INTERCONNECT io_in[20] mprj.io_in[20] (1.664:1.664:1.664) (1.034:1.034:1.034))
- (INTERCONNECT io_in[21] mprj.io_in[21] (1.901:1.901:1.901) (1.182:1.182:1.182))
- (INTERCONNECT io_in[22] mprj.io_in[22] (2.368:2.368:2.368) (1.474:1.474:1.474))
- (INTERCONNECT io_in[23] mprj.io_in[23] (6.823:6.823:6.823) (4.229:4.229:4.229))
- (INTERCONNECT io_in[24] mprj.io_in[24] (5.766:5.766:5.766) (3.582:3.582:3.582))
- (INTERCONNECT io_in[25] mprj.io_in[25] (3.446:3.446:3.446) (2.147:2.147:2.147))
- (INTERCONNECT io_in[26] mprj.io_in[26] (2.660:2.660:2.660) (1.658:1.658:1.658))
- (INTERCONNECT io_in[27] mprj.io_in[27] (4.833:4.833:4.833) (3.002:3.002:3.002))
- (INTERCONNECT io_in[28] mprj.io_in[28] (3.723:3.723:3.723) (2.318:2.318:2.318))
- (INTERCONNECT io_in[29] mprj.io_in[29] (3.822:3.822:3.822) (2.381:2.381:2.381))
- (INTERCONNECT io_in[2] mprj.io_in[2] (12.134:12.134:12.134) (7.547:7.547:7.547))
- (INTERCONNECT io_in[30] mprj.io_in[30] (4.046:4.046:4.046) (2.521:2.521:2.521))
- (INTERCONNECT io_in[31] mprj.io_in[31] (4.606:4.606:4.606) (2.873:2.873:2.873))
- (INTERCONNECT io_in[32] mprj.io_in[32] (6.656:6.656:6.656) (4.151:4.151:4.151))
- (INTERCONNECT io_in[33] mprj.io_in[33] (6.548:6.548:6.548) (4.087:4.087:4.087))
- (INTERCONNECT io_in[34] mprj.io_in[34] (7.546:7.546:7.546) (4.708:4.708:4.708))
- (INTERCONNECT io_in[35] mprj.io_in[35] (6.777:6.777:6.777) (4.237:4.237:4.237))
- (INTERCONNECT io_in[36] mprj.io_in[36] (5.763:5.763:5.763) (3.604:3.604:3.604))
- (INTERCONNECT io_in[37] mprj.io_in[37] (7.765:7.765:7.765) (4.857:4.857:4.857))
- (INTERCONNECT io_in[3] mprj.io_in[3] (12.171:12.171:12.171) (7.573:7.573:7.573))
- (INTERCONNECT io_in[4] mprj.io_in[4] (10.256:10.256:10.256) (6.383:6.383:6.383))
- (INTERCONNECT io_in[5] mprj.io_in[5] (9.630:9.630:9.630) (5.994:5.994:5.994))
- (INTERCONNECT io_in[6] mprj.io_in[6] (7.007:7.007:7.007) (4.363:4.363:4.363))
- (INTERCONNECT io_in[7] mprj.io_in[7] (5.200:5.200:5.200) (3.241:3.241:3.241))
- (INTERCONNECT io_in[8] mprj.io_in[8] (4.897:4.897:4.897) (3.050:3.050:3.050))
- (INTERCONNECT io_in[9] mprj.io_in[9] (4.671:4.671:4.671) (2.906:2.906:2.906))
- (INTERCONNECT la_data_in[0] mprj.la_data_in[0] (3.720:3.720:3.720) (2.317:2.317:2.317))
- (INTERCONNECT la_data_in[10] mprj.la_data_in[10] (2.937:2.937:2.937) (1.829:1.829:1.829))
- (INTERCONNECT la_data_in[11] mprj.la_data_in[11] (2.953:2.953:2.953) (1.839:1.839:1.839))
- (INTERCONNECT la_data_in[12] mprj.la_data_in[12] (4.783:4.783:4.783) (2.971:2.971:2.971))
- (INTERCONNECT la_data_in[13] mprj.la_data_in[13] (2.597:2.597:2.597) (1.616:1.616:1.616))
- (INTERCONNECT la_data_in[14] mprj.la_data_in[14] (2.782:2.782:2.782) (1.732:1.732:1.732))
- (INTERCONNECT la_data_in[15] mprj.la_data_in[15] (3.319:3.319:3.319) (2.065:2.065:2.065))
- (INTERCONNECT la_data_in[16] mprj.la_data_in[16] (4.638:4.638:4.638) (2.882:2.882:2.882))
- (INTERCONNECT la_data_in[17] mprj.la_data_in[17] (2.615:2.615:2.615) (1.627:1.627:1.627))
- (INTERCONNECT la_data_in[18] mprj.la_data_in[18] (2.396:2.396:2.396) (1.492:1.492:1.492))
- (INTERCONNECT la_data_in[19] mprj.la_data_in[19] (2.367:2.367:2.367) (1.474:1.474:1.474))
- (INTERCONNECT la_data_in[1] mprj.la_data_in[1] (5.192:5.192:5.192) (3.227:3.227:3.227))
- (INTERCONNECT la_data_in[20] mprj.la_data_in[20] (2.364:2.364:2.364) (1.472:1.472:1.472))
- (INTERCONNECT la_data_in[21] mprj.la_data_in[21] (4.433:4.433:4.433) (2.753:2.753:2.753))
- (INTERCONNECT la_data_in[22] mprj.la_data_in[22] (2.361:2.361:2.361) (1.468:1.468:1.468))
- (INTERCONNECT la_data_in[23] mprj.la_data_in[23] (2.388:2.388:2.388) (1.485:1.485:1.485))
- (INTERCONNECT la_data_in[24] mprj.la_data_in[24] (2.378:2.378:2.378) (1.482:1.482:1.482))
- (INTERCONNECT la_data_in[25] mprj.la_data_in[25] (3.412:3.412:3.412) (2.126:2.126:2.126))
- (INTERCONNECT la_data_in[26] mprj.la_data_in[26] (2.416:2.416:2.416) (1.504:1.504:1.504))
- (INTERCONNECT la_data_in[27] mprj.la_data_in[27] (3.322:3.322:3.322) (2.069:2.069:2.069))
- (INTERCONNECT la_data_in[28] mprj.la_data_in[28] (5.713:5.713:5.713) (3.551:3.551:3.551))
- (INTERCONNECT la_data_in[29] mprj.la_data_in[29] (3.786:3.786:3.786) (2.358:2.358:2.358))
- (INTERCONNECT la_data_in[2] mprj.la_data_in[2] (4.277:4.277:4.277) (2.662:2.662:2.662))
- (INTERCONNECT la_data_in[30] mprj.la_data_in[30] (5.947:5.947:5.947) (3.697:3.697:3.697))
- (INTERCONNECT la_data_in[31] mprj.la_data_in[31] (3.778:3.778:3.778) (2.354:2.354:2.354))
- (INTERCONNECT la_data_in[32] mprj.la_data_in[32] (3.818:3.818:3.818) (2.378:2.378:2.378))
- (INTERCONNECT la_data_in[33] mprj.la_data_in[33] (4.951:4.951:4.951) (3.074:3.074:3.074))
- (INTERCONNECT la_data_in[34] mprj.la_data_in[34] (3.325:3.325:3.325) (2.068:2.068:2.068))
- (INTERCONNECT la_data_in[35] mprj.la_data_in[35] (5.096:5.096:5.096) (3.165:3.165:3.165))
- (INTERCONNECT la_data_in[36] mprj.la_data_in[36] (4.754:4.754:4.754) (2.956:2.956:2.956))
- (INTERCONNECT la_data_in[37] mprj.la_data_in[37] (3.176:3.176:3.176) (1.978:1.978:1.978))
- (INTERCONNECT la_data_in[38] mprj.la_data_in[38] (3.527:3.527:3.527) (2.196:2.196:2.196))
- (INTERCONNECT la_data_in[39] mprj.la_data_in[39] (3.228:3.228:3.228) (2.011:2.011:2.011))
- (INTERCONNECT la_data_in[3] mprj.la_data_in[3] (3.329:3.329:3.329) (2.074:2.074:2.074))
- (INTERCONNECT la_data_in[40] mprj.la_data_in[40] (3.186:3.186:3.186) (1.985:1.985:1.985))
- (INTERCONNECT la_data_in[41] mprj.la_data_in[41] (3.229:3.229:3.229) (2.011:2.011:2.011))
- (INTERCONNECT la_data_in[42] mprj.la_data_in[42] (3.794:3.794:3.794) (2.363:2.363:2.363))
- (INTERCONNECT la_data_in[43] mprj.la_data_in[43] (3.693:3.693:3.693) (2.300:2.300:2.300))
- (INTERCONNECT la_data_in[44] mprj.la_data_in[44] (3.378:3.378:3.378) (2.104:2.104:2.104))
- (INTERCONNECT la_data_in[45] mprj.la_data_in[45] (3.738:3.738:3.738) (2.328:2.328:2.328))
- (INTERCONNECT la_data_in[46] mprj.la_data_in[46] (4.407:4.407:4.407) (2.745:2.745:2.745))
- (INTERCONNECT la_data_in[47] mprj.la_data_in[47] (3.601:3.601:3.601) (2.243:2.243:2.243))
- (INTERCONNECT la_data_in[48] mprj.la_data_in[48] (3.605:3.605:3.605) (2.245:2.245:2.245))
- (INTERCONNECT la_data_in[49] mprj.la_data_in[49] (4.051:4.051:4.051) (2.524:2.524:2.524))
- (INTERCONNECT la_data_in[4] mprj.la_data_in[4] (4.825:4.825:4.825) (2.998:2.998:2.998))
- (INTERCONNECT la_data_in[50] mprj.la_data_in[50] (3.463:3.463:3.463) (2.157:2.157:2.157))
- (INTERCONNECT la_data_in[51] mprj.la_data_in[51] (3.521:3.521:3.521) (2.193:2.193:2.193))
- (INTERCONNECT la_data_in[52] mprj.la_data_in[52] (4.415:4.415:4.415) (2.751:2.751:2.751))
- (INTERCONNECT la_data_in[53] mprj.la_data_in[53] (3.130:3.130:3.130) (1.950:1.950:1.950))
- (INTERCONNECT la_data_in[54] mprj.la_data_in[54] (4.030:4.030:4.030) (2.511:2.511:2.511))
- (INTERCONNECT la_data_in[55] mprj.la_data_in[55] (3.176:3.176:3.176) (1.978:1.978:1.978))
- (INTERCONNECT la_data_in[56] mprj.la_data_in[56] (3.728:3.728:3.728) (2.323:2.323:2.323))
- (INTERCONNECT la_data_in[57] mprj.la_data_in[57] (3.385:3.385:3.385) (2.110:2.110:2.110))
- (INTERCONNECT la_data_in[58] mprj.la_data_in[58] (3.557:3.557:3.557) (2.215:2.215:2.215))
- (INTERCONNECT la_data_in[59] mprj.la_data_in[59] (3.762:3.762:3.762) (2.344:2.344:2.344))
- (INTERCONNECT la_data_in[5] mprj.la_data_in[5] (3.354:3.354:3.354) (2.089:2.089:2.089))
- (INTERCONNECT la_data_in[60] mprj.la_data_in[60] (3.901:3.901:3.901) (2.432:2.432:2.432))
- (INTERCONNECT la_data_in[61] mprj.la_data_in[61] (4.990:4.990:4.990) (3.110:3.110:3.110))
- (INTERCONNECT la_data_in[62] mprj.la_data_in[62] (3.458:3.458:3.458) (2.155:2.155:2.155))
- (INTERCONNECT la_data_in[63] mprj.la_data_in[63] (4.479:4.479:4.479) (2.792:2.792:2.792))
- (INTERCONNECT la_data_in[6] mprj.la_data_in[6] (3.158:3.158:3.158) (1.967:1.967:1.967))
- (INTERCONNECT la_data_in[7] mprj.la_data_in[7] (2.998:2.998:2.998) (1.868:1.868:1.868))
- (INTERCONNECT la_data_in[8] mprj.la_data_in[8] (4.567:4.567:4.567) (2.841:2.841:2.841))
- (INTERCONNECT la_data_in[9] mprj.la_data_in[9] (5.192:5.192:5.192) (3.227:3.227:3.227))
- (INTERCONNECT la_oenb[0] mprj.la_oenb[0] (4.313:4.313:4.313) (2.683:2.683:2.683))
- (INTERCONNECT la_oenb[10] mprj.la_oenb[10] (4.939:4.939:4.939) (3.070:3.070:3.070))
- (INTERCONNECT la_oenb[11] mprj.la_oenb[11] (4.338:4.338:4.338) (2.697:2.697:2.697))
- (INTERCONNECT la_oenb[12] mprj.la_oenb[12] (2.843:2.843:2.843) (1.770:1.770:1.770))
- (INTERCONNECT la_oenb[13] mprj.la_oenb[13] (4.684:4.684:4.684) (2.910:2.910:2.910))
- (INTERCONNECT la_oenb[14] mprj.la_oenb[14] (2.787:2.787:2.787) (1.735:1.735:1.735))
- (INTERCONNECT la_oenb[15] mprj.la_oenb[15] (2.447:2.447:2.447) (1.525:1.525:1.525))
- (INTERCONNECT la_oenb[16] mprj.la_oenb[16] (2.796:2.796:2.796) (1.740:1.740:1.740))
- (INTERCONNECT la_oenb[17] mprj.la_oenb[17] (4.364:4.364:4.364) (2.710:2.710:2.710))
- (INTERCONNECT la_oenb[18] mprj.la_oenb[18] (2.722:2.722:2.722) (1.696:1.696:1.696))
- (INTERCONNECT la_oenb[19] mprj.la_oenb[19] (4.527:4.527:4.527) (2.811:2.811:2.811))
- (INTERCONNECT la_oenb[1] mprj.la_oenb[1] (4.736:4.736:4.736) (2.947:2.947:2.947))
- (INTERCONNECT la_oenb[20] mprj.la_oenb[20] (2.337:2.337:2.337) (1.455:1.455:1.455))
- (INTERCONNECT la_oenb[21] mprj.la_oenb[21] (2.350:2.350:2.350) (1.461:1.461:1.461))
- (INTERCONNECT la_oenb[22] mprj.la_oenb[22] (2.378:2.378:2.378) (1.479:1.479:1.479))
- (INTERCONNECT la_oenb[23] mprj.la_oenb[23] (2.351:2.351:2.351) (1.464:1.464:1.464))
- (INTERCONNECT la_oenb[24] mprj.la_oenb[24] (2.452:2.452:2.452) (1.527:1.527:1.527))
- (INTERCONNECT la_oenb[25] mprj.la_oenb[25] (2.545:2.545:2.545) (1.583:1.583:1.583))
- (INTERCONNECT la_oenb[26] mprj.la_oenb[26] (4.578:4.578:4.578) (2.843:2.843:2.843))
- (INTERCONNECT la_oenb[27] mprj.la_oenb[27] (2.636:2.636:2.636) (1.642:1.642:1.642))
- (INTERCONNECT la_oenb[28] mprj.la_oenb[28] (4.522:4.522:4.522) (2.808:2.808:2.808))
- (INTERCONNECT la_oenb[29] mprj.la_oenb[29] (2.587:2.587:2.587) (1.611:1.611:1.611))
- (INTERCONNECT la_oenb[2] mprj.la_oenb[2] (4.975:4.975:4.975) (3.091:3.091:3.091))
- (INTERCONNECT la_oenb[30] mprj.la_oenb[30] (3.801:3.801:3.801) (2.361:2.361:2.361))
- (INTERCONNECT la_oenb[31] mprj.la_oenb[31] (2.568:2.568:2.568) (1.599:1.599:1.599))
- (INTERCONNECT la_oenb[32] mprj.la_oenb[32] (2.607:2.607:2.607) (1.623:1.623:1.623))
- (INTERCONNECT la_oenb[33] mprj.la_oenb[33] (2.777:2.777:2.777) (1.730:1.730:1.730))
- (INTERCONNECT la_oenb[34] mprj.la_oenb[34] (2.973:2.973:2.973) (1.852:1.852:1.852))
- (INTERCONNECT la_oenb[35] mprj.la_oenb[35] (5.272:5.272:5.272) (3.280:3.280:3.280))
- (INTERCONNECT la_oenb[36] mprj.la_oenb[36] (2.864:2.864:2.864) (1.784:1.784:1.784))
- (INTERCONNECT la_oenb[37] mprj.la_oenb[37] (3.197:3.197:3.197) (1.991:1.991:1.991))
- (INTERCONNECT la_oenb[38] mprj.la_oenb[38] (2.841:2.841:2.841) (1.770:1.770:1.770))
- (INTERCONNECT la_oenb[39] mprj.la_oenb[39] (3.874:3.874:3.874) (2.412:2.412:2.412))
- (INTERCONNECT la_oenb[3] mprj.la_oenb[3] (2.797:2.797:2.797) (1.742:1.742:1.742))
- (INTERCONNECT la_oenb[40] mprj.la_oenb[40] (2.793:2.793:2.793) (1.738:1.738:1.738))
- (INTERCONNECT la_oenb[41] mprj.la_oenb[41] (2.813:2.813:2.813) (1.751:1.751:1.751))
- (INTERCONNECT la_oenb[42] mprj.la_oenb[42] (3.240:3.240:3.240) (2.015:2.015:2.015))
- (INTERCONNECT la_oenb[43] mprj.la_oenb[43] (2.993:2.993:2.993) (1.864:1.864:1.864))
- (INTERCONNECT la_oenb[44] mprj.la_oenb[44] (5.150:5.150:5.150) (3.205:3.205:3.205))
- (INTERCONNECT la_oenb[45] mprj.la_oenb[45] (3.017:3.017:3.017) (1.879:1.879:1.879))
- (INTERCONNECT la_oenb[46] mprj.la_oenb[46] (3.057:3.057:3.057) (1.904:1.904:1.904))
- (INTERCONNECT la_oenb[47] mprj.la_oenb[47] (3.042:3.042:3.042) (1.895:1.895:1.895))
- (INTERCONNECT la_oenb[48] mprj.la_oenb[48] (3.720:3.720:3.720) (2.317:2.317:2.317))
- (INTERCONNECT la_oenb[49] mprj.la_oenb[49] (3.120:3.120:3.120) (1.944:1.944:1.944))
- (INTERCONNECT la_oenb[4] mprj.la_oenb[4] (3.175:3.175:3.175) (1.978:1.978:1.978))
- (INTERCONNECT la_oenb[50] mprj.la_oenb[50] (4.110:4.110:4.110) (2.560:2.560:2.560))
- (INTERCONNECT la_oenb[51] mprj.la_oenb[51] (3.139:3.139:3.139) (1.955:1.955:1.955))
- (INTERCONNECT la_oenb[52] mprj.la_oenb[52] (3.443:3.443:3.443) (2.145:2.145:2.145))
- (INTERCONNECT la_oenb[53] mprj.la_oenb[53] (3.135:3.135:3.135) (1.953:1.953:1.953))
- (INTERCONNECT la_oenb[54] mprj.la_oenb[54] (5.514:5.514:5.514) (3.433:3.433:3.433))
- (INTERCONNECT la_oenb[55] mprj.la_oenb[55] (3.606:3.606:3.606) (2.247:2.247:2.247))
- (INTERCONNECT la_oenb[56] mprj.la_oenb[56] (4.391:4.391:4.391) (2.732:2.732:2.732))
- (INTERCONNECT la_oenb[57] mprj.la_oenb[57] (7.244:7.244:7.244) (4.512:4.512:4.512))
- (INTERCONNECT la_oenb[58] mprj.la_oenb[58] (3.914:3.914:3.914) (2.439:2.439:2.439))
- (INTERCONNECT la_oenb[59] mprj.la_oenb[59] (5.386:5.386:5.386) (3.350:3.350:3.350))
- (INTERCONNECT la_oenb[5] mprj.la_oenb[5] (4.683:4.683:4.683) (2.913:2.913:2.913))
- (INTERCONNECT la_oenb[60] mprj.la_oenb[60] (5.254:5.254:5.254) (3.266:3.266:3.266))
- (INTERCONNECT la_oenb[61] mprj.la_oenb[61] (4.570:4.570:4.570) (2.844:2.844:2.844))
- (INTERCONNECT la_oenb[62] mprj.la_oenb[62] (3.753:3.753:3.753) (2.339:2.339:2.339))
- (INTERCONNECT la_oenb[63] mprj.la_oenb[63] (5.715:5.715:5.715) (3.553:3.553:3.553))
- (INTERCONNECT la_oenb[6] mprj.la_oenb[6] (3.913:3.913:3.913) (2.435:2.435:2.435))
- (INTERCONNECT la_oenb[7] mprj.la_oenb[7] (3.517:3.517:3.517) (2.189:2.189:2.189))
- (INTERCONNECT la_oenb[8] mprj.la_oenb[8] (3.171:3.171:3.171) (1.975:1.975:1.975))
- (INTERCONNECT la_oenb[9] mprj.la_oenb[9] (2.705:2.705:2.705) (1.684:1.684:1.684))
- (INTERCONNECT wb_clk_i mprj.wb_clk_i (3.984:3.984:3.984) (2.485:2.485:2.485))
- (INTERCONNECT wb_rst_i mprj.wb_rst_i (4.918:4.918:4.918) (3.068:3.068:3.068))
- (INTERCONNECT wbs_adr_i[0] mprj.wbs_adr_i[0] (3.906:3.906:3.906) (2.435:2.435:2.435))
- (INTERCONNECT wbs_adr_i[10] mprj.wbs_adr_i[10] (4.289:4.289:4.289) (2.674:2.674:2.674))
- (INTERCONNECT wbs_adr_i[11] mprj.wbs_adr_i[11] (3.850:3.850:3.850) (2.400:2.400:2.400))
- (INTERCONNECT wbs_adr_i[12] mprj.wbs_adr_i[12] (4.705:4.705:4.705) (2.932:2.932:2.932))
- (INTERCONNECT wbs_adr_i[13] mprj.wbs_adr_i[13] (4.721:4.721:4.721) (2.942:2.942:2.942))
- (INTERCONNECT wbs_adr_i[14] mprj.wbs_adr_i[14] (4.050:4.050:4.050) (2.524:2.524:2.524))
- (INTERCONNECT wbs_adr_i[15] mprj.wbs_adr_i[15] (4.860:4.860:4.860) (3.028:3.028:3.028))
- (INTERCONNECT wbs_adr_i[16] mprj.wbs_adr_i[16] (5.085:5.085:5.085) (3.168:3.168:3.168))
- (INTERCONNECT wbs_adr_i[17] mprj.wbs_adr_i[17] (4.865:4.865:4.865) (3.032:3.032:3.032))
- (INTERCONNECT wbs_adr_i[18] mprj.wbs_adr_i[18] (4.820:4.820:4.820) (3.003:3.003:3.003))
- (INTERCONNECT wbs_adr_i[19] mprj.wbs_adr_i[19] (4.716:4.716:4.716) (2.939:2.939:2.939))
- (INTERCONNECT wbs_adr_i[1] mprj.wbs_adr_i[1] (4.798:4.798:4.798) (2.993:2.993:2.993))
- (INTERCONNECT wbs_adr_i[20] mprj.wbs_adr_i[20] (6.538:6.538:6.538) (4.066:4.066:4.066))
- (INTERCONNECT wbs_adr_i[21] mprj.wbs_adr_i[21] (3.744:3.744:3.744) (2.332:2.332:2.332))
- (INTERCONNECT wbs_adr_i[22] mprj.wbs_adr_i[22] (4.623:4.623:4.623) (2.880:2.880:2.880))
- (INTERCONNECT wbs_adr_i[23] mprj.wbs_adr_i[23] (3.916:3.916:3.916) (2.440:2.440:2.440))
- (INTERCONNECT wbs_adr_i[24] mprj.wbs_adr_i[24] (3.691:3.691:3.691) (2.299:2.299:2.299))
- (INTERCONNECT wbs_adr_i[25] mprj.wbs_adr_i[25] (4.332:4.332:4.332) (2.698:2.698:2.698))
- (INTERCONNECT wbs_adr_i[26] mprj.wbs_adr_i[26] (5.486:5.486:5.486) (3.409:3.409:3.409))
- (INTERCONNECT wbs_adr_i[27] mprj.wbs_adr_i[27] (3.656:3.656:3.656) (2.278:2.278:2.278))
- (INTERCONNECT wbs_adr_i[28] mprj.wbs_adr_i[28] (3.586:3.586:3.586) (2.234:2.234:2.234))
- (INTERCONNECT wbs_adr_i[29] mprj.wbs_adr_i[29] (4.010:4.010:4.010) (2.498:2.498:2.498))
- (INTERCONNECT wbs_adr_i[2] mprj.wbs_adr_i[2] (4.453:4.453:4.453) (2.778:2.778:2.778))
- (INTERCONNECT wbs_adr_i[30] mprj.wbs_adr_i[30] (4.364:4.364:4.364) (2.718:2.718:2.718))
- (INTERCONNECT wbs_adr_i[31] mprj.wbs_adr_i[31] (3.824:3.824:3.824) (2.382:2.382:2.382))
- (INTERCONNECT wbs_adr_i[3] mprj.wbs_adr_i[3] (3.597:3.597:3.597) (2.242:2.242:2.242))
- (INTERCONNECT wbs_adr_i[4] mprj.wbs_adr_i[4] (4.083:4.083:4.083) (2.546:2.546:2.546))
- (INTERCONNECT wbs_adr_i[5] mprj.wbs_adr_i[5] (4.256:4.256:4.256) (2.653:2.653:2.653))
- (INTERCONNECT wbs_adr_i[6] mprj.wbs_adr_i[6] (4.453:4.453:4.453) (2.776:2.776:2.776))
- (INTERCONNECT wbs_adr_i[7] mprj.wbs_adr_i[7] (3.840:3.840:3.840) (2.393:2.393:2.393))
- (INTERCONNECT wbs_adr_i[8] mprj.wbs_adr_i[8] (5.482:5.482:5.482) (3.418:3.418:3.418))
- (INTERCONNECT wbs_adr_i[9] mprj.wbs_adr_i[9] (4.343:4.343:4.343) (2.707:2.707:2.707))
- (INTERCONNECT wbs_cyc_i mprj.wbs_cyc_i (4.484:4.484:4.484) (2.796:2.796:2.796))
- (INTERCONNECT wbs_dat_i[0] mprj.wbs_dat_i[0] (3.794:3.794:3.794) (2.365:2.365:2.365))
- (INTERCONNECT wbs_dat_i[10] mprj.wbs_dat_i[10] (3.452:3.452:3.452) (2.151:2.151:2.151))
- (INTERCONNECT wbs_dat_i[11] mprj.wbs_dat_i[11] (3.452:3.452:3.452) (2.151:2.151:2.151))
- (INTERCONNECT wbs_dat_i[12] mprj.wbs_dat_i[12] (3.396:3.396:3.396) (2.116:2.116:2.116))
- (INTERCONNECT wbs_dat_i[13] mprj.wbs_dat_i[13] (4.149:4.149:4.149) (2.586:2.586:2.586))
- (INTERCONNECT wbs_dat_i[14] mprj.wbs_dat_i[14] (3.351:3.351:3.351) (2.088:2.088:2.088))
- (INTERCONNECT wbs_dat_i[15] mprj.wbs_dat_i[15] (4.814:4.814:4.814) (3.000:3.000:3.000))
- (INTERCONNECT wbs_dat_i[16] mprj.wbs_dat_i[16] (3.379:3.379:3.379) (2.105:2.105:2.105))
- (INTERCONNECT wbs_dat_i[17] mprj.wbs_dat_i[17] (4.673:4.673:4.673) (2.912:2.912:2.912))
- (INTERCONNECT wbs_dat_i[18] mprj.wbs_dat_i[18] (4.768:4.768:4.768) (2.971:2.971:2.971))
- (INTERCONNECT wbs_dat_i[19] mprj.wbs_dat_i[19] (3.227:3.227:3.227) (2.010:2.010:2.010))
- (INTERCONNECT wbs_dat_i[1] mprj.wbs_dat_i[1] (4.593:4.593:4.593) (2.865:2.865:2.865))
- (INTERCONNECT wbs_dat_i[20] mprj.wbs_dat_i[20] (6.134:6.134:6.134) (3.813:3.813:3.813))
- (INTERCONNECT wbs_dat_i[21] mprj.wbs_dat_i[21] (3.944:3.944:3.944) (2.457:2.457:2.457))
- (INTERCONNECT wbs_dat_i[22] mprj.wbs_dat_i[22] (4.476:4.476:4.476) (2.788:2.788:2.788))
- (INTERCONNECT wbs_dat_i[23] mprj.wbs_dat_i[23] (3.858:3.858:3.858) (2.403:2.403:2.403))
- (INTERCONNECT wbs_dat_i[24] mprj.wbs_dat_i[24] (3.766:3.766:3.766) (2.345:2.345:2.345))
- (INTERCONNECT wbs_dat_i[25] mprj.wbs_dat_i[25] (3.798:3.798:3.798) (2.365:2.365:2.365))
- (INTERCONNECT wbs_dat_i[26] mprj.wbs_dat_i[26] (3.785:3.785:3.785) (2.358:2.358:2.358))
- (INTERCONNECT wbs_dat_i[27] mprj.wbs_dat_i[27] (3.456:3.456:3.456) (2.152:2.152:2.152))
- (INTERCONNECT wbs_dat_i[28] mprj.wbs_dat_i[28] (3.645:3.645:3.645) (2.270:2.270:2.270))
- (INTERCONNECT wbs_dat_i[29] mprj.wbs_dat_i[29] (3.893:3.893:3.893) (2.424:2.424:2.424))
- (INTERCONNECT wbs_dat_i[2] mprj.wbs_dat_i[2] (4.172:4.172:4.172) (2.601:2.601:2.601))
- (INTERCONNECT wbs_dat_i[30] mprj.wbs_dat_i[30] (3.033:3.033:3.033) (1.889:1.889:1.889))
- (INTERCONNECT wbs_dat_i[31] mprj.wbs_dat_i[31] (3.468:3.468:3.468) (2.160:2.160:2.160))
- (INTERCONNECT wbs_dat_i[3] mprj.wbs_dat_i[3] (4.227:4.227:4.227) (2.635:2.635:2.635))
- (INTERCONNECT wbs_dat_i[4] mprj.wbs_dat_i[4] (4.878:4.878:4.878) (3.041:3.041:3.041))
- (INTERCONNECT wbs_dat_i[5] mprj.wbs_dat_i[5] (4.516:4.516:4.516) (2.816:2.816:2.816))
- (INTERCONNECT wbs_dat_i[6] mprj.wbs_dat_i[6] (3.576:3.576:3.576) (2.229:2.229:2.229))
- (INTERCONNECT wbs_dat_i[7] mprj.wbs_dat_i[7] (4.404:4.404:4.404) (2.746:2.746:2.746))
- (INTERCONNECT wbs_dat_i[8] mprj.wbs_dat_i[8] (3.634:3.634:3.634) (2.264:2.264:2.264))
- (INTERCONNECT wbs_dat_i[9] mprj.wbs_dat_i[9] (3.500:3.500:3.500) (2.181:2.181:2.181))
- (INTERCONNECT wbs_sel_i[0] mprj.wbs_sel_i[0] (3.801:3.801:3.801) (2.369:2.369:2.369))
- (INTERCONNECT wbs_sel_i[1] mprj.wbs_sel_i[1] (3.733:3.733:3.733) (2.326:2.326:2.326))
- (INTERCONNECT wbs_sel_i[2] mprj.wbs_sel_i[2] (6.230:6.230:6.230) (3.873:3.873:3.873))
- (INTERCONNECT wbs_sel_i[3] mprj.wbs_sel_i[3] (5.327:5.327:5.327) (3.315:3.315:3.315))
- (INTERCONNECT wbs_stb_i mprj.wbs_stb_i (5.553:5.553:5.553) (3.456:3.456:3.456))
- (INTERCONNECT wbs_we_i mprj.wbs_we_i (6.452:6.452:6.452) (4.011:4.011:4.011))
- (INTERCONNECT mprj.io_oeb[0] io_oeb[0] (0.448:0.448:0.448))
- (INTERCONNECT mprj.io_oeb[10] io_oeb[10] (0.078:0.078:0.078))
- (INTERCONNECT mprj.io_oeb[11] io_oeb[11] (0.101:0.101:0.101))
- (INTERCONNECT mprj.io_oeb[12] io_oeb[12] (0.059:0.059:0.059))
- (INTERCONNECT mprj.io_oeb[13] io_oeb[13] (0.098:0.098:0.098))
- (INTERCONNECT mprj.io_oeb[14] io_oeb[14] (0.085:0.085:0.085))
- (INTERCONNECT mprj.io_oeb[15] io_oeb[15] (0.072:0.072:0.072))
- (INTERCONNECT mprj.io_oeb[16] io_oeb[16] (0.050:0.050:0.050))
- (INTERCONNECT mprj.io_oeb[17] io_oeb[17] (0.032:0.032:0.032))
- (INTERCONNECT mprj.io_oeb[18] io_oeb[18] (0.021:0.021:0.021))
- (INTERCONNECT mprj.io_oeb[19] io_oeb[19] (0.026:0.026:0.026))
- (INTERCONNECT mprj.io_oeb[1] io_oeb[1] (0.524:0.524:0.524))
- (INTERCONNECT mprj.io_oeb[20] io_oeb[20] (0.041:0.041:0.041))
- (INTERCONNECT mprj.io_oeb[21] io_oeb[21] (0.054:0.054:0.054))
- (INTERCONNECT mprj.io_oeb[22] io_oeb[22] (0.071:0.071:0.071))
- (INTERCONNECT mprj.io_oeb[23] io_oeb[23] (0.174:0.174:0.174))
- (INTERCONNECT mprj.io_oeb[24] io_oeb[24] (0.088:0.088:0.088))
- (INTERCONNECT mprj.io_oeb[25] io_oeb[25] (0.074:0.074:0.074))
- (INTERCONNECT mprj.io_oeb[26] io_oeb[26] (0.137:0.137:0.137))
- (INTERCONNECT mprj.io_oeb[27] io_oeb[27] (0.111:0.111:0.111))
- (INTERCONNECT mprj.io_oeb[28] io_oeb[28] (0.112:0.112:0.112))
- (INTERCONNECT mprj.io_oeb[29] io_oeb[29] (0.198:0.198:0.198))
- (INTERCONNECT mprj.io_oeb[2] io_oeb[2] (0.458:0.458:0.458))
- (INTERCONNECT mprj.io_oeb[30] io_oeb[30] (0.126:0.126:0.126))
- (INTERCONNECT mprj.io_oeb[31] io_oeb[31] (0.174:0.174:0.174))
- (INTERCONNECT mprj.io_oeb[32] io_oeb[32] (0.190:0.190:0.190))
- (INTERCONNECT mprj.io_oeb[33] io_oeb[33] (0.220:0.220:0.220))
- (INTERCONNECT mprj.io_oeb[34] io_oeb[34] (0.258:0.258:0.258))
- (INTERCONNECT mprj.io_oeb[35] io_oeb[35] (0.238:0.238:0.238))
- (INTERCONNECT mprj.io_oeb[36] io_oeb[36] (0.247:0.247:0.247))
- (INTERCONNECT mprj.io_oeb[37] io_oeb[37] (0.295:0.295:0.295))
- (INTERCONNECT mprj.io_oeb[3] io_oeb[3] (0.475:0.475:0.475))
- (INTERCONNECT mprj.io_oeb[4] io_oeb[4] (0.158:0.158:0.158))
- (INTERCONNECT mprj.io_oeb[5] io_oeb[5] (0.167:0.167:0.167))
- (INTERCONNECT mprj.io_oeb[6] io_oeb[6] (0.134:0.134:0.134))
- (INTERCONNECT mprj.io_oeb[7] io_oeb[7] (0.110:0.110:0.110))
- (INTERCONNECT mprj.io_oeb[8] io_oeb[8] (0.099:0.099:0.099))
- (INTERCONNECT mprj.io_oeb[9] io_oeb[9] (0.104:0.104:0.104))
- (INTERCONNECT mprj.io_out[0] io_out[0] (0.248:0.248:0.248))
- (INTERCONNECT mprj.io_out[10] io_out[10] (0.077:0.077:0.077))
- (INTERCONNECT mprj.io_out[11] io_out[11] (0.052:0.052:0.052))
- (INTERCONNECT mprj.io_out[12] io_out[12] (0.056:0.056:0.056))
- (INTERCONNECT mprj.io_out[13] io_out[13] (0.065:0.065:0.065))
- (INTERCONNECT mprj.io_out[14] io_out[14] (0.075:0.075:0.075))
- (INTERCONNECT mprj.io_out[15] io_out[15] (0.109:0.109:0.109))
- (INTERCONNECT mprj.io_out[16] io_out[16] (0.076:0.076:0.076))
- (INTERCONNECT mprj.io_out[17] io_out[17] (0.035:0.035:0.035))
- (INTERCONNECT mprj.io_out[18] io_out[18] (0.024:0.024:0.024))
- (INTERCONNECT mprj.io_out[19] io_out[19] (0.024:0.024:0.024))
- (INTERCONNECT mprj.io_out[1] io_out[1] (0.554:0.554:0.554))
- (INTERCONNECT mprj.io_out[20] io_out[20] (0.037:0.037:0.037))
- (INTERCONNECT mprj.io_out[21] io_out[21] (0.060:0.060:0.060))
- (INTERCONNECT mprj.io_out[22] io_out[22] (0.066:0.066:0.066))
- (INTERCONNECT mprj.io_out[23] io_out[23] (0.161:0.161:0.161))
- (INTERCONNECT mprj.io_out[24] io_out[24] (0.089:0.089:0.089))
- (INTERCONNECT mprj.io_out[25] io_out[25] (0.078:0.078:0.078))
- (INTERCONNECT mprj.io_out[26] io_out[26] (0.068:0.068:0.068))
- (INTERCONNECT mprj.io_out[27] io_out[27] (0.113:0.113:0.113))
- (INTERCONNECT mprj.io_out[28] io_out[28] (0.112:0.112:0.112))
- (INTERCONNECT mprj.io_out[29] io_out[29] (0.120:0.120:0.120))
- (INTERCONNECT mprj.io_out[2] io_out[2] (0.321:0.321:0.321))
- (INTERCONNECT mprj.io_out[30] io_out[30] (0.148:0.148:0.148))
- (INTERCONNECT mprj.io_out[31] io_out[31] (0.171:0.171:0.171))
- (INTERCONNECT mprj.io_out[32] io_out[32] (0.178:0.178:0.178))
- (INTERCONNECT mprj.io_out[33] io_out[33] (0.176:0.176:0.176))
- (INTERCONNECT mprj.io_out[34] io_out[34] (0.280:0.280:0.280))
- (INTERCONNECT mprj.io_out[35] io_out[35] (0.239:0.239:0.239))
- (INTERCONNECT mprj.io_out[36] io_out[36] (0.296:0.296:0.296))
- (INTERCONNECT mprj.io_out[37] io_out[37] (0.311:0.311:0.311))
- (INTERCONNECT mprj.io_out[3] io_out[3] (0.196:0.196:0.196))
- (INTERCONNECT mprj.io_out[4] io_out[4] (0.213:0.213:0.213))
- (INTERCONNECT mprj.io_out[5] io_out[5] (0.183:0.183:0.183))
- (INTERCONNECT mprj.io_out[6] io_out[6] (0.145:0.145:0.145))
- (INTERCONNECT mprj.io_out[7] io_out[7] (0.131:0.131:0.131))
- (INTERCONNECT mprj.io_out[8] io_out[8] (0.099:0.099:0.099))
- (INTERCONNECT mprj.io_out[9] io_out[9] (0.102:0.102:0.102))
- (INTERCONNECT mprj.irq[0] user_irq[0] (0.116:0.116:0.116))
- (INTERCONNECT mprj.irq[1] user_irq[1] (0.107:0.107:0.107))
- (INTERCONNECT mprj.irq[2] user_irq[2] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[0] la_data_out[0] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[10] la_data_out[10] (0.073:0.073:0.073))
- (INTERCONNECT mprj.la_data_out[11] la_data_out[11] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[12] la_data_out[12] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[13] la_data_out[13] (0.074:0.074:0.074))
- (INTERCONNECT mprj.la_data_out[14] la_data_out[14] (0.130:0.130:0.130))
- (INTERCONNECT mprj.la_data_out[15] la_data_out[15] (0.100:0.100:0.100))
- (INTERCONNECT mprj.la_data_out[16] la_data_out[16] (0.067:0.067:0.067))
- (INTERCONNECT mprj.la_data_out[17] la_data_out[17] (0.061:0.061:0.061))
- (INTERCONNECT mprj.la_data_out[18] la_data_out[18] (0.076:0.076:0.076))
- (INTERCONNECT mprj.la_data_out[19] la_data_out[19] (0.122:0.122:0.122))
- (INTERCONNECT mprj.la_data_out[1] la_data_out[1] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[20] la_data_out[20] (0.071:0.071:0.071))
- (INTERCONNECT mprj.la_data_out[21] la_data_out[21] (0.062:0.062:0.062))
- (INTERCONNECT mprj.la_data_out[22] la_data_out[22] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[23] la_data_out[23] (0.071:0.071:0.071))
- (INTERCONNECT mprj.la_data_out[24] la_data_out[24] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[25] la_data_out[25] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[26] la_data_out[26] (0.087:0.087:0.087))
- (INTERCONNECT mprj.la_data_out[27] la_data_out[27] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[28] la_data_out[28] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[29] la_data_out[29] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[2] la_data_out[2] (0.077:0.077:0.077))
- (INTERCONNECT mprj.la_data_out[30] la_data_out[30] (0.070:0.070:0.070))
- (INTERCONNECT mprj.la_data_out[31] la_data_out[31] (0.076:0.076:0.076))
- (INTERCONNECT mprj.la_data_out[32] la_data_out[32] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[33] la_data_out[33] (0.082:0.082:0.082))
- (INTERCONNECT mprj.la_data_out[34] la_data_out[34] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[35] la_data_out[35] (0.138:0.138:0.138))
- (INTERCONNECT mprj.la_data_out[36] la_data_out[36] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[37] la_data_out[37] (0.075:0.075:0.075))
- (INTERCONNECT mprj.la_data_out[38] la_data_out[38] (0.073:0.073:0.073))
- (INTERCONNECT mprj.la_data_out[39] la_data_out[39] (0.077:0.077:0.077))
- (INTERCONNECT mprj.la_data_out[3] la_data_out[3] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[40] la_data_out[40] (0.084:0.084:0.084))
- (INTERCONNECT mprj.la_data_out[41] la_data_out[41] (0.085:0.085:0.085))
- (INTERCONNECT mprj.la_data_out[42] la_data_out[42] (0.082:0.082:0.082))
- (INTERCONNECT mprj.la_data_out[43] la_data_out[43] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[44] la_data_out[44] (0.084:0.084:0.084))
- (INTERCONNECT mprj.la_data_out[45] la_data_out[45] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[46] la_data_out[46] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[47] la_data_out[47] (0.083:0.083:0.083))
- (INTERCONNECT mprj.la_data_out[48] la_data_out[48] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[49] la_data_out[49] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[4] la_data_out[4] (0.086:0.086:0.086))
- (INTERCONNECT mprj.la_data_out[50] la_data_out[50] (0.091:0.091:0.091))
- (INTERCONNECT mprj.la_data_out[51] la_data_out[51] (0.105:0.105:0.105))
- (INTERCONNECT mprj.la_data_out[52] la_data_out[52] (0.124:0.124:0.124))
- (INTERCONNECT mprj.la_data_out[53] la_data_out[53] (0.090:0.090:0.090))
- (INTERCONNECT mprj.la_data_out[54] la_data_out[54] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[55] la_data_out[55] (0.103:0.103:0.103))
- (INTERCONNECT mprj.la_data_out[56] la_data_out[56] (0.094:0.094:0.094))
- (INTERCONNECT mprj.la_data_out[57] la_data_out[57] (0.104:0.104:0.104))
- (INTERCONNECT mprj.la_data_out[58] la_data_out[58] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[59] la_data_out[59] (0.103:0.103:0.103))
- (INTERCONNECT mprj.la_data_out[5] la_data_out[5] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[60] la_data_out[60] (0.109:0.109:0.109))
- (INTERCONNECT mprj.la_data_out[61] la_data_out[61] (0.108:0.108:0.108))
- (INTERCONNECT mprj.la_data_out[62] la_data_out[62] (0.114:0.114:0.114))
- (INTERCONNECT mprj.la_data_out[63] la_data_out[63] (0.201:0.201:0.201))
- (INTERCONNECT mprj.la_data_out[6] la_data_out[6] (0.094:0.094:0.094))
- (INTERCONNECT mprj.la_data_out[7] la_data_out[7] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[8] la_data_out[8] (0.127:0.127:0.127))
- (INTERCONNECT mprj.la_data_out[9] la_data_out[9] (0.139:0.139:0.139))
- (INTERCONNECT mprj.wbs_ack_o wbs_ack_o (0.138:0.138:0.138))
- (INTERCONNECT mprj.wbs_dat_o[0] wbs_dat_o[0] (0.121:0.121:0.121))
- (INTERCONNECT mprj.wbs_dat_o[10] wbs_dat_o[10] (0.105:0.105:0.105))
- (INTERCONNECT mprj.wbs_dat_o[11] wbs_dat_o[11] (0.108:0.108:0.108))
- (INTERCONNECT mprj.wbs_dat_o[12] wbs_dat_o[12] (0.103:0.103:0.103))
- (INTERCONNECT mprj.wbs_dat_o[13] wbs_dat_o[13] (0.104:0.104:0.104))
- (INTERCONNECT mprj.wbs_dat_o[14] wbs_dat_o[14] (0.104:0.104:0.104))
- (INTERCONNECT mprj.wbs_dat_o[15] wbs_dat_o[15] (0.126:0.126:0.126))
- (INTERCONNECT mprj.wbs_dat_o[16] wbs_dat_o[16] (0.101:0.101:0.101))
- (INTERCONNECT mprj.wbs_dat_o[17] wbs_dat_o[17] (0.109:0.109:0.109))
- (INTERCONNECT mprj.wbs_dat_o[18] wbs_dat_o[18] (0.106:0.106:0.106))
- (INTERCONNECT mprj.wbs_dat_o[19] wbs_dat_o[19] (0.108:0.108:0.108))
- (INTERCONNECT mprj.wbs_dat_o[1] wbs_dat_o[1] (0.134:0.134:0.134))
- (INTERCONNECT mprj.wbs_dat_o[20] wbs_dat_o[20] (0.093:0.093:0.093))
- (INTERCONNECT mprj.wbs_dat_o[21] wbs_dat_o[21] (0.098:0.098:0.098))
- (INTERCONNECT mprj.wbs_dat_o[22] wbs_dat_o[22] (0.143:0.143:0.143))
- (INTERCONNECT mprj.wbs_dat_o[23] wbs_dat_o[23] (0.090:0.090:0.090))
- (INTERCONNECT mprj.wbs_dat_o[24] wbs_dat_o[24] (0.087:0.087:0.087))
- (INTERCONNECT mprj.wbs_dat_o[25] wbs_dat_o[25] (0.088:0.088:0.088))
- (INTERCONNECT mprj.wbs_dat_o[26] wbs_dat_o[26] (0.175:0.175:0.175))
- (INTERCONNECT mprj.wbs_dat_o[27] wbs_dat_o[27] (0.086:0.086:0.086))
- (INTERCONNECT mprj.wbs_dat_o[28] wbs_dat_o[28] (0.130:0.130:0.130))
- (INTERCONNECT mprj.wbs_dat_o[29] wbs_dat_o[29] (0.100:0.100:0.100))
- (INTERCONNECT mprj.wbs_dat_o[2] wbs_dat_o[2] (0.119:0.119:0.119))
- (INTERCONNECT mprj.wbs_dat_o[30] wbs_dat_o[30] (0.106:0.106:0.106))
- (INTERCONNECT mprj.wbs_dat_o[31] wbs_dat_o[31] (0.079:0.079:0.079))
- (INTERCONNECT mprj.wbs_dat_o[3] wbs_dat_o[3] (0.134:0.134:0.134))
- (INTERCONNECT mprj.wbs_dat_o[4] wbs_dat_o[4] (0.115:0.115:0.115))
- (INTERCONNECT mprj.wbs_dat_o[5] wbs_dat_o[5] (0.128:0.128:0.128))
- (INTERCONNECT mprj.wbs_dat_o[6] wbs_dat_o[6] (0.140:0.140:0.140))
- (INTERCONNECT mprj.wbs_dat_o[7] wbs_dat_o[7] (0.145:0.145:0.145))
- (INTERCONNECT mprj.wbs_dat_o[8] wbs_dat_o[8] (0.123:0.123:0.123))
- (INTERCONNECT mprj.wbs_dat_o[9] wbs_dat_o[9] (0.106:0.106:0.106))
- )
- )
- )
-)
diff --git a/sdf/multicorner/nom/user_project_wrapper.tt.sdf b/sdf/multicorner/nom/user_project_wrapper.tt.sdf
deleted file mode 100644
index 0968826..0000000
--- a/sdf/multicorner/nom/user_project_wrapper.tt.sdf
+++ /dev/null
@@ -1,433 +0,0 @@
-(DELAYFILE
- (SDFVERSION "3.0")
- (DESIGN "user_project_wrapper")
- (DATE "Mon Dec 5 19:02:47 2022")
- (VENDOR "Parallax")
- (PROGRAM "STA")
- (VERSION "2.3.2")
- (DIVIDER .)
- (TIMESCALE 1ns)
- (CELL
- (CELLTYPE "user_project_wrapper")
- (INSTANCE)
- (DELAY
- (ABSOLUTE
- (INTERCONNECT io_in[0] mprj.io_in[0] (4.918:4.918:4.918) (3.136:3.136:3.136))
- (INTERCONNECT io_in[10] mprj.io_in[10] (2.665:2.665:2.665) (1.695:1.695:1.695))
- (INTERCONNECT io_in[11] mprj.io_in[11] (2.366:2.366:2.366) (1.504:1.504:1.504))
- (INTERCONNECT io_in[12] mprj.io_in[12] (1.344:1.344:1.344) (0.855:0.855:0.855))
- (INTERCONNECT io_in[13] mprj.io_in[13] (1.964:1.964:1.964) (1.250:1.250:1.250))
- (INTERCONNECT io_in[14] mprj.io_in[14] (1.971:1.971:1.971) (1.255:1.255:1.255))
- (INTERCONNECT io_in[15] mprj.io_in[15] (2.515:2.515:2.515) (1.602:1.602:1.602))
- (INTERCONNECT io_in[16] mprj.io_in[16] (1.385:1.385:1.385) (0.880:0.880:0.880))
- (INTERCONNECT io_in[17] mprj.io_in[17] (1.226:1.226:1.226) (0.778:0.778:0.778))
- (INTERCONNECT io_in[18] mprj.io_in[18] (0.865:0.865:0.865) (0.549:0.549:0.549))
- (INTERCONNECT io_in[19] mprj.io_in[19] (0.592:0.592:0.592) (0.375:0.375:0.375))
- (INTERCONNECT io_in[1] mprj.io_in[1] (8.429:8.429:8.429) (5.326:5.326:5.326))
- (INTERCONNECT io_in[20] mprj.io_in[20] (1.001:1.001:1.001) (0.635:0.635:0.635))
- (INTERCONNECT io_in[21] mprj.io_in[21] (1.144:1.144:1.144) (0.726:0.726:0.726))
- (INTERCONNECT io_in[22] mprj.io_in[22] (1.425:1.425:1.425) (0.906:0.906:0.906))
- (INTERCONNECT io_in[23] mprj.io_in[23] (4.098:4.098:4.098) (2.584:2.584:2.584))
- (INTERCONNECT io_in[24] mprj.io_in[24] (3.471:3.471:3.471) (2.196:2.196:2.196))
- (INTERCONNECT io_in[25] mprj.io_in[25] (2.076:2.076:2.076) (1.324:1.324:1.324))
- (INTERCONNECT io_in[26] mprj.io_in[26] (1.603:1.603:1.603) (1.022:1.022:1.022))
- (INTERCONNECT io_in[27] mprj.io_in[27] (2.907:2.907:2.907) (1.840:1.840:1.840))
- (INTERCONNECT io_in[28] mprj.io_in[28] (2.243:2.243:2.243) (1.428:1.428:1.428))
- (INTERCONNECT io_in[29] mprj.io_in[29] (2.304:2.304:2.304) (1.469:1.469:1.469))
- (INTERCONNECT io_in[2] mprj.io_in[2] (7.327:7.327:7.327) (4.639:4.639:4.639))
- (INTERCONNECT io_in[30] mprj.io_in[30] (2.441:2.441:2.441) (1.556:1.556:1.556))
- (INTERCONNECT io_in[31] mprj.io_in[31] (2.782:2.782:2.782) (1.776:1.776:1.776))
- (INTERCONNECT io_in[32] mprj.io_in[32] (4.024:4.024:4.024) (2.560:2.560:2.560))
- (INTERCONNECT io_in[33] mprj.io_in[33] (3.963:3.963:3.963) (2.525:2.525:2.525))
- (INTERCONNECT io_in[34] mprj.io_in[34] (4.567:4.567:4.567) (2.907:2.907:2.907))
- (INTERCONNECT io_in[35] mprj.io_in[35] (4.110:4.110:4.110) (2.625:2.625:2.625))
- (INTERCONNECT io_in[36] mprj.io_in[36] (3.494:3.494:3.494) (2.238:2.238:2.238))
- (INTERCONNECT io_in[37] mprj.io_in[37] (4.714:4.714:4.714) (3.012:3.012:3.012))
- (INTERCONNECT io_in[3] mprj.io_in[3] (7.351:7.351:7.351) (4.657:4.657:4.657))
- (INTERCONNECT io_in[4] mprj.io_in[4] (6.191:6.191:6.191) (3.924:3.924:3.924))
- (INTERCONNECT io_in[5] mprj.io_in[5] (5.813:5.813:5.813) (3.686:3.686:3.686))
- (INTERCONNECT io_in[6] mprj.io_in[6] (4.228:4.228:4.228) (2.689:2.689:2.689))
- (INTERCONNECT io_in[7] mprj.io_in[7] (3.140:3.140:3.140) (2.000:2.000:2.000))
- (INTERCONNECT io_in[8] mprj.io_in[8] (2.954:2.954:2.954) (1.881:1.881:1.881))
- (INTERCONNECT io_in[9] mprj.io_in[9] (2.814:2.814:2.814) (1.790:1.790:1.790))
- (INTERCONNECT la_data_in[0] mprj.la_data_in[0] (2.242:2.242:2.242) (1.429:1.429:1.429))
- (INTERCONNECT la_data_in[10] mprj.la_data_in[10] (1.768:1.768:1.768) (1.127:1.127:1.127))
- (INTERCONNECT la_data_in[11] mprj.la_data_in[11] (1.778:1.778:1.778) (1.133:1.133:1.133))
- (INTERCONNECT la_data_in[12] mprj.la_data_in[12] (2.877:2.877:2.877) (1.824:1.824:1.824))
- (INTERCONNECT la_data_in[13] mprj.la_data_in[13] (1.564:1.564:1.564) (0.996:0.996:0.996))
- (INTERCONNECT la_data_in[14] mprj.la_data_in[14] (1.674:1.674:1.674) (1.067:1.067:1.067))
- (INTERCONNECT la_data_in[15] mprj.la_data_in[15] (1.998:1.998:1.998) (1.272:1.272:1.272))
- (INTERCONNECT la_data_in[16] mprj.la_data_in[16] (2.791:2.791:2.791) (1.770:1.770:1.770))
- (INTERCONNECT la_data_in[17] mprj.la_data_in[17] (1.574:1.574:1.574) (1.002:1.002:1.002))
- (INTERCONNECT la_data_in[18] mprj.la_data_in[18] (1.443:1.443:1.443) (0.919:0.919:0.919))
- (INTERCONNECT la_data_in[19] mprj.la_data_in[19] (1.426:1.426:1.426) (0.908:0.908:0.908))
- (INTERCONNECT la_data_in[1] mprj.la_data_in[1] (3.126:3.126:3.126) (1.983:1.983:1.983))
- (INTERCONNECT la_data_in[20] mprj.la_data_in[20] (1.424:1.424:1.424) (0.907:0.907:0.907))
- (INTERCONNECT la_data_in[21] mprj.la_data_in[21] (2.665:2.665:2.665) (1.689:1.689:1.689))
- (INTERCONNECT la_data_in[22] mprj.la_data_in[22] (1.421:1.421:1.421) (0.904:0.904:0.904))
- (INTERCONNECT la_data_in[23] mprj.la_data_in[23] (1.438:1.438:1.438) (0.914:0.914:0.914))
- (INTERCONNECT la_data_in[24] mprj.la_data_in[24] (1.433:1.433:1.433) (0.912:0.912:0.912))
- (INTERCONNECT la_data_in[25] mprj.la_data_in[25] (2.055:2.055:2.055) (1.310:1.310:1.310))
- (INTERCONNECT la_data_in[26] mprj.la_data_in[26] (1.455:1.455:1.455) (0.926:0.926:0.926))
- (INTERCONNECT la_data_in[27] mprj.la_data_in[27] (2.000:2.000:2.000) (1.275:1.275:1.275))
- (INTERCONNECT la_data_in[28] mprj.la_data_in[28] (3.440:3.440:3.440) (2.178:2.178:2.178))
- (INTERCONNECT la_data_in[29] mprj.la_data_in[29] (2.282:2.282:2.282) (1.455:1.455:1.455))
- (INTERCONNECT la_data_in[2] mprj.la_data_in[2] (2.577:2.577:2.577) (1.640:1.640:1.640))
- (INTERCONNECT la_data_in[30] mprj.la_data_in[30] (3.582:3.582:3.582) (2.272:2.272:2.272))
- (INTERCONNECT la_data_in[31] mprj.la_data_in[31] (2.277:2.277:2.277) (1.452:1.452:1.452))
- (INTERCONNECT la_data_in[32] mprj.la_data_in[32] (2.301:2.301:2.301) (1.468:1.468:1.468))
- (INTERCONNECT la_data_in[33] mprj.la_data_in[33] (2.977:2.977:2.977) (1.886:1.886:1.886))
- (INTERCONNECT la_data_in[34] mprj.la_data_in[34] (2.001:2.001:2.001) (1.272:1.272:1.272))
- (INTERCONNECT la_data_in[35] mprj.la_data_in[35] (3.065:3.065:3.065) (1.942:1.942:1.942))
- (INTERCONNECT la_data_in[36] mprj.la_data_in[36] (2.862:2.862:2.862) (1.817:1.817:1.817))
- (INTERCONNECT la_data_in[37] mprj.la_data_in[37] (1.912:1.912:1.912) (1.219:1.219:1.219))
- (INTERCONNECT la_data_in[38] mprj.la_data_in[38] (2.125:2.125:2.125) (1.354:1.354:1.354))
- (INTERCONNECT la_data_in[39] mprj.la_data_in[39] (1.944:1.944:1.944) (1.240:1.240:1.240))
- (INTERCONNECT la_data_in[3] mprj.la_data_in[3] (2.005:2.005:2.005) (1.279:1.279:1.279))
- (INTERCONNECT la_data_in[40] mprj.la_data_in[40] (1.919:1.919:1.919) (1.224:1.224:1.224))
- (INTERCONNECT la_data_in[41] mprj.la_data_in[41] (1.945:1.945:1.945) (1.240:1.240:1.240))
- (INTERCONNECT la_data_in[42] mprj.la_data_in[42] (2.285:2.285:2.285) (1.457:1.457:1.457))
- (INTERCONNECT la_data_in[43] mprj.la_data_in[43] (2.225:2.225:2.225) (1.418:1.418:1.418))
- (INTERCONNECT la_data_in[44] mprj.la_data_in[44] (2.034:2.034:2.034) (1.297:1.297:1.297))
- (INTERCONNECT la_data_in[45] mprj.la_data_in[45] (2.252:2.252:2.252) (1.436:1.436:1.436))
- (INTERCONNECT la_data_in[46] mprj.la_data_in[46] (2.657:2.657:2.657) (1.694:1.694:1.694))
- (INTERCONNECT la_data_in[47] mprj.la_data_in[47] (2.170:2.170:2.170) (1.383:1.383:1.383))
- (INTERCONNECT la_data_in[48] mprj.la_data_in[48] (2.172:2.172:2.172) (1.384:1.384:1.384))
- (INTERCONNECT la_data_in[49] mprj.la_data_in[49] (2.443:2.443:2.443) (1.558:1.558:1.558))
- (INTERCONNECT la_data_in[4] mprj.la_data_in[4] (2.903:2.903:2.903) (1.841:1.841:1.841))
- (INTERCONNECT la_data_in[50] mprj.la_data_in[50] (2.086:2.086:2.086) (1.331:1.331:1.331))
- (INTERCONNECT la_data_in[51] mprj.la_data_in[51] (2.122:2.122:2.122) (1.353:1.353:1.353))
- (INTERCONNECT la_data_in[52] mprj.la_data_in[52] (2.663:2.663:2.663) (1.697:1.697:1.697))
- (INTERCONNECT la_data_in[53] mprj.la_data_in[53] (1.885:1.885:1.885) (1.202:1.202:1.202))
- (INTERCONNECT la_data_in[54] mprj.la_data_in[54] (2.430:2.430:2.430) (1.550:1.550:1.550))
- (INTERCONNECT la_data_in[55] mprj.la_data_in[55] (1.913:1.913:1.913) (1.220:1.220:1.220))
- (INTERCONNECT la_data_in[56] mprj.la_data_in[56] (2.248:2.248:2.248) (1.435:1.435:1.435))
- (INTERCONNECT la_data_in[57] mprj.la_data_in[57] (2.040:2.040:2.040) (1.302:1.302:1.302))
- (INTERCONNECT la_data_in[58] mprj.la_data_in[58] (2.144:2.144:2.144) (1.367:1.367:1.367))
- (INTERCONNECT la_data_in[59] mprj.la_data_in[59] (2.268:2.268:2.268) (1.447:1.447:1.447))
- (INTERCONNECT la_data_in[5] mprj.la_data_in[5] (2.020:2.020:2.020) (1.288:1.288:1.288))
- (INTERCONNECT la_data_in[60] mprj.la_data_in[60] (2.354:2.354:2.354) (1.502:1.502:1.502))
- (INTERCONNECT la_data_in[61] mprj.la_data_in[61] (3.012:3.012:3.012) (1.920:1.920:1.920))
- (INTERCONNECT la_data_in[62] mprj.la_data_in[62] (2.085:2.085:2.085) (1.331:1.331:1.331))
- (INTERCONNECT la_data_in[63] mprj.la_data_in[63] (2.703:2.703:2.703) (1.724:1.724:1.724))
- (INTERCONNECT la_data_in[6] mprj.la_data_in[6] (1.901:1.901:1.901) (1.212:1.212:1.212))
- (INTERCONNECT la_data_in[7] mprj.la_data_in[7] (1.805:1.805:1.805) (1.151:1.151:1.151))
- (INTERCONNECT la_data_in[8] mprj.la_data_in[8] (2.750:2.750:2.750) (1.749:1.749:1.749))
- (INTERCONNECT la_data_in[9] mprj.la_data_in[9] (3.126:3.126:3.126) (1.983:1.983:1.983))
- (INTERCONNECT la_oenb[0] mprj.la_oenb[0] (2.597:2.597:2.597) (1.651:1.651:1.651))
- (INTERCONNECT la_oenb[10] mprj.la_oenb[10] (2.973:2.973:2.973) (1.886:1.886:1.886))
- (INTERCONNECT la_oenb[11] mprj.la_oenb[11] (2.612:2.612:2.612) (1.658:1.658:1.658))
- (INTERCONNECT la_oenb[12] mprj.la_oenb[12] (1.711:1.711:1.711) (1.090:1.090:1.090))
- (INTERCONNECT la_oenb[13] mprj.la_oenb[13] (2.817:2.817:2.817) (1.789:1.789:1.789))
- (INTERCONNECT la_oenb[14] mprj.la_oenb[14] (1.677:1.677:1.677) (1.069:1.069:1.069))
- (INTERCONNECT la_oenb[15] mprj.la_oenb[15] (1.474:1.474:1.474) (0.939:0.939:0.939))
- (INTERCONNECT la_oenb[16] mprj.la_oenb[16] (1.683:1.683:1.683) (1.072:1.072:1.072))
- (INTERCONNECT la_oenb[17] mprj.la_oenb[17] (2.624:2.624:2.624) (1.664:1.664:1.664))
- (INTERCONNECT la_oenb[18] mprj.la_oenb[18] (1.639:1.639:1.639) (1.044:1.044:1.044))
- (INTERCONNECT la_oenb[19] mprj.la_oenb[19] (2.722:2.722:2.722) (1.725:1.725:1.725))
- (INTERCONNECT la_oenb[1] mprj.la_oenb[1] (2.855:2.855:2.855) (1.815:1.815:1.815))
- (INTERCONNECT la_oenb[20] mprj.la_oenb[20] (1.408:1.408:1.408) (0.896:0.896:0.896))
- (INTERCONNECT la_oenb[21] mprj.la_oenb[21] (1.415:1.415:1.415) (0.899:0.899:0.899))
- (INTERCONNECT la_oenb[22] mprj.la_oenb[22] (1.432:1.432:1.432) (0.911:0.911:0.911))
- (INTERCONNECT la_oenb[23] mprj.la_oenb[23] (1.416:1.416:1.416) (0.902:0.902:0.902))
- (INTERCONNECT la_oenb[24] mprj.la_oenb[24] (1.477:1.477:1.477) (0.940:0.940:0.940))
- (INTERCONNECT la_oenb[25] mprj.la_oenb[25] (1.532:1.532:1.532) (0.975:0.975:0.975))
- (INTERCONNECT la_oenb[26] mprj.la_oenb[26] (2.753:2.753:2.753) (1.745:1.745:1.745))
- (INTERCONNECT la_oenb[27] mprj.la_oenb[27] (1.587:1.587:1.587) (1.011:1.011:1.011))
- (INTERCONNECT la_oenb[28] mprj.la_oenb[28] (2.718:2.718:2.718) (1.723:1.723:1.723))
- (INTERCONNECT la_oenb[29] mprj.la_oenb[29] (1.558:1.558:1.558) (0.992:0.992:0.992))
- (INTERCONNECT la_oenb[2] mprj.la_oenb[2] (2.993:2.993:2.993) (1.898:1.898:1.898))
- (INTERCONNECT la_oenb[30] mprj.la_oenb[30] (2.284:2.284:2.284) (1.449:1.449:1.449))
- (INTERCONNECT la_oenb[31] mprj.la_oenb[31] (1.546:1.546:1.546) (0.985:0.985:0.985))
- (INTERCONNECT la_oenb[32] mprj.la_oenb[32] (1.570:1.570:1.570) (1.000:1.000:1.000))
- (INTERCONNECT la_oenb[33] mprj.la_oenb[33] (1.672:1.672:1.672) (1.066:1.066:1.066))
- (INTERCONNECT la_oenb[34] mprj.la_oenb[34] (1.790:1.790:1.790) (1.141:1.141:1.141))
- (INTERCONNECT la_oenb[35] mprj.la_oenb[35] (3.177:3.177:3.177) (2.019:2.019:2.019))
- (INTERCONNECT la_oenb[36] mprj.la_oenb[36] (1.724:1.724:1.724) (1.099:1.099:1.099))
- (INTERCONNECT la_oenb[37] mprj.la_oenb[37] (1.925:1.925:1.925) (1.227:1.227:1.227))
- (INTERCONNECT la_oenb[38] mprj.la_oenb[38] (1.710:1.710:1.710) (1.090:1.090:1.090))
- (INTERCONNECT la_oenb[39] mprj.la_oenb[39] (2.334:2.334:2.334) (1.487:1.487:1.487))
- (INTERCONNECT la_oenb[3] mprj.la_oenb[3] (1.684:1.684:1.684) (1.074:1.074:1.074))
- (INTERCONNECT la_oenb[40] mprj.la_oenb[40] (1.680:1.680:1.680) (1.070:1.070:1.070))
- (INTERCONNECT la_oenb[41] mprj.la_oenb[41] (1.693:1.693:1.693) (1.079:1.079:1.079))
- (INTERCONNECT la_oenb[42] mprj.la_oenb[42] (1.949:1.949:1.949) (1.240:1.240:1.240))
- (INTERCONNECT la_oenb[43] mprj.la_oenb[43] (1.802:1.802:1.802) (1.149:1.149:1.149))
- (INTERCONNECT la_oenb[44] mprj.la_oenb[44] (3.104:3.104:3.104) (1.973:1.973:1.973))
- (INTERCONNECT la_oenb[45] mprj.la_oenb[45] (1.817:1.817:1.817) (1.158:1.158:1.158))
- (INTERCONNECT la_oenb[46] mprj.la_oenb[46] (1.841:1.841:1.841) (1.174:1.174:1.174))
- (INTERCONNECT la_oenb[47] mprj.la_oenb[47] (1.832:1.832:1.832) (1.169:1.169:1.169))
- (INTERCONNECT la_oenb[48] mprj.la_oenb[48] (2.242:2.242:2.242) (1.430:1.430:1.430))
- (INTERCONNECT la_oenb[49] mprj.la_oenb[49] (1.879:1.879:1.879) (1.199:1.199:1.199))
- (INTERCONNECT la_oenb[4] mprj.la_oenb[4] (1.912:1.912:1.912) (1.219:1.219:1.219))
- (INTERCONNECT la_oenb[50] mprj.la_oenb[50] (2.478:2.478:2.478) (1.580:1.580:1.580))
- (INTERCONNECT la_oenb[51] mprj.la_oenb[51] (1.890:1.890:1.890) (1.205:1.205:1.205))
- (INTERCONNECT la_oenb[52] mprj.la_oenb[52] (2.075:2.075:2.075) (1.324:1.324:1.324))
- (INTERCONNECT la_oenb[53] mprj.la_oenb[53] (1.888:1.888:1.888) (1.204:1.204:1.204))
- (INTERCONNECT la_oenb[54] mprj.la_oenb[54] (3.326:3.326:3.326) (2.111:2.111:2.111))
- (INTERCONNECT la_oenb[55] mprj.la_oenb[55] (2.173:2.173:2.173) (1.387:1.387:1.387))
- (INTERCONNECT la_oenb[56] mprj.la_oenb[56] (2.643:2.643:2.643) (1.682:1.682:1.682))
- (INTERCONNECT la_oenb[57] mprj.la_oenb[57] (4.371:4.371:4.371) (2.783:2.783:2.783))
- (INTERCONNECT la_oenb[58] mprj.la_oenb[58] (2.360:2.360:2.360) (1.506:1.506:1.506))
- (INTERCONNECT la_oenb[59] mprj.la_oenb[59] (3.243:3.243:3.243) (2.063:2.063:2.063))
- (INTERCONNECT la_oenb[5] mprj.la_oenb[5] (2.821:2.821:2.821) (1.793:1.793:1.793))
- (INTERCONNECT la_oenb[60] mprj.la_oenb[60] (3.161:3.161:3.161) (2.009:2.009:2.009))
- (INTERCONNECT la_oenb[61] mprj.la_oenb[61] (2.752:2.752:2.752) (1.752:1.752:1.752))
- (INTERCONNECT la_oenb[62] mprj.la_oenb[62] (2.263:2.263:2.263) (1.444:1.444:1.444))
- (INTERCONNECT la_oenb[63] mprj.la_oenb[63] (3.441:3.441:3.441) (2.186:2.186:2.186))
- (INTERCONNECT la_oenb[6] mprj.la_oenb[6] (2.357:2.357:2.357) (1.500:1.500:1.500))
- (INTERCONNECT la_oenb[7] mprj.la_oenb[7] (2.118:2.118:2.118) (1.349:1.349:1.349))
- (INTERCONNECT la_oenb[8] mprj.la_oenb[8] (1.909:1.909:1.909) (1.216:1.216:1.216))
- (INTERCONNECT la_oenb[9] mprj.la_oenb[9] (1.628:1.628:1.628) (1.038:1.038:1.038))
- (INTERCONNECT wb_clk_i mprj.wb_clk_i (2.405:2.405:2.405) (1.536:1.536:1.536))
- (INTERCONNECT wb_rst_i mprj.wb_rst_i (2.972:2.972:2.972) (1.896:1.896:1.896))
- (INTERCONNECT wbs_adr_i[0] mprj.wbs_adr_i[0] (2.357:2.357:2.357) (1.505:1.505:1.505))
- (INTERCONNECT wbs_adr_i[10] mprj.wbs_adr_i[10] (2.589:2.589:2.589) (1.653:1.653:1.653))
- (INTERCONNECT wbs_adr_i[11] mprj.wbs_adr_i[11] (2.323:2.323:2.323) (1.483:1.483:1.483))
- (INTERCONNECT wbs_adr_i[12] mprj.wbs_adr_i[12] (2.839:2.839:2.839) (1.812:1.812:1.812))
- (INTERCONNECT wbs_adr_i[13] mprj.wbs_adr_i[13] (2.849:2.849:2.849) (1.816:1.816:1.816))
- (INTERCONNECT wbs_adr_i[14] mprj.wbs_adr_i[14] (2.443:2.443:2.443) (1.558:1.558:1.558))
- (INTERCONNECT wbs_adr_i[15] mprj.wbs_adr_i[15] (2.933:2.933:2.933) (1.869:1.869:1.869))
- (INTERCONNECT wbs_adr_i[16] mprj.wbs_adr_i[16] (3.069:3.069:3.069) (1.955:1.955:1.955))
- (INTERCONNECT wbs_adr_i[17] mprj.wbs_adr_i[17] (2.937:2.937:2.937) (1.872:1.872:1.872))
- (INTERCONNECT wbs_adr_i[18] mprj.wbs_adr_i[18] (2.909:2.909:2.909) (1.854:1.854:1.854))
- (INTERCONNECT wbs_adr_i[19] mprj.wbs_adr_i[19] (2.846:2.846:2.846) (1.815:1.815:1.815))
- (INTERCONNECT wbs_adr_i[1] mprj.wbs_adr_i[1] (2.899:2.899:2.899) (1.850:1.850:1.850))
- (INTERCONNECT wbs_adr_i[20] mprj.wbs_adr_i[20] (3.940:3.940:3.940) (2.497:2.497:2.497))
- (INTERCONNECT wbs_adr_i[21] mprj.wbs_adr_i[21] (2.257:2.257:2.257) (1.439:1.439:1.439))
- (INTERCONNECT wbs_adr_i[22] mprj.wbs_adr_i[22] (2.788:2.788:2.788) (1.777:1.777:1.777))
- (INTERCONNECT wbs_adr_i[23] mprj.wbs_adr_i[23] (2.361:2.361:2.361) (1.506:1.506:1.506))
- (INTERCONNECT wbs_adr_i[24] mprj.wbs_adr_i[24] (2.225:2.225:2.225) (1.418:1.418:1.418))
- (INTERCONNECT wbs_adr_i[25] mprj.wbs_adr_i[25] (2.612:2.612:2.612) (1.665:1.665:1.665))
- (INTERCONNECT wbs_adr_i[26] mprj.wbs_adr_i[26] (3.302:3.302:3.302) (2.094:2.094:2.094))
- (INTERCONNECT wbs_adr_i[27] mprj.wbs_adr_i[27] (2.204:2.204:2.204) (1.406:1.406:1.406))
- (INTERCONNECT wbs_adr_i[28] mprj.wbs_adr_i[28] (2.161:2.161:2.161) (1.378:1.378:1.378))
- (INTERCONNECT wbs_adr_i[29] mprj.wbs_adr_i[29] (2.418:2.418:2.418) (1.541:1.541:1.541))
- (INTERCONNECT wbs_adr_i[2] mprj.wbs_adr_i[2] (2.690:2.690:2.690) (1.717:1.717:1.717))
- (INTERCONNECT wbs_adr_i[30] mprj.wbs_adr_i[30] (2.630:2.630:2.630) (1.677:1.677:1.677))
- (INTERCONNECT wbs_adr_i[31] mprj.wbs_adr_i[31] (2.304:2.304:2.304) (1.469:1.469:1.469))
- (INTERCONNECT wbs_adr_i[3] mprj.wbs_adr_i[3] (2.169:2.169:2.169) (1.385:1.385:1.385))
- (INTERCONNECT wbs_adr_i[4] mprj.wbs_adr_i[4] (2.464:2.464:2.464) (1.573:1.573:1.573))
- (INTERCONNECT wbs_adr_i[5] mprj.wbs_adr_i[5] (2.569:2.569:2.569) (1.639:1.639:1.639))
- (INTERCONNECT wbs_adr_i[6] mprj.wbs_adr_i[6] (2.688:2.688:2.688) (1.716:1.716:1.716))
- (INTERCONNECT wbs_adr_i[7] mprj.wbs_adr_i[7] (2.315:2.315:2.315) (1.477:1.477:1.477))
- (INTERCONNECT wbs_adr_i[8] mprj.wbs_adr_i[8] (3.311:3.311:3.311) (2.112:2.112:2.112))
- (INTERCONNECT wbs_adr_i[9] mprj.wbs_adr_i[9] (2.621:2.621:2.621) (1.673:1.673:1.673))
- (INTERCONNECT wbs_cyc_i mprj.wbs_cyc_i (2.707:2.707:2.707) (1.728:1.728:1.728))
- (INTERCONNECT wbs_dat_i[0] mprj.wbs_dat_i[0] (2.289:2.289:2.289) (1.461:1.461:1.461))
- (INTERCONNECT wbs_dat_i[10] mprj.wbs_dat_i[10] (2.081:2.081:2.081) (1.328:1.328:1.328))
- (INTERCONNECT wbs_dat_i[11] mprj.wbs_dat_i[11] (2.081:2.081:2.081) (1.327:1.327:1.327))
- (INTERCONNECT wbs_dat_i[12] mprj.wbs_dat_i[12] (2.046:2.046:2.046) (1.306:1.306:1.306))
- (INTERCONNECT wbs_dat_i[13] mprj.wbs_dat_i[13] (2.503:2.503:2.503) (1.597:1.597:1.597))
- (INTERCONNECT wbs_dat_i[14] mprj.wbs_dat_i[14] (2.019:2.019:2.019) (1.288:1.288:1.288))
- (INTERCONNECT wbs_dat_i[15] mprj.wbs_dat_i[15] (2.906:2.906:2.906) (1.853:1.853:1.853))
- (INTERCONNECT wbs_dat_i[16] mprj.wbs_dat_i[16] (2.036:2.036:2.036) (1.299:1.299:1.299))
- (INTERCONNECT wbs_dat_i[17] mprj.wbs_dat_i[17] (2.820:2.820:2.820) (1.797:1.797:1.797))
- (INTERCONNECT wbs_dat_i[18] mprj.wbs_dat_i[18] (2.877:2.877:2.877) (1.834:1.834:1.834))
- (INTERCONNECT wbs_dat_i[19] mprj.wbs_dat_i[19] (1.943:1.943:1.943) (1.239:1.239:1.239))
- (INTERCONNECT wbs_dat_i[1] mprj.wbs_dat_i[1] (2.774:2.774:2.774) (1.771:1.771:1.771))
- (INTERCONNECT wbs_dat_i[20] mprj.wbs_dat_i[20] (3.694:3.694:3.694) (2.340:2.340:2.340))
- (INTERCONNECT wbs_dat_i[21] mprj.wbs_dat_i[21] (2.378:2.378:2.378) (1.516:1.516:1.516))
- (INTERCONNECT wbs_dat_i[22] mprj.wbs_dat_i[22] (2.699:2.699:2.699) (1.720:1.720:1.720))
- (INTERCONNECT wbs_dat_i[23] mprj.wbs_dat_i[23] (2.326:2.326:2.326) (1.483:1.483:1.483))
- (INTERCONNECT wbs_dat_i[24] mprj.wbs_dat_i[24] (2.270:2.270:2.270) (1.447:1.447:1.447))
- (INTERCONNECT wbs_dat_i[25] mprj.wbs_dat_i[25] (2.289:2.289:2.289) (1.459:1.459:1.459))
- (INTERCONNECT wbs_dat_i[26] mprj.wbs_dat_i[26] (2.282:2.282:2.282) (1.455:1.455:1.455))
- (INTERCONNECT wbs_dat_i[27] mprj.wbs_dat_i[27] (2.082:2.082:2.082) (1.327:1.327:1.327))
- (INTERCONNECT wbs_dat_i[28] mprj.wbs_dat_i[28] (2.196:2.196:2.196) (1.401:1.401:1.401))
- (INTERCONNECT wbs_dat_i[29] mprj.wbs_dat_i[29] (2.346:2.346:2.346) (1.494:1.494:1.494))
- (INTERCONNECT wbs_dat_i[2] mprj.wbs_dat_i[2] (2.518:2.518:2.518) (1.607:1.607:1.607))
- (INTERCONNECT wbs_dat_i[30] mprj.wbs_dat_i[30] (1.826:1.826:1.826) (1.164:1.164:1.164))
- (INTERCONNECT wbs_dat_i[31] mprj.wbs_dat_i[31] (2.089:2.089:2.089) (1.332:1.332:1.332))
- (INTERCONNECT wbs_dat_i[3] mprj.wbs_dat_i[3] (2.551:2.551:2.551) (1.628:1.628:1.628))
- (INTERCONNECT wbs_dat_i[4] mprj.wbs_dat_i[4] (2.946:2.946:2.946) (1.879:1.879:1.879))
- (INTERCONNECT wbs_dat_i[5] mprj.wbs_dat_i[5] (2.727:2.727:2.727) (1.741:1.741:1.741))
- (INTERCONNECT wbs_dat_i[6] mprj.wbs_dat_i[6] (2.156:2.156:2.156) (1.376:1.376:1.376))
- (INTERCONNECT wbs_dat_i[7] mprj.wbs_dat_i[7] (2.659:2.659:2.659) (1.697:1.697:1.697))
- (INTERCONNECT wbs_dat_i[8] mprj.wbs_dat_i[8] (2.191:2.191:2.191) (1.398:1.398:1.398))
- (INTERCONNECT wbs_dat_i[9] mprj.wbs_dat_i[9] (2.110:2.110:2.110) (1.346:1.346:1.346))
- (INTERCONNECT wbs_sel_i[0] mprj.wbs_sel_i[0] (2.293:2.293:2.293) (1.464:1.464:1.464))
- (INTERCONNECT wbs_sel_i[1] mprj.wbs_sel_i[1] (2.251:2.251:2.251) (1.437:1.437:1.437))
- (INTERCONNECT wbs_sel_i[2] mprj.wbs_sel_i[2] (3.751:3.751:3.751) (2.382:2.382:2.382))
- (INTERCONNECT wbs_sel_i[3] mprj.wbs_sel_i[3] (3.210:3.210:3.210) (2.043:2.043:2.043))
- (INTERCONNECT wbs_stb_i mprj.wbs_stb_i (3.347:3.347:3.347) (2.130:2.130:2.130))
- (INTERCONNECT wbs_we_i mprj.wbs_we_i (3.885:3.885:3.885) (2.467:2.467:2.467))
- (INTERCONNECT mprj.io_oeb[0] io_oeb[0] (0.448:0.448:0.448))
- (INTERCONNECT mprj.io_oeb[10] io_oeb[10] (0.078:0.078:0.078))
- (INTERCONNECT mprj.io_oeb[11] io_oeb[11] (0.101:0.101:0.101))
- (INTERCONNECT mprj.io_oeb[12] io_oeb[12] (0.059:0.059:0.059))
- (INTERCONNECT mprj.io_oeb[13] io_oeb[13] (0.098:0.098:0.098))
- (INTERCONNECT mprj.io_oeb[14] io_oeb[14] (0.085:0.085:0.085))
- (INTERCONNECT mprj.io_oeb[15] io_oeb[15] (0.072:0.072:0.072))
- (INTERCONNECT mprj.io_oeb[16] io_oeb[16] (0.050:0.050:0.050))
- (INTERCONNECT mprj.io_oeb[17] io_oeb[17] (0.032:0.032:0.032))
- (INTERCONNECT mprj.io_oeb[18] io_oeb[18] (0.021:0.021:0.021))
- (INTERCONNECT mprj.io_oeb[19] io_oeb[19] (0.026:0.026:0.026))
- (INTERCONNECT mprj.io_oeb[1] io_oeb[1] (0.524:0.524:0.524))
- (INTERCONNECT mprj.io_oeb[20] io_oeb[20] (0.041:0.041:0.041))
- (INTERCONNECT mprj.io_oeb[21] io_oeb[21] (0.054:0.054:0.054))
- (INTERCONNECT mprj.io_oeb[22] io_oeb[22] (0.071:0.071:0.071))
- (INTERCONNECT mprj.io_oeb[23] io_oeb[23] (0.174:0.174:0.174))
- (INTERCONNECT mprj.io_oeb[24] io_oeb[24] (0.088:0.088:0.088))
- (INTERCONNECT mprj.io_oeb[25] io_oeb[25] (0.074:0.074:0.074))
- (INTERCONNECT mprj.io_oeb[26] io_oeb[26] (0.137:0.137:0.137))
- (INTERCONNECT mprj.io_oeb[27] io_oeb[27] (0.111:0.111:0.111))
- (INTERCONNECT mprj.io_oeb[28] io_oeb[28] (0.112:0.112:0.112))
- (INTERCONNECT mprj.io_oeb[29] io_oeb[29] (0.198:0.198:0.198))
- (INTERCONNECT mprj.io_oeb[2] io_oeb[2] (0.458:0.458:0.458))
- (INTERCONNECT mprj.io_oeb[30] io_oeb[30] (0.126:0.126:0.126))
- (INTERCONNECT mprj.io_oeb[31] io_oeb[31] (0.174:0.174:0.174))
- (INTERCONNECT mprj.io_oeb[32] io_oeb[32] (0.190:0.190:0.190))
- (INTERCONNECT mprj.io_oeb[33] io_oeb[33] (0.220:0.220:0.220))
- (INTERCONNECT mprj.io_oeb[34] io_oeb[34] (0.258:0.258:0.258))
- (INTERCONNECT mprj.io_oeb[35] io_oeb[35] (0.238:0.238:0.238))
- (INTERCONNECT mprj.io_oeb[36] io_oeb[36] (0.247:0.247:0.247))
- (INTERCONNECT mprj.io_oeb[37] io_oeb[37] (0.295:0.295:0.295))
- (INTERCONNECT mprj.io_oeb[3] io_oeb[3] (0.475:0.475:0.475))
- (INTERCONNECT mprj.io_oeb[4] io_oeb[4] (0.158:0.158:0.158))
- (INTERCONNECT mprj.io_oeb[5] io_oeb[5] (0.167:0.167:0.167))
- (INTERCONNECT mprj.io_oeb[6] io_oeb[6] (0.134:0.134:0.134))
- (INTERCONNECT mprj.io_oeb[7] io_oeb[7] (0.110:0.110:0.110))
- (INTERCONNECT mprj.io_oeb[8] io_oeb[8] (0.099:0.099:0.099))
- (INTERCONNECT mprj.io_oeb[9] io_oeb[9] (0.104:0.104:0.104))
- (INTERCONNECT mprj.io_out[0] io_out[0] (0.248:0.248:0.248))
- (INTERCONNECT mprj.io_out[10] io_out[10] (0.077:0.077:0.077))
- (INTERCONNECT mprj.io_out[11] io_out[11] (0.052:0.052:0.052))
- (INTERCONNECT mprj.io_out[12] io_out[12] (0.056:0.056:0.056))
- (INTERCONNECT mprj.io_out[13] io_out[13] (0.065:0.065:0.065))
- (INTERCONNECT mprj.io_out[14] io_out[14] (0.075:0.075:0.075))
- (INTERCONNECT mprj.io_out[15] io_out[15] (0.109:0.109:0.109))
- (INTERCONNECT mprj.io_out[16] io_out[16] (0.076:0.076:0.076))
- (INTERCONNECT mprj.io_out[17] io_out[17] (0.035:0.035:0.035))
- (INTERCONNECT mprj.io_out[18] io_out[18] (0.024:0.024:0.024))
- (INTERCONNECT mprj.io_out[19] io_out[19] (0.024:0.024:0.024))
- (INTERCONNECT mprj.io_out[1] io_out[1] (0.554:0.554:0.554))
- (INTERCONNECT mprj.io_out[20] io_out[20] (0.037:0.037:0.037))
- (INTERCONNECT mprj.io_out[21] io_out[21] (0.060:0.060:0.060))
- (INTERCONNECT mprj.io_out[22] io_out[22] (0.066:0.066:0.066))
- (INTERCONNECT mprj.io_out[23] io_out[23] (0.161:0.161:0.161))
- (INTERCONNECT mprj.io_out[24] io_out[24] (0.089:0.089:0.089))
- (INTERCONNECT mprj.io_out[25] io_out[25] (0.078:0.078:0.078))
- (INTERCONNECT mprj.io_out[26] io_out[26] (0.068:0.068:0.068))
- (INTERCONNECT mprj.io_out[27] io_out[27] (0.113:0.113:0.113))
- (INTERCONNECT mprj.io_out[28] io_out[28] (0.112:0.112:0.112))
- (INTERCONNECT mprj.io_out[29] io_out[29] (0.120:0.120:0.120))
- (INTERCONNECT mprj.io_out[2] io_out[2] (0.321:0.321:0.321))
- (INTERCONNECT mprj.io_out[30] io_out[30] (0.148:0.148:0.148))
- (INTERCONNECT mprj.io_out[31] io_out[31] (0.171:0.171:0.171))
- (INTERCONNECT mprj.io_out[32] io_out[32] (0.178:0.178:0.178))
- (INTERCONNECT mprj.io_out[33] io_out[33] (0.176:0.176:0.176))
- (INTERCONNECT mprj.io_out[34] io_out[34] (0.280:0.280:0.280))
- (INTERCONNECT mprj.io_out[35] io_out[35] (0.239:0.239:0.239))
- (INTERCONNECT mprj.io_out[36] io_out[36] (0.296:0.296:0.296))
- (INTERCONNECT mprj.io_out[37] io_out[37] (0.311:0.311:0.311))
- (INTERCONNECT mprj.io_out[3] io_out[3] (0.196:0.196:0.196))
- (INTERCONNECT mprj.io_out[4] io_out[4] (0.213:0.213:0.213))
- (INTERCONNECT mprj.io_out[5] io_out[5] (0.183:0.183:0.183))
- (INTERCONNECT mprj.io_out[6] io_out[6] (0.145:0.145:0.145))
- (INTERCONNECT mprj.io_out[7] io_out[7] (0.131:0.131:0.131))
- (INTERCONNECT mprj.io_out[8] io_out[8] (0.099:0.099:0.099))
- (INTERCONNECT mprj.io_out[9] io_out[9] (0.102:0.102:0.102))
- (INTERCONNECT mprj.irq[0] user_irq[0] (0.116:0.116:0.116))
- (INTERCONNECT mprj.irq[1] user_irq[1] (0.107:0.107:0.107))
- (INTERCONNECT mprj.irq[2] user_irq[2] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[0] la_data_out[0] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[10] la_data_out[10] (0.073:0.073:0.073))
- (INTERCONNECT mprj.la_data_out[11] la_data_out[11] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[12] la_data_out[12] (0.078:0.078:0.078))
- (INTERCONNECT mprj.la_data_out[13] la_data_out[13] (0.074:0.074:0.074))
- (INTERCONNECT mprj.la_data_out[14] la_data_out[14] (0.130:0.130:0.130))
- (INTERCONNECT mprj.la_data_out[15] la_data_out[15] (0.100:0.100:0.100))
- (INTERCONNECT mprj.la_data_out[16] la_data_out[16] (0.067:0.067:0.067))
- (INTERCONNECT mprj.la_data_out[17] la_data_out[17] (0.061:0.061:0.061))
- (INTERCONNECT mprj.la_data_out[18] la_data_out[18] (0.076:0.076:0.076))
- (INTERCONNECT mprj.la_data_out[19] la_data_out[19] (0.122:0.122:0.122))
- (INTERCONNECT mprj.la_data_out[1] la_data_out[1] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[20] la_data_out[20] (0.071:0.071:0.071))
- (INTERCONNECT mprj.la_data_out[21] la_data_out[21] (0.062:0.062:0.062))
- (INTERCONNECT mprj.la_data_out[22] la_data_out[22] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[23] la_data_out[23] (0.071:0.071:0.071))
- (INTERCONNECT mprj.la_data_out[24] la_data_out[24] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[25] la_data_out[25] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[26] la_data_out[26] (0.087:0.087:0.087))
- (INTERCONNECT mprj.la_data_out[27] la_data_out[27] (0.065:0.065:0.065))
- (INTERCONNECT mprj.la_data_out[28] la_data_out[28] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[29] la_data_out[29] (0.069:0.069:0.069))
- (INTERCONNECT mprj.la_data_out[2] la_data_out[2] (0.077:0.077:0.077))
- (INTERCONNECT mprj.la_data_out[30] la_data_out[30] (0.070:0.070:0.070))
- (INTERCONNECT mprj.la_data_out[31] la_data_out[31] (0.076:0.076:0.076))
- (INTERCONNECT mprj.la_data_out[32] la_data_out[32] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[33] la_data_out[33] (0.082:0.082:0.082))
- (INTERCONNECT mprj.la_data_out[34] la_data_out[34] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[35] la_data_out[35] (0.138:0.138:0.138))
- (INTERCONNECT mprj.la_data_out[36] la_data_out[36] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[37] la_data_out[37] (0.075:0.075:0.075))
- (INTERCONNECT mprj.la_data_out[38] la_data_out[38] (0.073:0.073:0.073))
- (INTERCONNECT mprj.la_data_out[39] la_data_out[39] (0.077:0.077:0.077))
- (INTERCONNECT mprj.la_data_out[3] la_data_out[3] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[40] la_data_out[40] (0.084:0.084:0.084))
- (INTERCONNECT mprj.la_data_out[41] la_data_out[41] (0.085:0.085:0.085))
- (INTERCONNECT mprj.la_data_out[42] la_data_out[42] (0.082:0.082:0.082))
- (INTERCONNECT mprj.la_data_out[43] la_data_out[43] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[44] la_data_out[44] (0.084:0.084:0.084))
- (INTERCONNECT mprj.la_data_out[45] la_data_out[45] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[46] la_data_out[46] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[47] la_data_out[47] (0.083:0.083:0.083))
- (INTERCONNECT mprj.la_data_out[48] la_data_out[48] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[49] la_data_out[49] (0.089:0.089:0.089))
- (INTERCONNECT mprj.la_data_out[4] la_data_out[4] (0.086:0.086:0.086))
- (INTERCONNECT mprj.la_data_out[50] la_data_out[50] (0.091:0.091:0.091))
- (INTERCONNECT mprj.la_data_out[51] la_data_out[51] (0.105:0.105:0.105))
- (INTERCONNECT mprj.la_data_out[52] la_data_out[52] (0.124:0.124:0.124))
- (INTERCONNECT mprj.la_data_out[53] la_data_out[53] (0.090:0.090:0.090))
- (INTERCONNECT mprj.la_data_out[54] la_data_out[54] (0.098:0.098:0.098))
- (INTERCONNECT mprj.la_data_out[55] la_data_out[55] (0.103:0.103:0.103))
- (INTERCONNECT mprj.la_data_out[56] la_data_out[56] (0.094:0.094:0.094))
- (INTERCONNECT mprj.la_data_out[57] la_data_out[57] (0.104:0.104:0.104))
- (INTERCONNECT mprj.la_data_out[58] la_data_out[58] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[59] la_data_out[59] (0.103:0.103:0.103))
- (INTERCONNECT mprj.la_data_out[5] la_data_out[5] (0.110:0.110:0.110))
- (INTERCONNECT mprj.la_data_out[60] la_data_out[60] (0.109:0.109:0.109))
- (INTERCONNECT mprj.la_data_out[61] la_data_out[61] (0.108:0.108:0.108))
- (INTERCONNECT mprj.la_data_out[62] la_data_out[62] (0.114:0.114:0.114))
- (INTERCONNECT mprj.la_data_out[63] la_data_out[63] (0.201:0.201:0.201))
- (INTERCONNECT mprj.la_data_out[6] la_data_out[6] (0.094:0.094:0.094))
- (INTERCONNECT mprj.la_data_out[7] la_data_out[7] (0.080:0.080:0.080))
- (INTERCONNECT mprj.la_data_out[8] la_data_out[8] (0.127:0.127:0.127))
- (INTERCONNECT mprj.la_data_out[9] la_data_out[9] (0.139:0.139:0.139))
- (INTERCONNECT mprj.wbs_ack_o wbs_ack_o (0.138:0.138:0.138))
- (INTERCONNECT mprj.wbs_dat_o[0] wbs_dat_o[0] (0.121:0.121:0.121))
- (INTERCONNECT mprj.wbs_dat_o[10] wbs_dat_o[10] (0.105:0.105:0.105))
- (INTERCONNECT mprj.wbs_dat_o[11] wbs_dat_o[11] (0.108:0.108:0.108))
- (INTERCONNECT mprj.wbs_dat_o[12] wbs_dat_o[12] (0.103:0.103:0.103))
- (INTERCONNECT mprj.wbs_dat_o[13] wbs_dat_o[13] (0.104:0.104:0.104))
- (INTERCONNECT mprj.wbs_dat_o[14] wbs_dat_o[14] (0.104:0.104:0.104))
- (INTERCONNECT mprj.wbs_dat_o[15] wbs_dat_o[15] (0.126:0.126:0.126))
- (INTERCONNECT mprj.wbs_dat_o[16] wbs_dat_o[16] (0.101:0.101:0.101))
- (INTERCONNECT mprj.wbs_dat_o[17] wbs_dat_o[17] (0.109:0.109:0.109))
- (INTERCONNECT mprj.wbs_dat_o[18] wbs_dat_o[18] (0.106:0.106:0.106))
- (INTERCONNECT mprj.wbs_dat_o[19] wbs_dat_o[19] (0.108:0.108:0.108))
- (INTERCONNECT mprj.wbs_dat_o[1] wbs_dat_o[1] (0.134:0.134:0.134))
- (INTERCONNECT mprj.wbs_dat_o[20] wbs_dat_o[20] (0.093:0.093:0.093))
- (INTERCONNECT mprj.wbs_dat_o[21] wbs_dat_o[21] (0.098:0.098:0.098))
- (INTERCONNECT mprj.wbs_dat_o[22] wbs_dat_o[22] (0.143:0.143:0.143))
- (INTERCONNECT mprj.wbs_dat_o[23] wbs_dat_o[23] (0.090:0.090:0.090))
- (INTERCONNECT mprj.wbs_dat_o[24] wbs_dat_o[24] (0.087:0.087:0.087))
- (INTERCONNECT mprj.wbs_dat_o[25] wbs_dat_o[25] (0.088:0.088:0.088))
- (INTERCONNECT mprj.wbs_dat_o[26] wbs_dat_o[26] (0.175:0.175:0.175))
- (INTERCONNECT mprj.wbs_dat_o[27] wbs_dat_o[27] (0.086:0.086:0.086))
- (INTERCONNECT mprj.wbs_dat_o[28] wbs_dat_o[28] (0.130:0.130:0.130))
- (INTERCONNECT mprj.wbs_dat_o[29] wbs_dat_o[29] (0.100:0.100:0.100))
- (INTERCONNECT mprj.wbs_dat_o[2] wbs_dat_o[2] (0.119:0.119:0.119))
- (INTERCONNECT mprj.wbs_dat_o[30] wbs_dat_o[30] (0.106:0.106:0.106))
- (INTERCONNECT mprj.wbs_dat_o[31] wbs_dat_o[31] (0.079:0.079:0.079))
- (INTERCONNECT mprj.wbs_dat_o[3] wbs_dat_o[3] (0.134:0.134:0.134))
- (INTERCONNECT mprj.wbs_dat_o[4] wbs_dat_o[4] (0.115:0.115:0.115))
- (INTERCONNECT mprj.wbs_dat_o[5] wbs_dat_o[5] (0.128:0.128:0.128))
- (INTERCONNECT mprj.wbs_dat_o[6] wbs_dat_o[6] (0.140:0.140:0.140))
- (INTERCONNECT mprj.wbs_dat_o[7] wbs_dat_o[7] (0.145:0.145:0.145))
- (INTERCONNECT mprj.wbs_dat_o[8] wbs_dat_o[8] (0.123:0.123:0.123))
- (INTERCONNECT mprj.wbs_dat_o[9] wbs_dat_o[9] (0.106:0.106:0.106))
- )
- )
- )
-)
diff --git a/sdf/user_proj_example.sdf b/sdf/user_proj_example.sdf
deleted file mode 100644
index 809c312..0000000
--- a/sdf/user_proj_example.sdf
+++ /dev/null
@@ -1,13562 +0,0 @@
-(DELAYFILE
- (SDFVERSION "3.0")
- (DESIGN "user_proj_example")
- (DATE "Mon Dec 5 18:20:38 2022")
- (VENDOR "Parallax")
- (PROGRAM "STA")
- (VERSION "2.3.2")
- (DIVIDER .)
- (TIMESCALE 1ns)
- (CELL
- (CELLTYPE "user_proj_example")
- (INSTANCE)
- (DELAY
- (ABSOLUTE
- (INTERCONNECT la_data_in[32] input1.I (0.145:0.145:0.145) (0.091:0.091:0.091))
- (INTERCONNECT la_data_in[32] ANTENNA_input1_I.I (0.145:0.145:0.145) (0.091:0.091:0.091))
- (INTERCONNECT la_data_in[33] input2.I (0.137:0.137:0.137) (0.085:0.085:0.085))
- (INTERCONNECT la_data_in[33] ANTENNA_input2_I.I (0.137:0.137:0.137) (0.086:0.086:0.086))
- (INTERCONNECT la_data_in[34] input3.I (0.151:0.151:0.151) (0.094:0.094:0.094))
- (INTERCONNECT la_data_in[34] ANTENNA_input3_I.I (0.151:0.151:0.151) (0.094:0.094:0.094))
- (INTERCONNECT la_data_in[35] input4.I (0.124:0.124:0.124) (0.078:0.078:0.078))
- (INTERCONNECT la_data_in[35] ANTENNA_input4_I.I (0.124:0.124:0.124) (0.078:0.078:0.078))
- (INTERCONNECT la_data_in[36] input5.I (0.120:0.120:0.120) (0.075:0.075:0.075))
- (INTERCONNECT la_data_in[36] ANTENNA_input5_I.I (0.120:0.120:0.120) (0.075:0.075:0.075))
- (INTERCONNECT la_data_in[37] input6.I (0.127:0.127:0.127) (0.079:0.079:0.079))
- (INTERCONNECT la_data_in[37] ANTENNA_input6_I.I (0.127:0.127:0.127) (0.079:0.079:0.079))
- (INTERCONNECT la_data_in[38] input7.I (0.149:0.149:0.149) (0.093:0.093:0.093))
- (INTERCONNECT la_data_in[38] ANTENNA_input7_I.I (0.149:0.149:0.149) (0.093:0.093:0.093))
- (INTERCONNECT la_data_in[39] input8.I (0.139:0.139:0.139) (0.087:0.087:0.087))
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