| VERSION 5.7 ; |
| NOWIREEXTENSIONATPIN ON ; |
| DIVIDERCHAR "/" ; |
| BUSBITCHARS "[]" ; |
| MACRO mux_example |
| CLASS BLOCK ; |
| FOREIGN mux_example ; |
| ORIGIN 0.000 0.000 ; |
| SIZE 900.000 BY 600.000 ; |
| PIN io_in[0] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 147.560 1.000 148.680 4.000 ; |
| END |
| END io_in[0] |
| PIN io_in[10] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 560.840 596.000 561.960 599.000 ; |
| END |
| END io_in[10] |
| PIN io_in[11] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 110.600 899.000 111.720 ; |
| END |
| END io_in[11] |
| PIN io_in[12] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 597.800 1.000 598.920 4.000 ; |
| END |
| END io_in[12] |
| PIN io_in[13] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 33.320 596.000 34.440 599.000 ; |
| END |
| END io_in[13] |
| PIN io_in[14] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 822.920 1.000 824.040 4.000 ; |
| END |
| END io_in[14] |
| PIN io_in[15] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 36.680 4.000 37.800 ; |
| END |
| END io_in[15] |
| PIN io_in[16] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 597.800 596.000 598.920 599.000 ; |
| END |
| END io_in[16] |
| PIN io_in[17] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 184.520 4.000 185.640 ; |
| END |
| END io_in[17] |
| PIN io_in[18] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 298.760 1.000 299.880 4.000 ; |
| END |
| END io_in[18] |
| PIN io_in[19] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 449.960 4.000 451.080 ; |
| END |
| END io_in[19] |
| PIN io_in[1] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 409.640 596.000 410.760 599.000 ; |
| END |
| END io_in[1] |
| PIN io_in[20] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 749.000 1.000 750.120 4.000 ; |
| END |
| END io_in[20] |
| PIN io_in[21] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 36.680 899.000 37.800 ; |
| END |
| END io_in[21] |
| PIN io_in[22] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 822.920 596.000 824.040 599.000 ; |
| END |
| END io_in[22] |
| PIN io_in[23] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 896.840 596.000 897.960 599.000 ; |
| END |
| END io_in[23] |
| PIN io_in[24] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 298.760 899.000 299.880 ; |
| END |
| END io_in[24] |
| PIN io_in[25] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 110.600 4.000 111.720 ; |
| END |
| END io_in[25] |
| PIN io_in[26] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 110.600 596.000 111.720 599.000 ; |
| END |
| END io_in[26] |
| PIN io_in[27] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 335.720 899.000 336.840 ; |
| END |
| END io_in[27] |
| PIN io_in[28] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 675.080 1.000 676.200 4.000 ; |
| END |
| END io_in[28] |
| PIN io_in[29] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 449.960 899.000 451.080 ; |
| END |
| END io_in[29] |
| PIN io_in[2] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 73.640 899.000 74.760 ; |
| END |
| END io_in[2] |
| PIN io_in[30] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 372.680 4.000 373.800 ; |
| END |
| END io_in[30] |
| PIN io_in[31] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 147.560 596.000 148.680 599.000 ; |
| END |
| END io_in[31] |
| PIN io_in[32] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 486.920 1.000 488.040 4.000 ; |
| END |
| END io_in[32] |
| PIN io_in[33] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 413.000 899.000 414.120 ; |
| END |
| END io_in[33] |
| PIN io_in[34] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 486.920 899.000 488.040 ; |
| END |
| END io_in[34] |
| PIN io_in[35] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 634.760 1.000 635.880 4.000 ; |
| END |
| END io_in[35] |
| PIN io_in[36] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 863.240 1.000 864.360 4.000 ; |
| END |
| END io_in[36] |
| PIN io_in[37] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 73.640 1.000 74.760 4.000 ; |
| END |
| END io_in[37] |
| PIN io_in[3] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 634.760 596.000 635.880 599.000 ; |
| END |
| END io_in[3] |
| PIN io_in[4] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 261.800 1.000 262.920 4.000 ; |
| END |
| END io_in[4] |
| PIN io_in[5] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 560.840 4.000 561.960 ; |
| END |
| END io_in[5] |
| PIN io_in[6] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 372.680 899.000 373.800 ; |
| END |
| END io_in[6] |
| PIN io_in[7] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 409.640 4.000 410.760 ; |
| END |
| END io_in[7] |
| PIN io_in[8] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 184.520 596.000 185.640 599.000 ; |
| END |
| END io_in[8] |
| PIN io_in[9] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 184.520 1.000 185.640 4.000 ; |
| END |
| END io_in[9] |
| PIN io_out[0] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 560.840 1.000 561.960 4.000 ; |
| END |
| END io_out[0] |
| PIN io_out[10] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 712.040 596.000 713.160 599.000 ; |
| END |
| END io_out[10] |
| PIN io_out[11] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 597.800 4.000 598.920 ; |
| END |
| END io_out[11] |
| PIN io_out[12] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 449.960 1.000 451.080 4.000 ; |
| END |
| END io_out[12] |
| PIN io_out[13] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 261.800 4.000 262.920 ; |
| END |
| END io_out[13] |
| PIN io_out[14] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 712.040 1.000 713.160 4.000 ; |
| END |
| END io_out[14] |
| PIN io_out[15] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 446.600 596.000 447.720 599.000 ; |
| END |
| END io_out[15] |
| PIN io_out[16] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 -0.280 899.000 0.840 ; |
| END |
| END io_out[16] |
| PIN io_out[17] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 147.560 899.000 148.680 ; |
| END |
| END io_out[17] |
| PIN io_out[18] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 147.560 4.000 148.680 ; |
| END |
| END io_out[18] |
| PIN io_out[19] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 523.880 4.000 525.000 ; |
| END |
| END io_out[19] |
| PIN io_out[1] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 372.680 596.000 373.800 599.000 ; |
| END |
| END io_out[1] |
| PIN io_out[20] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 523.880 596.000 525.000 599.000 ; |
| END |
| END io_out[20] |
| PIN io_out[21] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 73.640 4.000 74.760 ; |
| END |
| END io_out[21] |
| PIN io_out[22] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT -0.280 1.000 0.840 4.000 ; |
| END |
| END io_out[22] |
| PIN io_out[23] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 335.720 4.000 336.840 ; |
| END |
| END io_out[23] |
| PIN io_out[24] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 486.920 596.000 488.040 599.000 ; |
| END |
| END io_out[24] |
| PIN io_out[25] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 671.720 596.000 672.840 599.000 ; |
| END |
| END io_out[25] |
| PIN io_out[26] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 859.880 596.000 861.000 599.000 ; |
| END |
| END io_out[26] |
| PIN io_out[27] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 298.760 596.000 299.880 599.000 ; |
| END |
| END io_out[27] |
| PIN io_out[28] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 486.920 4.000 488.040 ; |
| END |
| END io_out[28] |
| PIN io_out[29] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 36.680 1.000 37.800 4.000 ; |
| END |
| END io_out[29] |
| PIN io_out[2] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 560.840 899.000 561.960 ; |
| END |
| END io_out[2] |
| PIN io_out[30] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 298.760 4.000 299.880 ; |
| END |
| END io_out[30] |
| PIN io_out[31] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 335.720 1.000 336.840 4.000 ; |
| END |
| END io_out[31] |
| PIN io_out[32] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 523.880 899.000 525.000 ; |
| END |
| END io_out[32] |
| PIN io_out[33] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 785.960 1.000 787.080 4.000 ; |
| END |
| END io_out[33] |
| PIN io_out[34] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 261.800 596.000 262.920 599.000 ; |
| END |
| END io_out[34] |
| PIN io_out[35] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 224.840 899.000 225.960 ; |
| END |
| END io_out[35] |
| PIN io_out[36] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 110.600 1.000 111.720 4.000 ; |
| END |
| END io_out[36] |
| PIN io_out[37] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 224.840 1.000 225.960 4.000 ; |
| END |
| END io_out[37] |
| PIN io_out[3] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 372.680 1.000 373.800 4.000 ; |
| END |
| END io_out[3] |
| PIN io_out[4] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 261.800 899.000 262.920 ; |
| END |
| END io_out[4] |
| PIN io_out[5] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 409.640 1.000 410.760 4.000 ; |
| END |
| END io_out[5] |
| PIN io_out[6] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 785.960 596.000 787.080 599.000 ; |
| END |
| END io_out[6] |
| PIN io_out[7] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 749.000 596.000 750.120 599.000 ; |
| END |
| END io_out[7] |
| PIN io_out[8] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 221.480 596.000 222.600 599.000 ; |
| END |
| END io_out[8] |
| PIN io_out[9] |
| DIRECTION OUTPUT TRISTATE ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 335.720 596.000 336.840 599.000 ; |
| END |
| END io_out[9] |
| PIN vdd |
| DIRECTION INOUT ; |
| USE POWER ; |
| PORT |
| LAYER Metal4 ; |
| RECT 22.240 15.380 23.840 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 175.840 15.380 177.440 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 329.440 15.380 331.040 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 483.040 15.380 484.640 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 636.640 15.380 638.240 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 790.240 15.380 791.840 584.380 ; |
| END |
| END vdd |
| PIN vss |
| DIRECTION INOUT ; |
| USE GROUND ; |
| PORT |
| LAYER Metal4 ; |
| RECT 99.040 15.380 100.640 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 252.640 15.380 254.240 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 406.240 15.380 407.840 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 559.840 15.380 561.440 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 713.440 15.380 715.040 584.380 ; |
| END |
| PORT |
| LAYER Metal4 ; |
| RECT 867.040 15.380 868.640 584.380 ; |
| END |
| END vss |
| PIN wbs_sel_i[0] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 523.880 1.000 525.000 4.000 ; |
| END |
| END wbs_sel_i[0] |
| PIN wbs_sel_i[1] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 1.000 224.840 4.000 225.960 ; |
| END |
| END wbs_sel_i[1] |
| PIN wbs_sel_i[2] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal2 ; |
| RECT 73.640 596.000 74.760 599.000 ; |
| END |
| END wbs_sel_i[2] |
| PIN wbs_sel_i[3] |
| DIRECTION INPUT ; |
| USE SIGNAL ; |
| PORT |
| LAYER Metal3 ; |
| RECT 896.000 187.880 899.000 189.000 ; |
| END |
| END wbs_sel_i[3] |
| OBS |
| LAYER Metal1 ; |
| RECT 6.720 15.380 893.200 585.050 ; |
| LAYER Metal2 ; |
| RECT 0.700 595.700 33.020 596.820 ; |
| RECT 34.740 595.700 73.340 596.820 ; |
| RECT 75.060 595.700 110.300 596.820 ; |
| RECT 112.020 595.700 147.260 596.820 ; |
| RECT 148.980 595.700 184.220 596.820 ; |
| RECT 185.940 595.700 221.180 596.820 ; |
| RECT 222.900 595.700 261.500 596.820 ; |
| RECT 263.220 595.700 298.460 596.820 ; |
| RECT 300.180 595.700 335.420 596.820 ; |
| RECT 337.140 595.700 372.380 596.820 ; |
| RECT 374.100 595.700 409.340 596.820 ; |
| RECT 411.060 595.700 446.300 596.820 ; |
| RECT 448.020 595.700 486.620 596.820 ; |
| RECT 488.340 595.700 523.580 596.820 ; |
| RECT 525.300 595.700 560.540 596.820 ; |
| RECT 562.260 595.700 597.500 596.820 ; |
| RECT 599.220 595.700 634.460 596.820 ; |
| RECT 636.180 595.700 671.420 596.820 ; |
| RECT 673.140 595.700 711.740 596.820 ; |
| RECT 713.460 595.700 748.700 596.820 ; |
| RECT 750.420 595.700 785.660 596.820 ; |
| RECT 787.380 595.700 822.620 596.820 ; |
| RECT 824.340 595.700 859.580 596.820 ; |
| RECT 861.300 595.700 890.820 596.820 ; |
| RECT 0.700 4.300 890.820 595.700 ; |
| RECT 1.140 3.450 36.380 4.300 ; |
| RECT 38.100 3.450 73.340 4.300 ; |
| RECT 75.060 3.450 110.300 4.300 ; |
| RECT 112.020 3.450 147.260 4.300 ; |
| RECT 148.980 3.450 184.220 4.300 ; |
| RECT 185.940 3.450 224.540 4.300 ; |
| RECT 226.260 3.450 261.500 4.300 ; |
| RECT 263.220 3.450 298.460 4.300 ; |
| RECT 300.180 3.450 335.420 4.300 ; |
| RECT 337.140 3.450 372.380 4.300 ; |
| RECT 374.100 3.450 409.340 4.300 ; |
| RECT 411.060 3.450 449.660 4.300 ; |
| RECT 451.380 3.450 486.620 4.300 ; |
| RECT 488.340 3.450 523.580 4.300 ; |
| RECT 525.300 3.450 560.540 4.300 ; |
| RECT 562.260 3.450 597.500 4.300 ; |
| RECT 599.220 3.450 634.460 4.300 ; |
| RECT 636.180 3.450 674.780 4.300 ; |
| RECT 676.500 3.450 711.740 4.300 ; |
| RECT 713.460 3.450 748.700 4.300 ; |
| RECT 750.420 3.450 785.660 4.300 ; |
| RECT 787.380 3.450 822.620 4.300 ; |
| RECT 824.340 3.450 862.940 4.300 ; |
| RECT 864.660 3.450 890.820 4.300 ; |
| LAYER Metal3 ; |
| RECT 4.300 597.500 896.420 597.940 ; |
| RECT 3.500 562.260 896.420 597.500 ; |
| RECT 4.300 560.540 895.700 562.260 ; |
| RECT 3.500 525.300 896.420 560.540 ; |
| RECT 4.300 523.580 895.700 525.300 ; |
| RECT 3.500 488.340 896.420 523.580 ; |
| RECT 4.300 486.620 895.700 488.340 ; |
| RECT 3.500 451.380 896.420 486.620 ; |
| RECT 4.300 449.660 895.700 451.380 ; |
| RECT 3.500 414.420 896.420 449.660 ; |
| RECT 3.500 412.700 895.700 414.420 ; |
| RECT 3.500 411.060 896.420 412.700 ; |
| RECT 4.300 409.340 896.420 411.060 ; |
| RECT 3.500 374.100 896.420 409.340 ; |
| RECT 4.300 372.380 895.700 374.100 ; |
| RECT 3.500 337.140 896.420 372.380 ; |
| RECT 4.300 335.420 895.700 337.140 ; |
| RECT 3.500 300.180 896.420 335.420 ; |
| RECT 4.300 298.460 895.700 300.180 ; |
| RECT 3.500 263.220 896.420 298.460 ; |
| RECT 4.300 261.500 895.700 263.220 ; |
| RECT 3.500 226.260 896.420 261.500 ; |
| RECT 4.300 224.540 895.700 226.260 ; |
| RECT 3.500 189.300 896.420 224.540 ; |
| RECT 3.500 187.580 895.700 189.300 ; |
| RECT 3.500 185.940 896.420 187.580 ; |
| RECT 4.300 184.220 896.420 185.940 ; |
| RECT 3.500 148.980 896.420 184.220 ; |
| RECT 4.300 147.260 895.700 148.980 ; |
| RECT 3.500 112.020 896.420 147.260 ; |
| RECT 4.300 110.300 895.700 112.020 ; |
| RECT 3.500 75.060 896.420 110.300 ; |
| RECT 4.300 73.340 895.700 75.060 ; |
| RECT 3.500 38.100 896.420 73.340 ; |
| RECT 4.300 36.380 895.700 38.100 ; |
| RECT 3.500 1.140 896.420 36.380 ; |
| RECT 3.500 0.700 895.700 1.140 ; |
| END |
| END mux_example |
| END LIBRARY |
| |