| |
| =========================================================================== |
| report_checks -unconstrained |
| ============================================================================ |
| Startpoint: wbs_we_i (input port clocked by wb_clk_i) |
| Endpoint: _126_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Path Group: wb_clk_i |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 6.00 6.00 ^ input external delay |
| 0.33 0.17 6.17 ^ wbs_we_i (in) |
| 4 0.02 wbs_we_i (net) |
| 0.33 0.00 6.17 ^ _061_/I (gf180mcu_fd_sc_mcu7t5v0__clkinv_1) |
| 0.19 0.17 6.34 v _061_/ZN (gf180mcu_fd_sc_mcu7t5v0__clkinv_1) |
| 2 0.01 _003_ (net) |
| 0.19 0.00 6.34 v _072_/A1 (gf180mcu_fd_sc_mcu7t5v0__nor4_1) |
| 0.76 0.42 6.76 ^ _072_/ZN (gf180mcu_fd_sc_mcu7t5v0__nor4_1) |
| 2 0.01 _014_ (net) |
| 0.76 0.00 6.76 ^ _073_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1) |
| 0.33 0.40 7.16 ^ _073_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1) |
| 4 0.02 _015_ (net) |
| 0.33 0.00 7.16 ^ _097_/A3 (gf180mcu_fd_sc_mcu7t5v0__and4_1) |
| 0.27 0.56 7.72 ^ _097_/Z (gf180mcu_fd_sc_mcu7t5v0__and4_1) |
| 2 0.01 _036_ (net) |
| 0.27 0.00 7.72 ^ _114_/B (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 0.24 0.21 7.93 v _114_/ZN (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 1 0.00 _052_ (net) |
| 0.24 0.00 7.93 v _115_/A2 (gf180mcu_fd_sc_mcu7t5v0__oai21_1) |
| 0.27 0.21 8.15 ^ _115_/ZN (gf180mcu_fd_sc_mcu7t5v0__oai21_1) |
| 1 0.00 _053_ (net) |
| 0.27 0.00 8.15 ^ _116_/A4 (gf180mcu_fd_sc_mcu7t5v0__and4_1) |
| 0.17 0.49 8.64 ^ _116_/Z (gf180mcu_fd_sc_mcu7t5v0__and4_1) |
| 1 0.00 _054_ (net) |
| 0.17 0.00 8.64 ^ _117_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1) |
| 0.10 0.21 8.85 ^ _117_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1) |
| 1 0.00 fsm_plant_opt.tmp2411 (net) |
| 0.10 0.00 8.85 ^ _126_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 8.85 data arrival time |
| |
| 0.15 30.00 30.00 clock wb_clk_i (rise edge) |
| 0.00 30.00 clock network delay (ideal) |
| -0.25 29.75 clock uncertainty |
| 0.00 29.75 clock reconvergence pessimism |
| 29.75 ^ _126_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| -0.20 29.55 library setup time |
| 29.55 data required time |
| ----------------------------------------------------------------------------- |
| 29.55 data required time |
| -8.85 data arrival time |
| ----------------------------------------------------------------------------- |
| 20.70 slack (MET) |
| |
| |
| |
| =========================================================================== |
| report_checks --slack_max -0.01 |
| ============================================================================ |
| No paths found. |
