| |
| =========================================================================== |
| report_checks -path_delay min (Hold) |
| ============================================================================ |
| Startpoint: _130_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Endpoint: _130_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Path Group: wb_clk_i |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.15 0.00 0.00 ^ _130_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.25 0.73 0.73 v _130_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 3 0.02 fsm_plant_opt.state_water_synth_2 (net) |
| 0.25 0.00 0.73 v _060_/A2 (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 0.28 0.24 0.97 ^ _060_/ZN (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 4 0.02 _002_ (net) |
| 0.28 0.00 0.97 ^ _124_/A2 (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 0.15 0.12 1.09 v _124_/ZN (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 1 0.00 fsm_plant_opt.tmp3555 (net) |
| 0.15 0.00 1.09 v _130_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 1.09 data arrival time |
| |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.25 0.25 clock uncertainty |
| 0.00 0.25 clock reconvergence pessimism |
| 0.25 ^ _130_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.08 0.33 library hold time |
| 0.33 data required time |
| ----------------------------------------------------------------------------- |
| 0.33 data required time |
| -1.09 data arrival time |
| ----------------------------------------------------------------------------- |
| 0.76 slack (MET) |
| |
| |
| Startpoint: _125_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Endpoint: _125_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Path Group: wb_clk_i |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.15 0.00 0.00 ^ _125_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.31 0.77 0.77 v _125_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 3 0.03 fsm_plant_opt.state_temperature_synth_1 (net) |
| 0.31 0.00 0.77 v _094_/A1 (gf180mcu_fd_sc_mcu7t5v0__aoi22_1) |
| 0.24 0.20 0.97 ^ _094_/ZN (gf180mcu_fd_sc_mcu7t5v0__aoi22_1) |
| 1 0.01 _033_ (net) |
| 0.24 0.00 0.97 ^ _102_/A1 (gf180mcu_fd_sc_mcu7t5v0__oai21_1) |
| 0.16 0.12 1.10 v _102_/ZN (gf180mcu_fd_sc_mcu7t5v0__oai21_1) |
| 1 0.00 _041_ (net) |
| 0.16 0.00 1.10 v _106_/A1 (gf180mcu_fd_sc_mcu7t5v0__nand2_1) |
| 0.16 0.13 1.23 ^ _106_/ZN (gf180mcu_fd_sc_mcu7t5v0__nand2_1) |
| 1 0.00 _045_ (net) |
| 0.16 0.00 1.23 ^ _112_/A1 (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 0.14 0.11 1.35 v _112_/ZN (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 1 0.00 fsm_plant_opt.tmp2410 (net) |
| 0.14 0.00 1.35 v _125_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 1.35 data arrival time |
| |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.25 0.25 clock uncertainty |
| 0.00 0.25 clock reconvergence pessimism |
| 0.25 ^ _125_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.09 0.34 library hold time |
| 0.34 data required time |
| ----------------------------------------------------------------------------- |
| 0.34 data required time |
| -1.35 data arrival time |
| ----------------------------------------------------------------------------- |
| 1.01 slack (MET) |
| |
| |
| Startpoint: _130_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Endpoint: _128_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Path Group: wb_clk_i |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.15 0.00 0.00 ^ _130_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.25 0.73 0.73 v _130_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 3 0.02 fsm_plant_opt.state_water_synth_2 (net) |
| 0.25 0.00 0.73 v _060_/A2 (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 0.28 0.24 0.97 ^ _060_/ZN (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 4 0.02 _002_ (net) |
| 0.28 0.00 0.97 ^ _109_/A2 (gf180mcu_fd_sc_mcu7t5v0__oai21_1) |
| 0.19 0.18 1.16 v _109_/ZN (gf180mcu_fd_sc_mcu7t5v0__oai21_1) |
| 2 0.01 _048_ (net) |
| 0.19 0.00 1.16 v _121_/A1 (gf180mcu_fd_sc_mcu7t5v0__and2_1) |
| 0.11 0.25 1.40 v _121_/Z (gf180mcu_fd_sc_mcu7t5v0__and2_1) |
| 1 0.00 _057_ (net) |
| 0.11 0.00 1.40 v _122_/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 0.18 0.23 1.64 v _122_/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 2 0.01 fsm_plant_opt.tmp3554 (net) |
| 0.18 0.00 1.64 v _128_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 1.64 data arrival time |
| |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.25 0.25 clock uncertainty |
| 0.00 0.25 clock reconvergence pessimism |
| 0.25 ^ _128_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.07 0.32 library hold time |
| 0.32 data required time |
| ----------------------------------------------------------------------------- |
| 0.32 data required time |
| -1.64 data arrival time |
| ----------------------------------------------------------------------------- |
| 1.31 slack (MET) |
| |
| |
| Startpoint: _130_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Endpoint: _129_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Path Group: wb_clk_i |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.15 0.00 0.00 ^ _130_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.25 0.73 0.73 v _130_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 3 0.02 fsm_plant_opt.state_water_synth_2 (net) |
| 0.25 0.00 0.73 v _060_/A2 (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 0.28 0.24 0.97 ^ _060_/ZN (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 4 0.02 _002_ (net) |
| 0.28 0.00 0.97 ^ _066_/A2 (gf180mcu_fd_sc_mcu7t5v0__nand3_1) |
| 0.32 0.23 1.20 v _066_/ZN (gf180mcu_fd_sc_mcu7t5v0__nand3_1) |
| 3 0.01 _008_ (net) |
| 0.32 0.00 1.20 v _076_/A1 (gf180mcu_fd_sc_mcu7t5v0__and2_1) |
| 0.12 0.29 1.49 v _076_/Z (gf180mcu_fd_sc_mcu7t5v0__and2_1) |
| 1 0.00 _018_ (net) |
| 0.12 0.00 1.49 v _090_/A1 (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 0.26 0.17 1.67 ^ _090_/ZN (gf180mcu_fd_sc_mcu7t5v0__aoi21_1) |
| 1 0.00 fsm_plant_opt.tmp2409 (net) |
| 0.26 0.00 1.67 ^ _129_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 1.67 data arrival time |
| |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.25 0.25 clock uncertainty |
| 0.00 0.25 clock reconvergence pessimism |
| 0.25 ^ _129_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.05 0.30 library hold time |
| 0.30 data required time |
| ----------------------------------------------------------------------------- |
| 0.30 data required time |
| -1.67 data arrival time |
| ----------------------------------------------------------------------------- |
| 1.37 slack (MET) |
| |
| |
| Startpoint: _130_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Endpoint: _126_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Path Group: wb_clk_i |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.15 0.00 0.00 ^ _130_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.25 0.73 0.73 v _130_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 3 0.02 fsm_plant_opt.state_water_synth_2 (net) |
| 0.25 0.00 0.73 v _060_/A2 (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 0.28 0.24 0.97 ^ _060_/ZN (gf180mcu_fd_sc_mcu7t5v0__nand3_2) |
| 4 0.02 _002_ (net) |
| 0.28 0.00 0.97 ^ _066_/A2 (gf180mcu_fd_sc_mcu7t5v0__nand3_1) |
| 0.32 0.23 1.20 v _066_/ZN (gf180mcu_fd_sc_mcu7t5v0__nand3_1) |
| 3 0.01 _008_ (net) |
| 0.32 0.00 1.20 v _116_/A2 (gf180mcu_fd_sc_mcu7t5v0__and4_1) |
| 0.12 0.34 1.55 v _116_/Z (gf180mcu_fd_sc_mcu7t5v0__and4_1) |
| 1 0.00 _054_ (net) |
| 0.12 0.00 1.55 v _117_/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 0.12 0.20 1.74 v _117_/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 1 0.00 fsm_plant_opt.tmp2411 (net) |
| 0.12 0.00 1.74 v _126_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 1.74 data arrival time |
| |
| 0.15 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (ideal) |
| 0.25 0.25 clock uncertainty |
| 0.00 0.25 clock reconvergence pessimism |
| 0.25 ^ _126_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 0.09 0.34 library hold time |
| 0.34 data required time |
| ----------------------------------------------------------------------------- |
| 0.34 data required time |
| -1.74 data arrival time |
| ----------------------------------------------------------------------------- |
| 1.40 slack (MET) |
| |
| |