tapeout/outputs/drc/caravel_18005f3a_comp.lyrdb

<?xml version="1.0" encoding="utf-8"?>
<report-database>
 <description>DRC Run Report at</description>
 <original-file/>
 <generator>drc: script='/mnt/shuttles/shuttle/gfmpw-0/u9820_lpgarci/divider/tapeout/outputs/drc/comp.drc'</generator>
 <top-cell>caravel_18005f3a</top-cell>
 <tags>
 </tags>
 <categories>
  <category>
   <name>DF.1a_3.3V</name>
   <description>DF.1a_3.3V : Min. COMP Width. : 0.22µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.1a_5V</name>
   <description>DF.1a_5V : Min. COMP Width. : 0.3µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.1c_3.3V</name>
   <description>DF.1c_3.3V : Min. COMP Width for MOSCAP. : 1µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.1c_5V</name>
   <description>DF.1c_5V : Min. COMP Width for MOSCAP. : 1µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.2a_3.3V</name>
   <description>DF.2a_3.3V : Min Channel Width. : nil,0.22µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.2a_5V</name>
   <description>DF.2a_5V : Min Channel Width. : nil,0.3µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.2b_3.3V</name>
   <description>DF.2b_3.3V : Max. COMP width for all cases except those used for capacitors, marked by ‘MOS_CAP_MK’ layer.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.2b_5V</name>
   <description>DF.2b_5V : Max. COMP width for all cases except those used for capacitors, marked by ‘MOS_CAP_MK’ layer.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.3a_3.3V</name>
   <description>DF.3a_3.3V : Min. COMP Space P-substrate tap (PCOMP outside NWELL and DNWELL) can be butted for different voltage devices as the potential is same. : 0.28µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.3a_5V</name>
   <description>DF.3a_5V : Min. COMP Space P-substrate tap (PCOMP outside NWELL and DNWELL) can be butted for different voltage devices as the potential is same. : 0.36µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.3b_3.3V</name>
   <description>DF.3b_3.3V : Min./Max. NCOMP Space to PCOMP in the same well for butted COMP (MOSCAP butting is not allowed).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.3b_5V</name>
   <description>DF.3b_5V : Min./Max. NCOMP Space to PCOMP in the same well for butted COMP(MOSCAP butting is not allowed).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.3c_3.3V</name>
   <description>DF.3c_3.3V : Min. COMP Space in BJT area (area marked by DRC_BJT layer). : 0.32µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.3c_5V</name>
   <description>DF.3c_5V : Min. COMP Space in BJT area (area marked by DRC_BJT layer) hasn’t been assessed.</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4a_3.3V</name>
   <description>DF.4a_3.3V : Min. (LVPWELL Space to NCOMP well tap) inside DNWELL. : 0.12µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4a_5V</name>
   <description>DF.4a_5V : Min. (LVPWELL Space to NCOMP well tap) inside DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4b_3.3V</name>
   <description>DF.4b_3.3V : Min. DNWELL overlap of NCOMP well tap. : 0.62µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4b_5V</name>
   <description>DF.4b_5V : Min. DNWELL overlap of NCOMP well tap. : 0.66µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4c_3.3V</name>
   <description>DF.4c_3.3V : Min. (Nwell overlap of PCOMP) outside DNWELL. : 0.43µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4c_5V</name>
   <description>DF.4c_5V : Min. (Nwell overlap of PCOMP) outside DNWELL. : 0.6µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4d_3.3V</name>
   <description>DF.4d_3.3V : Min. (Nwell overlap of NCOMP) outside DNWELL. : 0.12µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4d_5V</name>
   <description>DF.4d_5V : Min. (Nwell overlap of NCOMP) outside DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4e_3.3V</name>
   <description>DF.4e_3.3V : Min. DNWELL overlap of PCOMP. : 0.93µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.4e_5V</name>
   <description>DF.4e_5V : Min. DNWELL overlap of PCOMP. : 1.1µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.5_3.3V</name>
   <description>DF.5_3.3V : Min. (LVPWELL overlap of PCOMP well tap) inside DNWELL. : 0.12µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.5_5V</name>
   <description>DF.5_5V : Min. (LVPWELL overlap of PCOMP well tap) inside DNWELL. : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.6_3.3V</name>
   <description>DF.6_3.3V : Min. COMP extend beyond gate (it also means source/drain overhang). : 0.24µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.6_5V</name>
   <description>DF.6_5V : Min. COMP extend beyond gate (it also means source/drain overhang). : 0.4µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.7_3.3V</name>
   <description>DF.7_3.3V : Min. (LVPWELL Spacer to PCOMP) inside DNWELL. : 0.43µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.7_5V</name>
   <description>DF.7_5V : Min. (LVPWELL Spacer to PCOMP) inside DNWELL. : 0.6µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.8_3.3V</name>
   <description>DF.8_3.3V : Min. (LVPWELL overlap of NCOMP) Inside DNWELL. : 0.43µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.8_5V</name>
   <description>DF.8_5V : Min. (LVPWELL overlap of NCOMP) Inside DNWELL. : 0.6µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.9_3.3V</name>
   <description>DF.9_3.3V : Min. COMP area (um2). : 0.2025µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.9_5V</name>
   <description>DF.9_5V : Min. COMP area (um2). : 0.2025µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.10_3.3V</name>
   <description>DF.10_3.3V : Min. field area (um2). : 0.26µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.10_5V</name>
   <description>DF.10_5V : Min. field area (um2). : 0.26µm²</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.11_3.3V</name>
   <description>DF.11_3.3V : Min. Length of butting COMP edge. : 0.3µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.11_5V</name>
   <description>DF.11_5V : Min. Length of butting COMP edge. : 0.3µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.12_3.3V</name>
   <description>DF.12_3.3V : COMP not covered by Nplus or Pplus is forbidden (except those COMP under marking).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.12_5V</name>
   <description>DF.12_5V : COMP not covered by Nplus or Pplus is forbidden (except those COMP under marking).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.13_3.3V</name>
   <description>DF.13_3.3V : Max distance of Nwell tap (NCOMP inside Nwell) from (PCOMP inside Nwell).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.13_5V</name>
   <description>DF.13_5V : Max distance of Nwell tap (NCOMP inside Nwell) from (PCOMP inside Nwell).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.14_3.3V</name>
   <description>DF.14_3.3V : Max distance of substrate tap (PCOMP outside Nwell) from (NCOMP outside Nwell).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.14_5V</name>
   <description>DF.14_5V : Max distance of substrate tap (PCOMP outside Nwell) from (NCOMP outside Nwell).</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.16_3.3V</name>
   <description>DF.16_3.3V : Min. space from (Nwell outside DNWELL) to (NCOMP outside Nwell and DNWELL). : 0.43µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.16_5V</name>
   <description>DF.16_5V : Min. space from (Nwell outside DNWELL) to (NCOMP outside Nwell and DNWELL). : 0.6µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.17_3.3V</name>
   <description>DF.17_3.3V : Min. space from (Nwell Outside DNWELL) to (PCOMP outside Nwell and DNWELL). : 0.12µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.17_5V</name>
   <description>DF.17_5V : Min. space from (Nwell Outside DNWELL) to (PCOMP outside Nwell and DNWELL). : 0.16µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.18_3.3V</name>
   <description>DF.18_3.3V : Min. DNWELL space to (PCOMP outside Nwell and DNWELL). : 2.5µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.18_5V</name>
   <description>DF.18_5V : Min. DNWELL space to (PCOMP outside Nwell and DNWELL). : 2.5µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.19_3.3V</name>
   <description>DF.19_3.3V : Min. DNWELL space to (NCOMP outside Nwell and DNWELL). : 3.2µm</description>
   <categories>
   </categories>
  </category>
  <category>
   <name>DF.19_5V</name>
   <description>DF.19_5V : Min. DNWELL space to (NCOMP outside Nwell and DNWELL). : 3.28µm</description>
   <categories>
   </categories>
  </category>
 </categories>
 <cells>
  <cell>
   <name>caravel_18005f3a</name>
   <variant/>
   <references>
   </references>
  </cell>
 </cells>
 <items>
 </items>
</report-database>