Merge branch 'main' of github.com:rolfmobile99/tiny_user_project into main
diff --git a/def/tiny_user_project.def b/def/tiny_user_project.def
index 63f16a3..ceb1fb7 100644
--- a/def/tiny_user_project.def
+++ b/def/tiny_user_project.def
@@ -186,7 +186,10 @@
- via2_3_3200_1200_1_3_1040_1040 + VIARULE Via2_GEN_HH + CUTSIZE 520 520 + LAYERS Metal2 Via2 Metal3 + CUTSPACING 520 520 + ENCLOSURE 20 120 120 20 + ROWCOL 1 3 ;
- via3_4_3200_1200_1_3_1040_1040 + VIARULE Via3_GEN_HH + CUTSIZE 520 520 + LAYERS Metal3 Via3 Metal4 + CUTSPACING 520 520 + ENCLOSURE 120 20 300 120 + ROWCOL 1 3 ;
END VIAS
-COMPONENTS 10747 ;
+COMPONENTS 10772 ;
+ - ANTENNA__001__A1 gf180mcu_fd_sc_mcu7t5v0__antenna + PLACED ( 35840 517440 ) N ;
+ - ANTENNA_input1_I gf180mcu_fd_sc_mcu7t5v0__antenna + PLACED ( 16800 768320 ) FN ;
+ - ANTENNA_input2_I gf180mcu_fd_sc_mcu7t5v0__antenna + PLACED ( 16800 533120 ) FN ;
- FILLER_0_101 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 126560 31360 ) N ;
- FILLER_0_1011 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 1145760 31360 ) N ;
- FILLER_0_1017 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 1152480 31360 ) N ;
@@ -5794,6 +5797,7 @@
- FILLER_57_137 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 166880 478240 ) FS ;
- FILLER_57_141 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 171360 478240 ) FS ;
- FILLER_57_144 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 174720 478240 ) FS ;
+ - FILLER_57_17 gf180mcu_fd_sc_mcu7t5v0__fillcap_32 + SOURCE DIST + PLACED ( 32480 478240 ) FS ;
- FILLER_57_2 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 15680 478240 ) FS ;
- FILLER_57_208 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 246400 478240 ) FS ;
- FILLER_57_212 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 250880 478240 ) FS ;
@@ -5807,6 +5811,7 @@
- FILLER_57_421 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 484960 478240 ) FS ;
- FILLER_57_425 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 489440 478240 ) FS ;
- FILLER_57_428 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 492800 478240 ) FS ;
+ - FILLER_57_49 gf180mcu_fd_sc_mcu7t5v0__fillcap_16 + SOURCE DIST + PLACED ( 68320 478240 ) FS ;
- FILLER_57_492 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 564480 478240 ) FS ;
- FILLER_57_496 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 568960 478240 ) FS ;
- FILLER_57_499 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 572320 478240 ) FS ;
@@ -5816,7 +5821,8 @@
- FILLER_57_634 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 723520 478240 ) FS ;
- FILLER_57_638 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 728000 478240 ) FS ;
- FILLER_57_641 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 731360 478240 ) FS ;
- - FILLER_57_7 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 21280 478240 ) FS ;
+ - FILLER_57_65 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 86240 478240 ) FS ;
+ - FILLER_57_69 gf180mcu_fd_sc_mcu7t5v0__fill_2 + SOURCE DIST + PLACED ( 90720 478240 ) FS ;
- FILLER_57_705 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 803040 478240 ) FS ;
- FILLER_57_709 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 807520 478240 ) FS ;
- FILLER_57_712 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 810880 478240 ) FS ;
@@ -6021,7 +6027,8 @@
- FILLER_61_137 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 166880 509600 ) FS ;
- FILLER_61_141 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 171360 509600 ) FS ;
- FILLER_61_144 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 174720 509600 ) FS ;
- - FILLER_61_2 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 15680 509600 ) FS ;
+ - FILLER_61_15 gf180mcu_fd_sc_mcu7t5v0__fillcap_32 + SOURCE DIST + PLACED ( 30240 509600 ) FS ;
+ - FILLER_61_2 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 15680 509600 ) FS ;
- FILLER_61_208 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 246400 509600 ) FS ;
- FILLER_61_212 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 250880 509600 ) FS ;
- FILLER_61_215 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 254240 509600 ) FS ;
@@ -6034,17 +6041,18 @@
- FILLER_61_421 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 484960 509600 ) FS ;
- FILLER_61_425 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 489440 509600 ) FS ;
- FILLER_61_428 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 492800 509600 ) FS ;
+ - FILLER_61_47 gf180mcu_fd_sc_mcu7t5v0__fillcap_16 + SOURCE DIST + PLACED ( 66080 509600 ) FS ;
- FILLER_61_492 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 564480 509600 ) FS ;
- FILLER_61_496 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 568960 509600 ) FS ;
- FILLER_61_499 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 572320 509600 ) FS ;
- FILLER_61_563 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 644000 509600 ) FS ;
- FILLER_61_567 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 648480 509600 ) FS ;
- FILLER_61_570 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 651840 509600 ) FS ;
+ - FILLER_61_6 gf180mcu_fd_sc_mcu7t5v0__fill_2 + SOURCE DIST + PLACED ( 20160 509600 ) FS ;
+ - FILLER_61_63 gf180mcu_fd_sc_mcu7t5v0__fillcap_8 + SOURCE DIST + PLACED ( 84000 509600 ) FS ;
- FILLER_61_634 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 723520 509600 ) FS ;
- FILLER_61_638 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 728000 509600 ) FS ;
- FILLER_61_641 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 731360 509600 ) FS ;
- - FILLER_61_66 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 87360 509600 ) FS ;
- - FILLER_61_70 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 91840 509600 ) FS ;
- FILLER_61_705 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 803040 509600 ) FS ;
- FILLER_61_709 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 807520 509600 ) FS ;
- FILLER_61_712 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 810880 509600 ) FS ;
@@ -6052,6 +6060,7 @@
- FILLER_61_776 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 882560 509600 ) FS ;
- FILLER_61_780 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 887040 509600 ) FS ;
- FILLER_61_783 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 890400 509600 ) FS ;
+ - FILLER_61_8 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 22400 509600 ) FS ;
- FILLER_61_847 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 962080 509600 ) FS ;
- FILLER_61_851 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 966560 509600 ) FS ;
- FILLER_61_854 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 969920 509600 ) FS ;
@@ -6072,10 +6081,13 @@
- FILLER_62_172 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 206080 517440 ) N ;
- FILLER_62_176 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 210560 517440 ) N ;
- FILLER_62_179 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 213920 517440 ) N ;
- - FILLER_62_2 gf180mcu_fd_sc_mcu7t5v0__fillcap_32 + SOURCE DIST + PLACED ( 15680 517440 ) N ;
+ - FILLER_62_18 gf180mcu_fd_sc_mcu7t5v0__fill_2 + SOURCE DIST + PLACED ( 33600 517440 ) N ;
+ - FILLER_62_2 gf180mcu_fd_sc_mcu7t5v0__fill_2 + SOURCE DIST + PLACED ( 15680 517440 ) N ;
+ - FILLER_62_22 gf180mcu_fd_sc_mcu7t5v0__fillcap_8 + SOURCE DIST + PLACED ( 38080 517440 ) N ;
- FILLER_62_243 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 285600 517440 ) N ;
- FILLER_62_247 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 290080 517440 ) N ;
- FILLER_62_250 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 293440 517440 ) N ;
+ - FILLER_62_30 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 47040 517440 ) N ;
- FILLER_62_314 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 365120 517440 ) N ;
- FILLER_62_318 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 369600 517440 ) N ;
- FILLER_62_321 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 372960 517440 ) N ;
@@ -6084,6 +6096,7 @@
- FILLER_62_385 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 444640 517440 ) N ;
- FILLER_62_389 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 449120 517440 ) N ;
- FILLER_62_392 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 452480 517440 ) N ;
+ - FILLER_62_4 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 17920 517440 ) N ;
- FILLER_62_456 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 524160 517440 ) N ;
- FILLER_62_460 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 528640 517440 ) N ;
- FILLER_62_463 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 532000 517440 ) N ;
@@ -6114,7 +6127,8 @@
- FILLER_63_137 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 166880 525280 ) FS ;
- FILLER_63_141 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 171360 525280 ) FS ;
- FILLER_63_144 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 174720 525280 ) FS ;
- - FILLER_63_2 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 15680 525280 ) FS ;
+ - FILLER_63_19 gf180mcu_fd_sc_mcu7t5v0__fillcap_32 + SOURCE DIST + PLACED ( 34720 525280 ) FS ;
+ - FILLER_63_2 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 15680 525280 ) FS ;
- FILLER_63_208 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 246400 525280 ) FS ;
- FILLER_63_212 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 250880 525280 ) FS ;
- FILLER_63_215 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 254240 525280 ) FS ;
@@ -6130,14 +6144,14 @@
- FILLER_63_492 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 564480 525280 ) FS ;
- FILLER_63_496 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 568960 525280 ) FS ;
- FILLER_63_499 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 572320 525280 ) FS ;
+ - FILLER_63_51 gf180mcu_fd_sc_mcu7t5v0__fillcap_16 + SOURCE DIST + PLACED ( 70560 525280 ) FS ;
- FILLER_63_563 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 644000 525280 ) FS ;
- FILLER_63_567 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 648480 525280 ) FS ;
- FILLER_63_570 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 651840 525280 ) FS ;
- FILLER_63_634 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 723520 525280 ) FS ;
- FILLER_63_638 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 728000 525280 ) FS ;
- FILLER_63_641 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 731360 525280 ) FS ;
- - FILLER_63_66 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 87360 525280 ) FS ;
- - FILLER_63_70 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 91840 525280 ) FS ;
+ - FILLER_63_67 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 88480 525280 ) FS ;
- FILLER_63_705 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 803040 525280 ) FS ;
- FILLER_63_709 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 807520 525280 ) FS ;
- FILLER_63_712 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 810880 525280 ) FS ;
@@ -6165,14 +6179,16 @@
- FILLER_64_172 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 206080 533120 ) N ;
- FILLER_64_176 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 210560 533120 ) N ;
- FILLER_64_179 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 213920 533120 ) N ;
- - FILLER_64_2 gf180mcu_fd_sc_mcu7t5v0__fillcap_32 + SOURCE DIST + PLACED ( 15680 533120 ) N ;
+ - FILLER_64_2 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 15680 533120 ) N ;
+ - FILLER_64_21 gf180mcu_fd_sc_mcu7t5v0__fillcap_8 + SOURCE DIST + PLACED ( 36960 533120 ) N ;
- FILLER_64_243 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 285600 533120 ) N ;
- FILLER_64_247 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 290080 533120 ) N ;
- FILLER_64_250 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 293440 533120 ) N ;
+ - FILLER_64_29 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 45920 533120 ) N ;
- FILLER_64_314 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 365120 533120 ) N ;
- FILLER_64_318 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 369600 533120 ) N ;
- FILLER_64_321 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 372960 533120 ) N ;
- - FILLER_64_34 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 51520 533120 ) N ;
+ - FILLER_64_33 gf180mcu_fd_sc_mcu7t5v0__fill_2 + SOURCE DIST + PLACED ( 50400 533120 ) N ;
- FILLER_64_37 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 54880 533120 ) N ;
- FILLER_64_385 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 444640 533120 ) N ;
- FILLER_64_389 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 449120 533120 ) N ;
@@ -6180,6 +6196,7 @@
- FILLER_64_456 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 524160 533120 ) N ;
- FILLER_64_460 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 528640 533120 ) N ;
- FILLER_64_463 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 532000 533120 ) N ;
+ - FILLER_64_5 gf180mcu_fd_sc_mcu7t5v0__fillcap_16 + SOURCE DIST + PLACED ( 19040 533120 ) N ;
- FILLER_64_527 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 603680 533120 ) N ;
- FILLER_64_531 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 608160 533120 ) N ;
- FILLER_64_534 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 611520 533120 ) N ;
@@ -7695,14 +7712,16 @@
- FILLER_94_172 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 206080 768320 ) N ;
- FILLER_94_176 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 210560 768320 ) N ;
- FILLER_94_179 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 213920 768320 ) N ;
- - FILLER_94_2 gf180mcu_fd_sc_mcu7t5v0__fillcap_32 + SOURCE DIST + PLACED ( 15680 768320 ) N ;
+ - FILLER_94_2 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 15680 768320 ) N ;
+ - FILLER_94_21 gf180mcu_fd_sc_mcu7t5v0__fillcap_8 + SOURCE DIST + PLACED ( 36960 768320 ) N ;
- FILLER_94_243 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 285600 768320 ) N ;
- FILLER_94_247 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 290080 768320 ) N ;
- FILLER_94_250 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 293440 768320 ) N ;
+ - FILLER_94_29 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 45920 768320 ) N ;
- FILLER_94_314 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 365120 768320 ) N ;
- FILLER_94_318 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 369600 768320 ) N ;
- FILLER_94_321 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 372960 768320 ) N ;
- - FILLER_94_34 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 51520 768320 ) N ;
+ - FILLER_94_33 gf180mcu_fd_sc_mcu7t5v0__fill_2 + SOURCE DIST + PLACED ( 50400 768320 ) N ;
- FILLER_94_37 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 54880 768320 ) N ;
- FILLER_94_385 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 444640 768320 ) N ;
- FILLER_94_389 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 449120 768320 ) N ;
@@ -7710,6 +7729,7 @@
- FILLER_94_456 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 524160 768320 ) N ;
- FILLER_94_460 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 528640 768320 ) N ;
- FILLER_94_463 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 532000 768320 ) N ;
+ - FILLER_94_5 gf180mcu_fd_sc_mcu7t5v0__fillcap_16 + SOURCE DIST + PLACED ( 19040 768320 ) N ;
- FILLER_94_527 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 603680 768320 ) N ;
- FILLER_94_531 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 608160 768320 ) N ;
- FILLER_94_534 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 611520 768320 ) N ;
@@ -7736,7 +7756,8 @@
- FILLER_95_137 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 166880 776160 ) FS ;
- FILLER_95_141 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 171360 776160 ) FS ;
- FILLER_95_144 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 174720 776160 ) FS ;
- - FILLER_95_2 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 15680 776160 ) FS ;
+ - FILLER_95_19 gf180mcu_fd_sc_mcu7t5v0__fillcap_32 + SOURCE DIST + PLACED ( 34720 776160 ) FS ;
+ - FILLER_95_2 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 15680 776160 ) FS ;
- FILLER_95_208 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 246400 776160 ) FS ;
- FILLER_95_212 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 250880 776160 ) FS ;
- FILLER_95_215 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 254240 776160 ) FS ;
@@ -7752,14 +7773,14 @@
- FILLER_95_492 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 564480 776160 ) FS ;
- FILLER_95_496 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 568960 776160 ) FS ;
- FILLER_95_499 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 572320 776160 ) FS ;
+ - FILLER_95_51 gf180mcu_fd_sc_mcu7t5v0__fillcap_16 + SOURCE DIST + PLACED ( 70560 776160 ) FS ;
- FILLER_95_563 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 644000 776160 ) FS ;
- FILLER_95_567 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 648480 776160 ) FS ;
- FILLER_95_570 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 651840 776160 ) FS ;
- FILLER_95_634 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 723520 776160 ) FS ;
- FILLER_95_638 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 728000 776160 ) FS ;
- FILLER_95_641 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 731360 776160 ) FS ;
- - FILLER_95_66 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 87360 776160 ) FS ;
- - FILLER_95_70 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 91840 776160 ) FS ;
+ - FILLER_95_67 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 88480 776160 ) FS ;
- FILLER_95_705 gf180mcu_fd_sc_mcu7t5v0__fillcap_4 + SOURCE DIST + PLACED ( 803040 776160 ) FS ;
- FILLER_95_709 gf180mcu_fd_sc_mcu7t5v0__fill_1 + SOURCE DIST + PLACED ( 807520 776160 ) FS ;
- FILLER_95_712 gf180mcu_fd_sc_mcu7t5v0__fillcap_64 + SOURCE DIST + PLACED ( 810880 776160 ) FS ;
@@ -10758,8 +10779,12 @@
- TAP_997 gf180mcu_fd_sc_mcu7t5v0__filltie + SOURCE DIST + FIXED ( 92960 384160 ) FS ;
- TAP_998 gf180mcu_fd_sc_mcu7t5v0__filltie + SOURCE DIST + FIXED ( 172480 384160 ) FS ;
- TAP_999 gf180mcu_fd_sc_mcu7t5v0__filltie + SOURCE DIST + FIXED ( 252000 384160 ) FS ;
- - tiny_user_project_1 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 646240 1317120 ) FN ;
- - tiny_user_project_10 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 478240 31360 ) FN ;
+ - _001_ gf180mcu_fd_sc_mcu7t5v0__xnor2_1 + PLACED ( 19040 517440 ) FN ;
+ - _002_ gf180mcu_fd_sc_mcu7t5v0__clkbuf_1 + PLACED ( 23520 509600 ) FS ;
+ - input1 gf180mcu_fd_sc_mcu7t5v0__dlyb_1 + SOURCE TIMING + PLACED ( 16800 776160 ) FS ;
+ - input2 gf180mcu_fd_sc_mcu7t5v0__dlyb_1 + SOURCE TIMING + PLACED ( 16800 525280 ) FS ;
+ - output3 gf180mcu_fd_sc_mcu7t5v0__clkbuf_3 + SOURCE TIMING + PLACED ( 16800 478240 ) S ;
+ - tiny_user_project_10 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 925120 ) FN ;
- tiny_user_project_100 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 263200 1317120 ) FN ;
- tiny_user_project_101 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 572320 ) FS ;
- tiny_user_project_102 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 964320 ) S ;
@@ -10770,7 +10795,7 @@
- tiny_user_project_107 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 642880 ) FN ;
- tiny_user_project_108 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1170400 1317120 ) N ;
- tiny_user_project_109 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 909440 ) N ;
- - tiny_user_project_11 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 603680 ) FS ;
+ - tiny_user_project_11 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 478240 31360 ) FN ;
- tiny_user_project_110 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1317120 ) FN ;
- tiny_user_project_111 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 787360 31360 ) FN ;
- tiny_user_project_112 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 329280 ) FN ;
@@ -10781,7 +10806,7 @@
- tiny_user_project_117 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 23520 1317120 ) FN ;
- tiny_user_project_118 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 370720 1317120 ) FN ;
- tiny_user_project_119 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 659680 1317120 ) FN ;
- - tiny_user_project_12 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1097600 ) FN ;
+ - tiny_user_project_12 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 603680 ) FS ;
- tiny_user_project_120 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1096480 31360 ) FN ;
- tiny_user_project_121 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 407680 ) N ;
- tiny_user_project_122 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1163680 1317120 ) FN ;
@@ -10792,7 +10817,7 @@
- tiny_user_project_127 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1301440 ) FN ;
- tiny_user_project_128 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 736960 ) N ;
- tiny_user_project_129 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 31360 ) N ;
- - tiny_user_project_13 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 791840 ) FS ;
+ - tiny_user_project_13 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1097600 ) FN ;
- tiny_user_project_130 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 392000 ) FN ;
- tiny_user_project_131 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1042720 1317120 ) FN ;
- tiny_user_project_132 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 290080 ) FS ;
@@ -10803,7 +10828,7 @@
- tiny_user_project_137 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1066240 ) N ;
- tiny_user_project_138 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 236320 1317120 ) FN ;
- tiny_user_project_139 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 831040 ) FN ;
- - tiny_user_project_14 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 545440 1317120 ) FN ;
+ - tiny_user_project_14 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 791840 ) FS ;
- tiny_user_project_140 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 525280 ) FS ;
- tiny_user_project_141 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 258720 ) S ;
- tiny_user_project_142 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1009120 31360 ) FN ;
@@ -10814,7 +10839,7 @@
- tiny_user_project_147 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1027040 ) FS ;
- tiny_user_project_148 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 773920 31360 ) FN ;
- tiny_user_project_149 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 761600 1317120 ) FN ;
- - tiny_user_project_15 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1136800 ) FS ;
+ - tiny_user_project_15 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 545440 1317120 ) FN ;
- tiny_user_project_150 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 747040 1317120 ) FN ;
- tiny_user_project_151 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 823200 ) FS ;
- tiny_user_project_152 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 21280 31360 ) FN ;
@@ -10825,7 +10850,7 @@
- tiny_user_project_157 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 360640 ) FN ;
- tiny_user_project_158 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 407680 ) FN ;
- tiny_user_project_159 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 861280 31360 ) FN ;
- - tiny_user_project_16 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 683200 31360 ) FN ;
+ - tiny_user_project_16 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1136800 ) FS ;
- tiny_user_project_160 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 39200 ) S ;
- tiny_user_project_161 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 611520 ) FN ;
- tiny_user_project_162 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1113280 ) FN ;
@@ -10836,7 +10861,7 @@
- tiny_user_project_167 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 585760 1317120 ) FN ;
- tiny_user_project_168 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 296800 1317120 ) FN ;
- tiny_user_project_169 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 700000 31360 ) FN ;
- - tiny_user_project_17 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 266560 ) N ;
+ - tiny_user_project_17 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 683200 31360 ) FN ;
- tiny_user_project_170 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 807520 1317120 ) FN ;
- tiny_user_project_171 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 23520 831040 ) FN ;
- tiny_user_project_172 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1074080 ) FS ;
@@ -10844,86 +10869,86 @@
- tiny_user_project_174 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 682080 ) FS ;
- tiny_user_project_175 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 297920 ) FN ;
- tiny_user_project_176 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 211680 ) S ;
- - tiny_user_project_18 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1270080 ) FN ;
- - tiny_user_project_19 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 878080 ) N ;
- - tiny_user_project_2 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 838880 ) FS ;
- - tiny_user_project_20 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 377440 31360 ) FN ;
- - tiny_user_project_21 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 580160 ) FN ;
- - tiny_user_project_22 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 689920 31360 ) FN ;
- - tiny_user_project_23 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1246560 ) S ;
- - tiny_user_project_24 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 693280 1317120 ) FN ;
- - tiny_user_project_25 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1105440 ) FS ;
- - tiny_user_project_26 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 552160 31360 ) FN ;
- - tiny_user_project_27 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 674240 ) N ;
- - tiny_user_project_28 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 141120 ) N ;
- - tiny_user_project_29 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 673120 1317120 ) FN ;
- - tiny_user_project_3 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 454720 ) N ;
- - tiny_user_project_30 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 313600 ) N ;
- - tiny_user_project_31 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 626080 31360 ) FN ;
- - tiny_user_project_32 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 605920 1317120 ) FN ;
- - tiny_user_project_33 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1113280 ) N ;
- - tiny_user_project_34 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 588000 ) FS ;
- - tiny_user_project_35 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 101920 ) FS ;
- - tiny_user_project_36 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 250880 ) N ;
- - tiny_user_project_37 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 39200 ) FS ;
- - tiny_user_project_38 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 470400 ) N ;
- - tiny_user_project_39 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1160320 ) N ;
- - tiny_user_project_4 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1153600 1317120 ) FN ;
- - tiny_user_project_40 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 75040 31360 ) FN ;
- - tiny_user_project_41 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 526400 31360 ) FN ;
- - tiny_user_project_42 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 115360 1317120 ) FN ;
- - tiny_user_project_43 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 101920 1317120 ) FN ;
- - tiny_user_project_44 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 909440 ) FN ;
- - tiny_user_project_45 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 296800 31360 ) FN ;
- - tiny_user_project_46 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1156960 31360 ) FN ;
- - tiny_user_project_47 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 360640 1317120 ) N ;
- - tiny_user_project_48 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1230880 ) S ;
- - tiny_user_project_49 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 164640 ) FS ;
- - tiny_user_project_5 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 78400 ) FN ;
- - tiny_user_project_50 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1215200 ) S ;
- - tiny_user_project_51 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 956480 ) N ;
- - tiny_user_project_52 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 397600 1317120 ) FN ;
- - tiny_user_project_53 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 384160 ) FS ;
- - tiny_user_project_54 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 894880 1317120 ) FN ;
- - tiny_user_project_55 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 972160 ) N ;
- - tiny_user_project_56 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 493920 ) S ;
- - tiny_user_project_57 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 957600 1317120 ) FN ;
- - tiny_user_project_58 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 343840 31360 ) FN ;
- - tiny_user_project_59 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1114400 31360 ) FN ;
- - tiny_user_project_6 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 689920 ) N ;
- - tiny_user_project_60 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 172480 ) N ;
- - tiny_user_project_61 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 134400 1317120 ) FN ;
- - tiny_user_project_62 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 81760 31360 ) FN ;
- - tiny_user_project_63 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 533120 ) N ;
- - tiny_user_project_64 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 511840 1317120 ) FN ;
- - tiny_user_project_65 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 592480 31360 ) FN ;
- - tiny_user_project_66 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 458080 1317120 ) FN ;
- - tiny_user_project_67 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 227360 ) S ;
- - tiny_user_project_68 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 729120 ) S ;
- - tiny_user_project_69 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 935200 31360 ) FN ;
- - tiny_user_project_7 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 768320 ) N ;
- - tiny_user_project_70 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 330400 31360 ) FN ;
- - tiny_user_project_71 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 310240 1317120 ) FN ;
- - tiny_user_project_72 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 827680 31360 ) FN ;
- - tiny_user_project_73 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1177120 1317120 ) FN ;
- - tiny_user_project_74 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1277920 ) S ;
- - tiny_user_project_75 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 948640 ) S ;
- - tiny_user_project_76 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 517440 31360 ) FN ;
- - tiny_user_project_77 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1152480 ) FS ;
- - tiny_user_project_78 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 148960 31360 ) FN ;
- - tiny_user_project_79 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1171520 39200 ) FS ;
- - tiny_user_project_8 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 47040 ) FN ;
- - tiny_user_project_80 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 202720 1317120 ) FN ;
- - tiny_user_project_81 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 203840 ) N ;
- - tiny_user_project_82 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 846720 ) FN ;
- - tiny_user_project_83 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 360640 ) N ;
- - tiny_user_project_84 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 478240 ) S ;
+ - tiny_user_project_177 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 646240 1317120 ) FN ;
+ - tiny_user_project_178 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 838880 ) FS ;
+ - tiny_user_project_18 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 266560 ) N ;
+ - tiny_user_project_19 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1270080 ) FN ;
+ - tiny_user_project_20 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 878080 ) N ;
+ - tiny_user_project_21 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 377440 31360 ) FN ;
+ - tiny_user_project_22 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 580160 ) FN ;
+ - tiny_user_project_23 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 689920 31360 ) FN ;
+ - tiny_user_project_24 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1246560 ) S ;
+ - tiny_user_project_25 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 693280 1317120 ) FN ;
+ - tiny_user_project_26 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1105440 ) FS ;
+ - tiny_user_project_27 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 552160 31360 ) FN ;
+ - tiny_user_project_28 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 674240 ) N ;
+ - tiny_user_project_29 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 141120 ) N ;
+ - tiny_user_project_30 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 673120 1317120 ) FN ;
+ - tiny_user_project_31 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 313600 ) N ;
+ - tiny_user_project_32 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 626080 31360 ) FN ;
+ - tiny_user_project_33 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 605920 1317120 ) FN ;
+ - tiny_user_project_34 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1113280 ) N ;
+ - tiny_user_project_35 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 588000 ) FS ;
+ - tiny_user_project_36 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 101920 ) FS ;
+ - tiny_user_project_37 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 250880 ) N ;
+ - tiny_user_project_38 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 39200 ) FS ;
+ - tiny_user_project_39 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 470400 ) N ;
+ - tiny_user_project_4 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 454720 ) N ;
+ - tiny_user_project_40 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1160320 ) N ;
+ - tiny_user_project_41 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 75040 31360 ) FN ;
+ - tiny_user_project_42 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 526400 31360 ) FN ;
+ - tiny_user_project_43 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 115360 1317120 ) FN ;
+ - tiny_user_project_44 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 101920 1317120 ) FN ;
+ - tiny_user_project_45 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 909440 ) FN ;
+ - tiny_user_project_46 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 296800 31360 ) FN ;
+ - tiny_user_project_47 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1156960 31360 ) FN ;
+ - tiny_user_project_48 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 360640 1317120 ) N ;
+ - tiny_user_project_49 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1230880 ) S ;
+ - tiny_user_project_5 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1153600 1317120 ) FN ;
+ - tiny_user_project_50 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 164640 ) FS ;
+ - tiny_user_project_51 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1215200 ) S ;
+ - tiny_user_project_52 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 956480 ) N ;
+ - tiny_user_project_53 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 397600 1317120 ) FN ;
+ - tiny_user_project_54 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 384160 ) FS ;
+ - tiny_user_project_55 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 894880 1317120 ) FN ;
+ - tiny_user_project_56 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 972160 ) N ;
+ - tiny_user_project_57 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 493920 ) S ;
+ - tiny_user_project_58 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 957600 1317120 ) FN ;
+ - tiny_user_project_59 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 343840 31360 ) FN ;
+ - tiny_user_project_6 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 78400 ) FN ;
+ - tiny_user_project_60 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1114400 31360 ) FN ;
+ - tiny_user_project_61 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 172480 ) N ;
+ - tiny_user_project_62 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 134400 1317120 ) FN ;
+ - tiny_user_project_63 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 81760 31360 ) FN ;
+ - tiny_user_project_64 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 533120 ) N ;
+ - tiny_user_project_65 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 511840 1317120 ) FN ;
+ - tiny_user_project_66 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 592480 31360 ) FN ;
+ - tiny_user_project_67 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 458080 1317120 ) FN ;
+ - tiny_user_project_68 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 227360 ) S ;
+ - tiny_user_project_69 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 729120 ) S ;
+ - tiny_user_project_7 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 689920 ) N ;
+ - tiny_user_project_70 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 935200 31360 ) FN ;
+ - tiny_user_project_71 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 330400 31360 ) FN ;
+ - tiny_user_project_72 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 310240 1317120 ) FN ;
+ - tiny_user_project_73 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 827680 31360 ) FN ;
+ - tiny_user_project_74 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1177120 1317120 ) FN ;
+ - tiny_user_project_75 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 1277920 ) S ;
+ - tiny_user_project_76 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 948640 ) S ;
+ - tiny_user_project_77 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 517440 31360 ) FN ;
+ - tiny_user_project_78 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 1152480 ) FS ;
+ - tiny_user_project_79 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 148960 31360 ) FN ;
+ - tiny_user_project_8 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 768320 ) N ;
+ - tiny_user_project_80 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1171520 39200 ) FS ;
+ - tiny_user_project_81 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 202720 1317120 ) FN ;
+ - tiny_user_project_82 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 203840 ) N ;
+ - tiny_user_project_83 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 846720 ) FN ;
+ - tiny_user_project_84 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 360640 ) N ;
- tiny_user_project_85 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1123360 31360 ) FN ;
- tiny_user_project_86 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1178240 117600 ) FS ;
- tiny_user_project_87 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 538720 31360 ) FN ;
- tiny_user_project_88 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 431200 31360 ) FN ;
- tiny_user_project_89 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 820960 1317120 ) FN ;
- - tiny_user_project_9 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 925120 ) FN ;
+ - tiny_user_project_9 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 16800 47040 ) FN ;
- tiny_user_project_90 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 879200 31360 ) FN ;
- tiny_user_project_91 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 1089760 1317120 ) FN ;
- tiny_user_project_92 gf180mcu_fd_sc_mcu7t5v0__tiel + SOURCE TIMING + PLACED ( 451360 31360 ) FN ;
@@ -11240,67 +11265,67 @@
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 1324400 ) N ;
- - io_out[0] + NET net61 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[0] + NET net62 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 128240 1355000 ) N ;
- - io_out[10] + NET net71 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[10] + NET net72 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 309680 1355000 ) N ;
- - io_out[11] + NET net72 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[11] + NET net73 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 827120 5000 ) N ;
- - io_out[12] + NET net73 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[12] + NET net74 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 1176560 1355000 ) N ;
- - io_out[13] + NET net74 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[13] + NET net75 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 1277360 ) N ;
- - io_out[14] + NET net75 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[14] + NET net76 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 948080 ) N ;
- - io_out[15] + NET net76 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[15] + NET net77 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 518000 5000 ) N ;
- - io_out[16] + NET net77 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[16] + NET net78 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 1149680 ) N ;
- - io_out[17] + NET net78 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[17] + NET net79 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 148400 5000 ) N ;
- - io_out[18] + NET net79 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[18] + NET net80 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 1196720 5000 ) N ;
- - io_out[19] + NET net80 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[19] + NET net81 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 202160 1355000 ) N ;
- - io_out[1] + NET net62 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[1] + NET net63 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 81200 5000 ) N ;
- - io_out[20] + NET net81 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[20] + NET net82 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 202160 ) N ;
- - io_out[21] + NET net82 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[21] + NET net83 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 847280 ) N ;
- - io_out[22] + NET net83 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[22] + NET net84 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 363440 ) N ;
- - io_out[23] + NET net84 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[23] + NET io_out[23] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 477680 ) N ;
@@ -11328,7 +11353,7 @@
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 874160 5000 ) N ;
- - io_out[2] + NET net63 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[2] + NET net64 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 531440 ) N ;
@@ -11364,31 +11389,31 @@
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 61040 ) N ;
- - io_out[3] + NET net64 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[3] + NET net65 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 511280 1355000 ) N ;
- - io_out[4] + NET net65 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[4] + NET net66 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 591920 5000 ) N ;
- - io_out[5] + NET net66 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[5] + NET net67 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 457520 1355000 ) N ;
- - io_out[6] + NET net67 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[6] + NET net68 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 229040 ) N ;
- - io_out[7] + NET net68 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[7] + NET net69 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 726320 ) N ;
- - io_out[8] + NET net69 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[8] + NET net70 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 934640 5000 ) N ;
- - io_out[9] + NET net70 + DIRECTION OUTPUT + USE SIGNAL
+ - io_out[9] + NET net71 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 329840 5000 ) N ;
@@ -11652,43 +11677,43 @@
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 1028720 1355000 ) N ;
- - la_data_out[10] + NET net7 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[10] + NET net8 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 766640 ) N ;
- - la_data_out[11] + NET net8 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[11] + NET net9 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 47600 ) N ;
- - la_data_out[12] + NET net9 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[12] + NET net10 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 921200 ) N ;
- - la_data_out[13] + NET net10 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[13] + NET net11 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 477680 5000 ) N ;
- - la_data_out[14] + NET net11 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[14] + NET net12 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 605360 ) N ;
- - la_data_out[15] + NET net12 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[15] + NET net13 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 1095920 ) N ;
- - la_data_out[16] + NET net13 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[16] + NET net14 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 793520 ) N ;
- - la_data_out[17] + NET net14 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[17] + NET net15 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 544880 1355000 ) N ;
- - la_data_out[18] + NET net15 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[18] + NET net16 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 1136240 ) N ;
- - la_data_out[19] + NET net16 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[19] + NET net17 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 679280 5000 ) N ;
@@ -11696,43 +11721,43 @@
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 679280 ) N ;
- - la_data_out[20] + NET net17 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[20] + NET net18 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 262640 ) N ;
- - la_data_out[21] + NET net18 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[21] + NET net19 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 1270640 ) N ;
- - la_data_out[22] + NET net19 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[22] + NET net20 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 880880 ) N ;
- - la_data_out[23] + NET net20 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[23] + NET net21 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 376880 5000 ) N ;
- - la_data_out[24] + NET net21 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[24] + NET net22 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 578480 ) N ;
- - la_data_out[25] + NET net22 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[25] + NET net23 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 686000 5000 ) N ;
- - la_data_out[26] + NET net23 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[26] + NET net24 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 1243760 ) N ;
- - la_data_out[27] + NET net24 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[27] + NET net25 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 692720 1355000 ) N ;
- - la_data_out[28] + NET net25 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[28] + NET net26 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 1102640 ) N ;
- - la_data_out[29] + NET net26 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[29] + NET net27 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 551600 5000 ) N ;
@@ -11740,43 +11765,43 @@
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 296240 ) N ;
- - la_data_out[30] + NET net27 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[30] + NET net28 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 672560 ) N ;
- - la_data_out[31] + NET net28 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[31] + NET net29 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 141680 ) N ;
- - la_data_out[32] + NET net29 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[32] + NET net30 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 672560 1355000 ) N ;
- - la_data_out[33] + NET net30 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[33] + NET net31 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 309680 ) N ;
- - la_data_out[34] + NET net31 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[34] + NET net32 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 625520 5000 ) N ;
- - la_data_out[35] + NET net32 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[35] + NET net33 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 605360 1355000 ) N ;
- - la_data_out[36] + NET net33 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[36] + NET net34 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 1116080 ) N ;
- - la_data_out[37] + NET net34 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[37] + NET net35 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 585200 ) N ;
- - la_data_out[38] + NET net35 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[38] + NET net36 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 101360 ) N ;
- - la_data_out[39] + NET net36 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[39] + NET net37 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 249200 ) N ;
@@ -11784,123 +11809,123 @@
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 208880 ) N ;
- - la_data_out[40] + NET net37 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[40] + NET net38 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 40880 ) N ;
- - la_data_out[41] + NET net38 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[41] + NET net39 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 470960 ) N ;
- - la_data_out[42] + NET net39 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[42] + NET net40 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 1163120 ) N ;
- - la_data_out[43] + NET net40 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[43] + NET net41 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 74480 5000 ) N ;
- - la_data_out[44] + NET net41 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[44] + NET net42 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 524720 5000 ) N ;
- - la_data_out[45] + NET net42 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[45] + NET net43 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 114800 1355000 ) N ;
- - la_data_out[46] + NET net43 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[46] + NET net44 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 101360 1355000 ) N ;
- - la_data_out[47] + NET net44 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[47] + NET net45 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 907760 ) N ;
- - la_data_out[48] + NET net45 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[48] + NET net46 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 296240 5000 ) N ;
- - la_data_out[49] + NET net46 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[49] + NET net47 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 1156400 5000 ) N ;
- - la_data_out[4] + NET net1 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[4] + NET net177 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 645680 1355000 ) N ;
- - la_data_out[50] + NET net47 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[50] + NET net48 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 363440 1355000 ) N ;
- - la_data_out[51] + NET net48 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[51] + NET net49 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 1230320 ) N ;
- - la_data_out[52] + NET net49 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[52] + NET net50 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 161840 ) N ;
- - la_data_out[53] + NET net50 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[53] + NET net51 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 1216880 ) N ;
- - la_data_out[54] + NET net51 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[54] + NET net52 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 954800 ) N ;
- - la_data_out[55] + NET net52 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[55] + NET net53 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 397040 1355000 ) N ;
- - la_data_out[56] + NET net53 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[56] + NET net54 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 383600 ) N ;
- - la_data_out[57] + NET net54 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[57] + NET net55 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 894320 1355000 ) N ;
- - la_data_out[58] + NET net55 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[58] + NET net56 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 968240 ) N ;
- - la_data_out[59] + NET net56 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[59] + NET net57 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 491120 ) N ;
- - la_data_out[5] + NET net2 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[5] + NET net178 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 840560 ) N ;
- - la_data_out[60] + NET net57 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[60] + NET net58 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 954800 1355000 ) N ;
- - la_data_out[61] + NET net58 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[61] + NET net59 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 343280 5000 ) N ;
- - la_data_out[62] + NET net59 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[62] + NET net60 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 1109360 5000 ) N ;
- - la_data_out[63] + NET net60 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[63] + NET net61 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 175280 ) N ;
- - la_data_out[6] + NET net3 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[6] + NET net4 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 450800 ) N ;
- - la_data_out[7] + NET net4 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[7] + NET net5 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal2 ( -560 -3000 ) ( 560 3000 )
+ PLACED ( 1149680 1355000 ) N ;
- - la_data_out[8] + NET net5 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[8] + NET net6 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 5000 74480 ) N ;
- - la_data_out[9] + NET net6 + DIRECTION OUTPUT + USE SIGNAL
+ - la_data_out[9] + NET net7 + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal3 ( -3000 -560 ) ( 3000 560 )
+ PLACED ( 1195000 692720 ) N ;
@@ -14785,12 +14810,30 @@
NEW Metal2 0 + SHAPE STRIPE ( 199680 31360 ) via2_3_3200_1200_1_3_1040_1040
NEW Metal1 0 + SHAPE STRIPE ( 199680 31360 ) via1_2_3200_1200_1_3_1040_1040 ;
END SPECIALNETS
-NETS 416 ;
+NETS 420 ;
+ - _000_ ( _002_ I ) ( _001_ ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 25200 514640 ) ( * 523600 )
+ NEW Metal1 ( 25200 514640 ) Via1_VV
+ NEW Metal1 ( 25200 523600 ) Via1_HV ;
- io_in[0] ( PIN io_in[0] ) + USE SIGNAL ;
- io_in[10] ( PIN io_in[10] ) + USE SIGNAL ;
- io_in[11] ( PIN io_in[11] ) + USE SIGNAL ;
- - io_in[12] ( PIN io_in[12] ) + USE SIGNAL ;
- - io_in[13] ( PIN io_in[13] ) + USE SIGNAL ;
+ - io_in[12] ( PIN io_in[12] ) ( ANTENNA_input1_I I ) ( input1 I ) + USE SIGNAL
+ + ROUTED Metal2 ( 18480 773360 ) ( 19600 * )
+ NEW Metal2 ( 19600 773360 ) ( * 781200 )
+ NEW Metal3 ( 7280 773360 0 ) ( 18480 * )
+ NEW Metal1 ( 18480 773360 ) Via1_VV
+ NEW Metal1 ( 19600 781200 ) Via1_HV
+ NEW Metal2 ( 18480 773360 ) Via2_VH
+ NEW Metal2 ( 18480 773360 ) RECT ( -280 -1040 280 0 ) ;
+ - io_in[13] ( PIN io_in[13] ) ( ANTENNA_input2_I I ) ( input2 I ) + USE SIGNAL
+ + ROUTED Metal2 ( 19600 524720 ) ( * 530320 )
+ NEW Metal3 ( 7280 524720 0 ) ( 19600 * )
+ NEW Metal2 ( 18480 534800 ) ( 19600 * )
+ NEW Metal2 ( 19600 530320 ) ( * 534800 )
+ NEW Metal1 ( 19600 530320 ) Via1_HV
+ NEW Metal2 ( 19600 524720 ) Via2_VH
+ NEW Metal1 ( 18480 534800 ) Via1_VV ;
- io_in[14] ( PIN io_in[14] ) + USE SIGNAL ;
- io_in[15] ( PIN io_in[15] ) + USE SIGNAL ;
- io_in[16] ( PIN io_in[16] ) + USE SIGNAL ;
@@ -14824,6 +14867,11 @@
- io_in[7] ( PIN io_in[7] ) + USE SIGNAL ;
- io_in[8] ( PIN io_in[8] ) + USE SIGNAL ;
- io_in[9] ( PIN io_in[9] ) + USE SIGNAL ;
+ - io_out[23] ( PIN io_out[23] ) ( output3 Z ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 477680 0 ) ( 19600 * )
+ NEW Metal2 ( 19600 477680 ) ( * 481040 )
+ NEW Metal2 ( 19600 477680 ) Via2_VH
+ NEW Metal1 ( 19600 481040 ) Via1_HV ;
- la_data_in[0] ( PIN la_data_in[0] ) + USE SIGNAL ;
- la_data_in[10] ( PIN la_data_in[10] ) + USE SIGNAL ;
- la_data_in[11] ( PIN la_data_in[11] ) + USE SIGNAL ;
@@ -14952,14 +15000,24 @@
- la_oenb[7] ( PIN la_oenb[7] ) + USE SIGNAL ;
- la_oenb[8] ( PIN la_oenb[8] ) + USE SIGNAL ;
- la_oenb[9] ( PIN la_oenb[9] ) + USE SIGNAL ;
- - net1 ( PIN la_data_out[4] ) ( tiny_user_project_1 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 645680 1319920 ) ( 647920 * )
- NEW Metal2 ( 645680 1319920 ) ( * 1352400 0 )
- NEW Metal1 ( 647920 1319920 ) Via1_VV ;
- - net10 ( PIN la_data_out[13] ) ( tiny_user_project_10 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 477680 7280 0 ) ( * 33040 )
- NEW Metal2 ( 477680 33040 ) ( 479920 * )
- NEW Metal1 ( 479920 33040 ) Via1_VV ;
+ - net1 ( ANTENNA__001__A1 I ) ( input1 Z ) ( _001_ A1 ) + USE SIGNAL
+ + ROUTED Metal3 ( 29680 521360 ) ( 36400 * )
+ NEW Metal2 ( 36400 521360 ) ( * 522480 )
+ NEW Metal2 ( 33040 778960 ) ( 34160 * )
+ NEW Metal2 ( 34160 672000 ) ( * 778960 )
+ NEW Metal2 ( 34160 672000 ) ( 36400 * )
+ NEW Metal2 ( 36400 522480 ) ( * 672000 )
+ NEW Metal1 ( 36400 522480 ) Via1_VV
+ NEW Metal1 ( 29680 521360 ) Via1_HV
+ NEW Metal2 ( 29680 521360 ) Via2_VH
+ NEW Metal2 ( 36400 521360 ) Via2_VH
+ NEW Metal1 ( 33040 778960 ) Via1_HV
+ NEW Metal2 ( 29680 521360 ) RECT ( -280 -660 280 0 ) ;
+ - net10 ( PIN la_data_out[12] ) ( tiny_user_project_10 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 921200 0 ) ( 18480 * )
+ NEW Metal2 ( 18480 921200 ) ( * 926800 )
+ NEW Metal2 ( 18480 921200 ) Via2_VH
+ NEW Metal1 ( 18480 926800 ) Via1_VV ;
- net100 ( PIN io_oeb[1] ) ( tiny_user_project_100 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 262640 1319920 ) ( 264880 * )
NEW Metal2 ( 262640 1319920 ) ( * 1352400 0 )
@@ -15007,11 +15065,10 @@
NEW Metal3 ( 1181040 907760 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 911120 ) Via1_VV
NEW Metal2 ( 1181040 907760 ) Via2_VH ;
- - net11 ( PIN la_data_out[14] ) ( tiny_user_project_11 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 1181040 605360 ) ( * 608720 )
- NEW Metal3 ( 1181040 605360 ) ( 1193360 * 0 )
- NEW Metal1 ( 1181040 608720 ) Via1_VV
- NEW Metal2 ( 1181040 605360 ) Via2_VH ;
+ - net11 ( PIN la_data_out[13] ) ( tiny_user_project_11 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 477680 7280 0 ) ( * 33040 )
+ NEW Metal2 ( 477680 33040 ) ( 479920 * )
+ NEW Metal1 ( 479920 33040 ) Via1_VV ;
- net110 ( PIN io_oeb[11] ) ( tiny_user_project_110 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 18480 1319920 ) ( * 1331120 )
NEW Metal3 ( 7280 1331120 0 ) ( 18480 * )
@@ -15058,11 +15115,11 @@
NEW Metal2 ( 658000 1336720 ) ( 659120 * )
NEW Metal2 ( 659120 1336720 ) ( * 1352400 0 )
NEW Metal1 ( 661360 1319920 ) Via1_VV ;
- - net12 ( PIN la_data_out[15] ) ( tiny_user_project_12 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 1095920 0 ) ( 18480 * )
- NEW Metal2 ( 18480 1095920 ) ( * 1099280 )
- NEW Metal2 ( 18480 1095920 ) Via2_VH
- NEW Metal1 ( 18480 1099280 ) Via1_VV ;
+ - net12 ( PIN la_data_out[14] ) ( tiny_user_project_12 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 1181040 605360 ) ( * 608720 )
+ NEW Metal3 ( 1181040 605360 ) ( 1193360 * 0 )
+ NEW Metal1 ( 1181040 608720 ) Via1_VV
+ NEW Metal2 ( 1181040 605360 ) Via2_VH ;
- net120 ( PIN io_oeb[21] ) ( tiny_user_project_120 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1095920 7280 0 ) ( * 33040 )
NEW Metal2 ( 1095920 33040 ) ( 1098160 * )
@@ -15113,11 +15170,11 @@
NEW Metal3 ( 1181040 560 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 33040 ) Via1_VV
NEW Metal2 ( 1181040 560 ) Via2_VH ;
- - net13 ( PIN la_data_out[16] ) ( tiny_user_project_13 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 1181040 793520 ) ( * 796880 )
- NEW Metal3 ( 1181040 793520 ) ( 1193360 * 0 )
- NEW Metal1 ( 1181040 796880 ) Via1_VV
- NEW Metal2 ( 1181040 793520 ) Via2_VH ;
+ - net13 ( PIN la_data_out[15] ) ( tiny_user_project_13 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 1095920 0 ) ( 18480 * )
+ NEW Metal2 ( 18480 1095920 ) ( * 1099280 )
+ NEW Metal2 ( 18480 1095920 ) Via2_VH
+ NEW Metal1 ( 18480 1099280 ) Via1_VV ;
- net130 ( PIN io_oeb[31] ) ( tiny_user_project_130 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 390320 0 ) ( 18480 * )
NEW Metal2 ( 18480 390320 ) ( * 393680 )
@@ -15165,10 +15222,11 @@
NEW Metal2 ( 18480 827120 ) ( * 832720 )
NEW Metal2 ( 18480 827120 ) Via2_VH
NEW Metal1 ( 18480 832720 ) Via1_VV ;
- - net14 ( PIN la_data_out[17] ) ( tiny_user_project_14 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 544880 1319920 ) ( 547120 * )
- NEW Metal2 ( 544880 1319920 ) ( * 1352400 0 )
- NEW Metal1 ( 547120 1319920 ) Via1_VV ;
+ - net14 ( PIN la_data_out[16] ) ( tiny_user_project_14 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 1181040 793520 ) ( * 796880 )
+ NEW Metal3 ( 1181040 793520 ) ( 1193360 * 0 )
+ NEW Metal1 ( 1181040 796880 ) Via1_VV
+ NEW Metal2 ( 1181040 793520 ) Via2_VH ;
- net140 ( PIN wbs_ack_o ) ( tiny_user_project_140 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 524720 ) ( * 530320 )
NEW Metal3 ( 1181040 524720 ) ( 1193360 * 0 )
@@ -15217,11 +15275,10 @@
NEW Metal2 ( 763280 1319920 ) Via2_VH
NEW Metal2 ( 753200 1319920 ) Via2_VH
NEW Metal2 ( 763280 1319920 ) RECT ( -280 -660 280 0 ) ;
- - net15 ( PIN la_data_out[18] ) ( tiny_user_project_15 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 1181040 1136240 ) ( 1193360 * 0 )
- NEW Metal2 ( 1181040 1136240 ) ( * 1142960 )
- NEW Metal1 ( 1181040 1142960 ) Via1_VV
- NEW Metal2 ( 1181040 1136240 ) Via2_VH ;
+ - net15 ( PIN la_data_out[17] ) ( tiny_user_project_15 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 544880 1319920 ) ( 547120 * )
+ NEW Metal2 ( 544880 1319920 ) ( * 1352400 0 )
+ NEW Metal1 ( 547120 1319920 ) Via1_VV ;
- net150 ( PIN wbs_dat_o[9] ) ( tiny_user_project_150 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 746480 1319920 ) ( 748720 * )
NEW Metal2 ( 746480 1319920 ) ( * 1352400 0 )
@@ -15267,13 +15324,11 @@
+ ROUTED Metal2 ( 860720 7280 0 ) ( * 33040 )
NEW Metal2 ( 860720 33040 ) ( 862960 * )
NEW Metal1 ( 862960 33040 ) Via1_VV ;
- - net16 ( PIN la_data_out[19] ) ( tiny_user_project_16 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 679280 7280 0 ) ( * 17360 )
- NEW Metal1 ( 679280 17360 ) ( 684880 * )
- NEW Metal2 ( 684880 17360 ) ( * 33040 )
- NEW Metal1 ( 679280 17360 ) Via1_HV
- NEW Metal1 ( 684880 17360 ) Via1_HV
- NEW Metal1 ( 684880 33040 ) Via1_VV ;
+ - net16 ( PIN la_data_out[18] ) ( tiny_user_project_16 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 1181040 1136240 ) ( 1193360 * 0 )
+ NEW Metal2 ( 1181040 1136240 ) ( * 1142960 )
+ NEW Metal1 ( 1181040 1142960 ) Via1_VV
+ NEW Metal2 ( 1181040 1136240 ) Via2_VH ;
- net160 ( PIN wbs_dat_o[19] ) ( tiny_user_project_160 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 560 7280 0 ) ( * 44240 )
NEW Metal3 ( 560 44240 ) ( 18480 * )
@@ -15320,11 +15375,13 @@
+ ROUTED Metal2 ( 699440 7280 0 ) ( * 33040 )
NEW Metal2 ( 699440 33040 ) ( 701680 * )
NEW Metal1 ( 701680 33040 ) Via1_VV ;
- - net17 ( PIN la_data_out[20] ) ( tiny_user_project_17 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 1181040 262640 ) ( * 268240 )
- NEW Metal3 ( 1181040 262640 ) ( 1193360 * 0 )
- NEW Metal1 ( 1181040 268240 ) Via1_VV
- NEW Metal2 ( 1181040 262640 ) Via2_VH ;
+ - net17 ( PIN la_data_out[19] ) ( tiny_user_project_17 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 679280 7280 0 ) ( * 17360 )
+ NEW Metal1 ( 679280 17360 ) ( 684880 * )
+ NEW Metal2 ( 684880 17360 ) ( * 33040 )
+ NEW Metal1 ( 679280 17360 ) Via1_HV
+ NEW Metal1 ( 684880 17360 ) Via1_HV
+ NEW Metal1 ( 684880 33040 ) Via1_VV ;
- net170 ( PIN wbs_dat_o[29] ) ( tiny_user_project_170 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 806960 1319920 ) ( 809200 * )
NEW Metal2 ( 806960 1319920 ) ( * 1352400 0 )
@@ -15361,238 +15418,249 @@
NEW Metal2 ( 18480 208880 ) ( * 216720 )
NEW Metal2 ( 18480 208880 ) Via2_VH
NEW Metal1 ( 18480 216720 ) Via1_VV ;
- - net18 ( PIN la_data_out[21] ) ( tiny_user_project_18 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 1270640 0 ) ( 18480 * )
- NEW Metal2 ( 18480 1270640 ) ( * 1271760 )
- NEW Metal2 ( 18480 1270640 ) Via2_VH
- NEW Metal1 ( 18480 1271760 ) Via1_VV ;
- - net19 ( PIN la_data_out[22] ) ( tiny_user_project_19 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 1181040 880880 ) ( 1193360 * 0 )
- NEW Metal1 ( 1181040 880880 ) Via1_VV
- NEW Metal2 ( 1181040 880880 ) Via2_VH
- NEW Metal2 ( 1181040 880880 ) RECT ( -280 -660 280 0 ) ;
- - net2 ( PIN la_data_out[5] ) ( tiny_user_project_2 ZN ) + USE SIGNAL
+ - net177 ( PIN la_data_out[4] ) ( tiny_user_project_177 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 645680 1319920 ) ( 647920 * )
+ NEW Metal2 ( 645680 1319920 ) ( * 1352400 0 )
+ NEW Metal1 ( 647920 1319920 ) Via1_VV ;
+ - net178 ( PIN la_data_out[5] ) ( tiny_user_project_178 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 840560 ) ( * 843920 )
NEW Metal3 ( 1181040 840560 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 843920 ) Via1_VV
NEW Metal2 ( 1181040 840560 ) Via2_VH ;
- - net20 ( PIN la_data_out[23] ) ( tiny_user_project_20 ZN ) + USE SIGNAL
+ - net18 ( PIN la_data_out[20] ) ( tiny_user_project_18 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 1181040 262640 ) ( * 268240 )
+ NEW Metal3 ( 1181040 262640 ) ( 1193360 * 0 )
+ NEW Metal1 ( 1181040 268240 ) Via1_VV
+ NEW Metal2 ( 1181040 262640 ) Via2_VH ;
+ - net19 ( PIN la_data_out[21] ) ( tiny_user_project_19 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 1270640 0 ) ( 18480 * )
+ NEW Metal2 ( 18480 1270640 ) ( * 1271760 )
+ NEW Metal2 ( 18480 1270640 ) Via2_VH
+ NEW Metal1 ( 18480 1271760 ) Via1_VV ;
+ - net2 ( input2 Z ) ( _001_ A2 ) + USE SIGNAL
+ + ROUTED Metal2 ( 28560 522480 ) ( * 528080 )
+ NEW Metal2 ( 28560 528080 ) ( 30800 * )
+ NEW Metal1 ( 28560 522480 ) Via1_HV
+ NEW Metal1 ( 30800 528080 ) Via1_HV ;
+ - net20 ( PIN la_data_out[22] ) ( tiny_user_project_20 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 1181040 880880 ) ( 1193360 * 0 )
+ NEW Metal1 ( 1181040 880880 ) Via1_VV
+ NEW Metal2 ( 1181040 880880 ) Via2_VH
+ NEW Metal2 ( 1181040 880880 ) RECT ( -280 -660 280 0 ) ;
+ - net21 ( PIN la_data_out[23] ) ( tiny_user_project_21 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 376880 7280 0 ) ( * 33040 )
NEW Metal2 ( 376880 33040 ) ( 379120 * )
NEW Metal1 ( 379120 33040 ) Via1_VV ;
- - net21 ( PIN la_data_out[24] ) ( tiny_user_project_21 ZN ) + USE SIGNAL
+ - net22 ( PIN la_data_out[24] ) ( tiny_user_project_22 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 578480 0 ) ( 18480 * )
NEW Metal2 ( 18480 578480 ) ( * 581840 )
NEW Metal2 ( 18480 578480 ) Via2_VH
NEW Metal1 ( 18480 581840 ) Via1_VV ;
- - net22 ( PIN la_data_out[25] ) ( tiny_user_project_22 ZN ) + USE SIGNAL
+ - net23 ( PIN la_data_out[25] ) ( tiny_user_project_23 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 686000 7280 0 ) ( * 33040 )
NEW Metal3 ( 686000 33040 ) ( 691600 * )
NEW Metal2 ( 686000 33040 ) Via2_VH
NEW Metal1 ( 691600 33040 ) Via1_VV
NEW Metal2 ( 691600 33040 ) Via2_VH
NEW Metal2 ( 691600 33040 ) RECT ( -280 -660 280 0 ) ;
- - net23 ( PIN la_data_out[26] ) ( tiny_user_project_23 ZN ) + USE SIGNAL
+ - net24 ( PIN la_data_out[26] ) ( tiny_user_project_24 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 1243760 0 ) ( 18480 * )
NEW Metal2 ( 18480 1243760 ) ( * 1251600 )
NEW Metal2 ( 18480 1243760 ) Via2_VH
NEW Metal1 ( 18480 1251600 ) Via1_VV ;
- - net24 ( PIN la_data_out[27] ) ( tiny_user_project_24 ZN ) + USE SIGNAL
+ - net25 ( PIN la_data_out[27] ) ( tiny_user_project_25 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 692720 1319920 ) ( 694960 * )
NEW Metal2 ( 692720 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 694960 1319920 ) Via1_VV ;
- - net25 ( PIN la_data_out[28] ) ( tiny_user_project_25 ZN ) + USE SIGNAL
+ - net26 ( PIN la_data_out[28] ) ( tiny_user_project_26 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 1102640 ) ( * 1110480 )
NEW Metal3 ( 1181040 1102640 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 1110480 ) Via1_VV
NEW Metal2 ( 1181040 1102640 ) Via2_VH ;
- - net26 ( PIN la_data_out[29] ) ( tiny_user_project_26 ZN ) + USE SIGNAL
+ - net27 ( PIN la_data_out[29] ) ( tiny_user_project_27 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 551600 7280 0 ) ( * 33040 )
NEW Metal2 ( 551600 33040 ) ( 553840 * )
NEW Metal1 ( 553840 33040 ) Via1_VV ;
- - net27 ( PIN la_data_out[30] ) ( tiny_user_project_27 ZN ) + USE SIGNAL
+ - net28 ( PIN la_data_out[30] ) ( tiny_user_project_28 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 672560 ) ( * 675920 )
NEW Metal3 ( 1181040 672560 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 675920 ) Via1_VV
NEW Metal2 ( 1181040 672560 ) Via2_VH ;
- - net28 ( PIN la_data_out[31] ) ( tiny_user_project_28 ZN ) + USE SIGNAL
+ - net29 ( PIN la_data_out[31] ) ( tiny_user_project_29 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 141680 ) ( * 142800 )
NEW Metal3 ( 1181040 141680 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 142800 ) Via1_VV
NEW Metal2 ( 1181040 141680 ) Via2_VH ;
- - net29 ( PIN la_data_out[32] ) ( tiny_user_project_29 ZN ) + USE SIGNAL
+ - net3 ( output3 I ) ( _002_ Z ) + USE SIGNAL
+ + ROUTED Metal2 ( 28560 482160 ) ( * 514640 )
+ NEW Metal1 ( 28560 514640 ) Via1_VV
+ NEW Metal1 ( 28560 482160 ) Via1_HV ;
+ - net30 ( PIN la_data_out[32] ) ( tiny_user_project_30 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 672560 1319920 ) ( 674800 * )
NEW Metal2 ( 672560 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 674800 1319920 ) Via1_VV ;
- - net3 ( PIN la_data_out[6] ) ( tiny_user_project_3 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 1181040 450800 ) ( * 456400 )
- NEW Metal3 ( 1181040 450800 ) ( 1193360 * 0 )
- NEW Metal1 ( 1181040 456400 ) Via1_VV
- NEW Metal2 ( 1181040 450800 ) Via2_VH ;
- - net30 ( PIN la_data_out[33] ) ( tiny_user_project_30 ZN ) + USE SIGNAL
+ - net31 ( PIN la_data_out[33] ) ( tiny_user_project_31 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 309680 ) ( * 315280 )
NEW Metal3 ( 1181040 309680 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 315280 ) Via1_VV
NEW Metal2 ( 1181040 309680 ) Via2_VH ;
- - net31 ( PIN la_data_out[34] ) ( tiny_user_project_31 ZN ) + USE SIGNAL
+ - net32 ( PIN la_data_out[34] ) ( tiny_user_project_32 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 625520 7280 0 ) ( * 33040 )
NEW Metal2 ( 625520 33040 ) ( 627760 * )
NEW Metal1 ( 627760 33040 ) Via1_VV ;
- - net32 ( PIN la_data_out[35] ) ( tiny_user_project_32 ZN ) + USE SIGNAL
+ - net33 ( PIN la_data_out[35] ) ( tiny_user_project_33 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 605360 1319920 ) ( 607600 * )
NEW Metal2 ( 605360 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 607600 1319920 ) Via1_VV ;
- - net33 ( PIN la_data_out[36] ) ( tiny_user_project_33 ZN ) + USE SIGNAL
+ - net34 ( PIN la_data_out[36] ) ( tiny_user_project_34 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 1181040 1116080 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 1116080 ) Via1_VV
NEW Metal2 ( 1181040 1116080 ) Via2_VH
NEW Metal2 ( 1181040 1116080 ) RECT ( -280 -660 280 0 ) ;
- - net34 ( PIN la_data_out[37] ) ( tiny_user_project_34 ZN ) + USE SIGNAL
+ - net35 ( PIN la_data_out[37] ) ( tiny_user_project_35 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 585200 ) ( * 593040 )
NEW Metal3 ( 1181040 585200 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 593040 ) Via1_VV
NEW Metal2 ( 1181040 585200 ) Via2_VH ;
- - net35 ( PIN la_data_out[38] ) ( tiny_user_project_35 ZN ) + USE SIGNAL
+ - net36 ( PIN la_data_out[38] ) ( tiny_user_project_36 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 101360 ) ( * 106960 )
NEW Metal3 ( 1181040 101360 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 106960 ) Via1_VV
NEW Metal2 ( 1181040 101360 ) Via2_VH ;
- - net36 ( PIN la_data_out[39] ) ( tiny_user_project_36 ZN ) + USE SIGNAL
+ - net37 ( PIN la_data_out[39] ) ( tiny_user_project_37 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 249200 ) ( * 252560 )
NEW Metal3 ( 1181040 249200 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 252560 ) Via1_VV
NEW Metal2 ( 1181040 249200 ) Via2_VH ;
- - net37 ( PIN la_data_out[40] ) ( tiny_user_project_37 ZN ) + USE SIGNAL
+ - net38 ( PIN la_data_out[40] ) ( tiny_user_project_38 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 40880 ) ( * 44240 )
NEW Metal3 ( 1181040 40880 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 44240 ) Via1_VV
NEW Metal2 ( 1181040 40880 ) Via2_VH ;
- - net38 ( PIN la_data_out[41] ) ( tiny_user_project_38 ZN ) + USE SIGNAL
+ - net39 ( PIN la_data_out[41] ) ( tiny_user_project_39 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 470960 ) ( * 472080 )
NEW Metal3 ( 1181040 470960 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 472080 ) Via1_VV
NEW Metal2 ( 1181040 470960 ) Via2_VH ;
- - net39 ( PIN la_data_out[42] ) ( tiny_user_project_39 ZN ) + USE SIGNAL
+ - net4 ( PIN la_data_out[6] ) ( tiny_user_project_4 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 1181040 450800 ) ( * 456400 )
+ NEW Metal3 ( 1181040 450800 ) ( 1193360 * 0 )
+ NEW Metal1 ( 1181040 456400 ) Via1_VV
+ NEW Metal2 ( 1181040 450800 ) Via2_VH ;
+ - net40 ( PIN la_data_out[42] ) ( tiny_user_project_40 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 1181040 1163120 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 1163120 ) Via1_VV
NEW Metal2 ( 1181040 1163120 ) Via2_VH
NEW Metal2 ( 1181040 1163120 ) RECT ( -280 -660 280 0 ) ;
- - net4 ( PIN la_data_out[7] ) ( tiny_user_project_4 ZN ) + USE SIGNAL
+ - net41 ( PIN la_data_out[43] ) ( tiny_user_project_41 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 74480 7280 0 ) ( * 33040 )
+ NEW Metal2 ( 74480 33040 ) ( 76720 * )
+ NEW Metal1 ( 76720 33040 ) Via1_VV ;
+ - net42 ( PIN la_data_out[44] ) ( tiny_user_project_42 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 524720 7280 0 ) ( * 33040 )
+ NEW Metal2 ( 524720 33040 ) ( 528080 * )
+ NEW Metal1 ( 528080 33040 ) Via1_VV ;
+ - net43 ( PIN la_data_out[45] ) ( tiny_user_project_43 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 114800 1319920 ) ( 117040 * )
+ NEW Metal2 ( 114800 1319920 ) ( * 1352400 0 )
+ NEW Metal1 ( 117040 1319920 ) Via1_VV ;
+ - net44 ( PIN la_data_out[46] ) ( tiny_user_project_44 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 101360 1319920 ) ( 103600 * )
+ NEW Metal2 ( 101360 1319920 ) ( * 1352400 0 )
+ NEW Metal1 ( 103600 1319920 ) Via1_VV ;
+ - net45 ( PIN la_data_out[47] ) ( tiny_user_project_45 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 907760 0 ) ( 18480 * )
+ NEW Metal2 ( 18480 907760 ) ( * 911120 )
+ NEW Metal2 ( 18480 907760 ) Via2_VH
+ NEW Metal1 ( 18480 911120 ) Via1_VV ;
+ - net46 ( PIN la_data_out[48] ) ( tiny_user_project_46 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 296240 7280 0 ) ( * 33040 )
+ NEW Metal2 ( 296240 33040 ) ( 298480 * )
+ NEW Metal1 ( 298480 33040 ) Via1_VV ;
+ - net47 ( PIN la_data_out[49] ) ( tiny_user_project_47 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 1156400 7280 0 ) ( * 33040 )
+ NEW Metal2 ( 1156400 33040 ) ( 1158640 * )
+ NEW Metal1 ( 1158640 33040 ) Via1_VV ;
+ - net48 ( PIN la_data_out[50] ) ( tiny_user_project_48 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 363440 1319920 ) ( * 1352400 0 )
+ NEW Metal1 ( 363440 1319920 ) Via1_VV ;
+ - net49 ( PIN la_data_out[51] ) ( tiny_user_project_49 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 1230320 0 ) ( 18480 * )
+ NEW Metal2 ( 18480 1230320 ) ( * 1235920 )
+ NEW Metal2 ( 18480 1230320 ) Via2_VH
+ NEW Metal1 ( 18480 1235920 ) Via1_VV ;
+ - net5 ( PIN la_data_out[7] ) ( tiny_user_project_5 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1155280 1319920 ) ( * 1354640 )
NEW Metal2 ( 1151920 1354640 ) ( 1155280 * )
NEW Metal2 ( 1151920 1354640 ) ( * 1359120 )
NEW Metal2 ( 1149680 1359120 ) ( 1151920 * )
NEW Metal2 ( 1149680 1356880 0 ) ( * 1359120 )
NEW Metal1 ( 1155280 1319920 ) Via1_VV ;
- - net40 ( PIN la_data_out[43] ) ( tiny_user_project_40 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 74480 7280 0 ) ( * 33040 )
- NEW Metal2 ( 74480 33040 ) ( 76720 * )
- NEW Metal1 ( 76720 33040 ) Via1_VV ;
- - net41 ( PIN la_data_out[44] ) ( tiny_user_project_41 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 524720 7280 0 ) ( * 33040 )
- NEW Metal2 ( 524720 33040 ) ( 528080 * )
- NEW Metal1 ( 528080 33040 ) Via1_VV ;
- - net42 ( PIN la_data_out[45] ) ( tiny_user_project_42 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 114800 1319920 ) ( 117040 * )
- NEW Metal2 ( 114800 1319920 ) ( * 1352400 0 )
- NEW Metal1 ( 117040 1319920 ) Via1_VV ;
- - net43 ( PIN la_data_out[46] ) ( tiny_user_project_43 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 101360 1319920 ) ( 103600 * )
- NEW Metal2 ( 101360 1319920 ) ( * 1352400 0 )
- NEW Metal1 ( 103600 1319920 ) Via1_VV ;
- - net44 ( PIN la_data_out[47] ) ( tiny_user_project_44 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 907760 0 ) ( 18480 * )
- NEW Metal2 ( 18480 907760 ) ( * 911120 )
- NEW Metal2 ( 18480 907760 ) Via2_VH
- NEW Metal1 ( 18480 911120 ) Via1_VV ;
- - net45 ( PIN la_data_out[48] ) ( tiny_user_project_45 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 296240 7280 0 ) ( * 33040 )
- NEW Metal2 ( 296240 33040 ) ( 298480 * )
- NEW Metal1 ( 298480 33040 ) Via1_VV ;
- - net46 ( PIN la_data_out[49] ) ( tiny_user_project_46 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 1156400 7280 0 ) ( * 33040 )
- NEW Metal2 ( 1156400 33040 ) ( 1158640 * )
- NEW Metal1 ( 1158640 33040 ) Via1_VV ;
- - net47 ( PIN la_data_out[50] ) ( tiny_user_project_47 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 363440 1319920 ) ( * 1352400 0 )
- NEW Metal1 ( 363440 1319920 ) Via1_VV ;
- - net48 ( PIN la_data_out[51] ) ( tiny_user_project_48 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 1230320 0 ) ( 18480 * )
- NEW Metal2 ( 18480 1230320 ) ( * 1235920 )
- NEW Metal2 ( 18480 1230320 ) Via2_VH
- NEW Metal1 ( 18480 1235920 ) Via1_VV ;
- - net49 ( PIN la_data_out[52] ) ( tiny_user_project_49 ZN ) + USE SIGNAL
+ - net50 ( PIN la_data_out[52] ) ( tiny_user_project_50 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 161840 ) ( * 169680 )
NEW Metal3 ( 1181040 161840 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 169680 ) Via1_VV
NEW Metal2 ( 1181040 161840 ) Via2_VH ;
- - net5 ( PIN la_data_out[8] ) ( tiny_user_project_5 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 74480 0 ) ( 18480 * )
- NEW Metal2 ( 18480 74480 ) ( * 80080 )
- NEW Metal2 ( 18480 74480 ) Via2_VH
- NEW Metal1 ( 18480 80080 ) Via1_VV ;
- - net50 ( PIN la_data_out[53] ) ( tiny_user_project_50 ZN ) + USE SIGNAL
+ - net51 ( PIN la_data_out[53] ) ( tiny_user_project_51 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 1216880 0 ) ( 18480 * )
NEW Metal2 ( 18480 1216880 ) ( * 1220240 )
NEW Metal2 ( 18480 1216880 ) Via2_VH
NEW Metal1 ( 18480 1220240 ) Via1_VV ;
- - net51 ( PIN la_data_out[54] ) ( tiny_user_project_51 ZN ) + USE SIGNAL
+ - net52 ( PIN la_data_out[54] ) ( tiny_user_project_52 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 954800 ) ( * 958160 )
NEW Metal3 ( 1181040 954800 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 958160 ) Via1_VV
NEW Metal2 ( 1181040 954800 ) Via2_VH ;
- - net52 ( PIN la_data_out[55] ) ( tiny_user_project_52 ZN ) + USE SIGNAL
+ - net53 ( PIN la_data_out[55] ) ( tiny_user_project_53 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 397040 1319920 ) ( 399280 * )
NEW Metal2 ( 397040 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 399280 1319920 ) Via1_VV ;
- - net53 ( PIN la_data_out[56] ) ( tiny_user_project_53 ZN ) + USE SIGNAL
+ - net54 ( PIN la_data_out[56] ) ( tiny_user_project_54 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 383600 ) ( * 389200 )
NEW Metal3 ( 1181040 383600 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 389200 ) Via1_VV
NEW Metal2 ( 1181040 383600 ) Via2_VH ;
- - net54 ( PIN la_data_out[57] ) ( tiny_user_project_54 ZN ) + USE SIGNAL
+ - net55 ( PIN la_data_out[57] ) ( tiny_user_project_55 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 894320 1319920 ) ( 896560 * )
NEW Metal2 ( 894320 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 896560 1319920 ) Via1_VV ;
- - net55 ( PIN la_data_out[58] ) ( tiny_user_project_55 ZN ) + USE SIGNAL
+ - net56 ( PIN la_data_out[58] ) ( tiny_user_project_56 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 968240 ) ( * 973840 )
NEW Metal3 ( 1181040 968240 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 973840 ) Via1_VV
NEW Metal2 ( 1181040 968240 ) Via2_VH ;
- - net56 ( PIN la_data_out[59] ) ( tiny_user_project_56 ZN ) + USE SIGNAL
+ - net57 ( PIN la_data_out[59] ) ( tiny_user_project_57 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 491120 0 ) ( 18480 * )
NEW Metal2 ( 18480 491120 ) ( * 498960 )
NEW Metal2 ( 18480 491120 ) Via2_VH
NEW Metal1 ( 18480 498960 ) Via1_VV ;
- - net57 ( PIN la_data_out[60] ) ( tiny_user_project_57 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 954800 1319920 ) ( 959280 * )
- NEW Metal2 ( 954800 1319920 ) ( * 1352400 0 )
- NEW Metal1 ( 959280 1319920 ) Via1_VV
- NEW Metal2 ( 959280 1319920 ) Via2_VH
- NEW Metal2 ( 954800 1319920 ) Via2_VH
- NEW Metal2 ( 959280 1319920 ) RECT ( -280 -660 280 0 ) ;
- - net58 ( PIN la_data_out[61] ) ( tiny_user_project_58 ZN ) + USE SIGNAL
+ - net58 ( PIN la_data_out[60] ) ( tiny_user_project_58 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 959280 1319920 ) ( * 1326640 )
+ NEW Metal2 ( 954800 1326640 ) ( 959280 * )
+ NEW Metal2 ( 954800 1326640 ) ( * 1352400 0 )
+ NEW Metal1 ( 959280 1319920 ) Via1_VV ;
+ - net59 ( PIN la_data_out[61] ) ( tiny_user_project_59 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 343280 7280 0 ) ( * 33040 )
NEW Metal2 ( 343280 33040 ) ( 345520 * )
NEW Metal1 ( 345520 33040 ) Via1_VV ;
- - net59 ( PIN la_data_out[62] ) ( tiny_user_project_59 ZN ) + USE SIGNAL
+ - net6 ( PIN la_data_out[8] ) ( tiny_user_project_6 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 74480 0 ) ( 18480 * )
+ NEW Metal2 ( 18480 74480 ) ( * 80080 )
+ NEW Metal2 ( 18480 74480 ) Via2_VH
+ NEW Metal1 ( 18480 80080 ) Via1_VV ;
+ - net60 ( PIN la_data_out[62] ) ( tiny_user_project_60 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1109360 7280 0 ) ( * 18480 )
NEW Metal1 ( 1109360 18480 ) ( 1116080 * )
NEW Metal2 ( 1116080 18480 ) ( * 33040 )
NEW Metal1 ( 1109360 18480 ) Via1_HV
NEW Metal1 ( 1116080 18480 ) Via1_HV
NEW Metal1 ( 1116080 33040 ) Via1_VV ;
- - net6 ( PIN la_data_out[9] ) ( tiny_user_project_6 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 1181040 692720 ) ( 1193360 * 0 )
- NEW Metal1 ( 1181040 692720 ) Via1_VV
- NEW Metal2 ( 1181040 692720 ) Via2_VH
- NEW Metal2 ( 1181040 692720 ) RECT ( -280 -660 280 0 ) ;
- - net60 ( PIN la_data_out[63] ) ( tiny_user_project_60 ZN ) + USE SIGNAL
+ - net61 ( PIN la_data_out[63] ) ( tiny_user_project_61 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 1181040 175280 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 175280 ) Via1_VV
NEW Metal2 ( 1181040 175280 ) Via2_VH
NEW Metal2 ( 1181040 175280 ) RECT ( -280 -660 280 0 ) ;
- - net61 ( PIN io_out[0] ) ( tiny_user_project_61 ZN ) + USE SIGNAL
+ - net62 ( PIN io_out[0] ) ( tiny_user_project_62 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 136080 1319920 ) ( * 1326640 )
NEW Metal2 ( 133840 1326640 ) ( 136080 * )
NEW Metal2 ( 133840 1326640 ) ( * 1354640 )
@@ -15601,122 +15669,117 @@
NEW Metal2 ( 128240 1359120 ) ( 130480 * )
NEW Metal2 ( 128240 1356880 0 ) ( * 1359120 )
NEW Metal1 ( 136080 1319920 ) Via1_VV ;
- - net62 ( PIN io_out[1] ) ( tiny_user_project_62 ZN ) + USE SIGNAL
+ - net63 ( PIN io_out[1] ) ( tiny_user_project_63 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 81200 7280 0 ) ( * 33040 )
NEW Metal2 ( 81200 33040 ) ( 83440 * )
NEW Metal1 ( 83440 33040 ) Via1_VV ;
- - net63 ( PIN io_out[2] ) ( tiny_user_project_63 ZN ) + USE SIGNAL
+ - net64 ( PIN io_out[2] ) ( tiny_user_project_64 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 532560 ) ( * 534800 )
NEW Metal3 ( 1181040 531440 ) ( * 532560 )
NEW Metal3 ( 1181040 531440 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 534800 ) Via1_VV
NEW Metal2 ( 1181040 532560 ) Via2_VH ;
- - net64 ( PIN io_out[3] ) ( tiny_user_project_64 ZN ) + USE SIGNAL
+ - net65 ( PIN io_out[3] ) ( tiny_user_project_65 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 511280 1319920 ) ( 513520 * )
NEW Metal2 ( 511280 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 513520 1319920 ) Via1_VV ;
- - net65 ( PIN io_out[4] ) ( tiny_user_project_65 ZN ) + USE SIGNAL
+ - net66 ( PIN io_out[4] ) ( tiny_user_project_66 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 591920 7280 0 ) ( * 33040 )
NEW Metal2 ( 591920 33040 ) ( 594160 * )
NEW Metal1 ( 594160 33040 ) Via1_VV ;
- - net66 ( PIN io_out[5] ) ( tiny_user_project_66 ZN ) + USE SIGNAL
+ - net67 ( PIN io_out[5] ) ( tiny_user_project_67 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 457520 1319920 ) ( 459760 * )
NEW Metal2 ( 457520 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 459760 1319920 ) Via1_VV ;
- - net67 ( PIN io_out[6] ) ( tiny_user_project_67 ZN ) + USE SIGNAL
+ - net68 ( PIN io_out[6] ) ( tiny_user_project_68 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 229040 0 ) ( 18480 * )
NEW Metal2 ( 18480 229040 ) ( * 232400 )
NEW Metal2 ( 18480 229040 ) Via2_VH
NEW Metal1 ( 18480 232400 ) Via1_VV ;
- - net68 ( PIN io_out[7] ) ( tiny_user_project_68 ZN ) + USE SIGNAL
+ - net69 ( PIN io_out[7] ) ( tiny_user_project_69 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 726320 0 ) ( 18480 * )
NEW Metal2 ( 18480 726320 ) ( * 734160 )
NEW Metal2 ( 18480 726320 ) Via2_VH
NEW Metal1 ( 18480 734160 ) Via1_VV ;
- - net69 ( PIN io_out[8] ) ( tiny_user_project_69 ZN ) + USE SIGNAL
+ - net7 ( PIN la_data_out[9] ) ( tiny_user_project_7 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 1181040 692720 ) ( 1193360 * 0 )
+ NEW Metal1 ( 1181040 692720 ) Via1_VV
+ NEW Metal2 ( 1181040 692720 ) Via2_VH
+ NEW Metal2 ( 1181040 692720 ) RECT ( -280 -660 280 0 ) ;
+ - net70 ( PIN io_out[8] ) ( tiny_user_project_70 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 934640 7280 0 ) ( * 33040 )
NEW Metal2 ( 934640 33040 ) ( 936880 * )
NEW Metal1 ( 936880 33040 ) Via1_VV ;
- - net7 ( PIN la_data_out[10] ) ( tiny_user_project_7 ZN ) + USE SIGNAL
- + ROUTED Metal2 ( 1181040 766640 ) ( * 770000 )
- NEW Metal3 ( 1181040 766640 ) ( 1193360 * 0 )
- NEW Metal1 ( 1181040 770000 ) Via1_VV
- NEW Metal2 ( 1181040 766640 ) Via2_VH ;
- - net70 ( PIN io_out[9] ) ( tiny_user_project_70 ZN ) + USE SIGNAL
+ - net71 ( PIN io_out[9] ) ( tiny_user_project_71 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 329840 7280 0 ) ( * 33040 )
NEW Metal2 ( 329840 33040 ) ( 332080 * )
NEW Metal1 ( 332080 33040 ) Via1_VV ;
- - net71 ( PIN io_out[10] ) ( tiny_user_project_71 ZN ) + USE SIGNAL
+ - net72 ( PIN io_out[10] ) ( tiny_user_project_72 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 309680 1319920 ) ( 311920 * )
NEW Metal2 ( 309680 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 311920 1319920 ) Via1_VV ;
- - net72 ( PIN io_out[11] ) ( tiny_user_project_72 ZN ) + USE SIGNAL
+ - net73 ( PIN io_out[11] ) ( tiny_user_project_73 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 827120 7280 0 ) ( * 33040 )
NEW Metal2 ( 827120 33040 ) ( 829360 * )
NEW Metal1 ( 829360 33040 ) Via1_VV ;
- - net73 ( PIN io_out[12] ) ( tiny_user_project_73 ZN ) + USE SIGNAL
+ - net74 ( PIN io_out[12] ) ( tiny_user_project_74 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1176560 1319920 ) ( 1178800 * )
NEW Metal2 ( 1176560 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 1178800 1319920 ) Via1_VV ;
- - net74 ( PIN io_out[13] ) ( tiny_user_project_74 ZN ) + USE SIGNAL
+ - net75 ( PIN io_out[13] ) ( tiny_user_project_75 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 1277360 0 ) ( 18480 * )
NEW Metal2 ( 18480 1277360 ) ( * 1282960 )
NEW Metal2 ( 18480 1277360 ) Via2_VH
NEW Metal1 ( 18480 1282960 ) Via1_VV ;
- - net75 ( PIN io_out[14] ) ( tiny_user_project_75 ZN ) + USE SIGNAL
+ - net76 ( PIN io_out[14] ) ( tiny_user_project_76 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 948080 0 ) ( 18480 * )
NEW Metal2 ( 18480 948080 ) ( * 953680 )
NEW Metal2 ( 18480 948080 ) Via2_VH
NEW Metal1 ( 18480 953680 ) Via1_VV ;
- - net76 ( PIN io_out[15] ) ( tiny_user_project_76 ZN ) + USE SIGNAL
+ - net77 ( PIN io_out[15] ) ( tiny_user_project_77 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 518000 7280 0 ) ( * 33040 )
NEW Metal2 ( 518000 33040 ) ( 519120 * )
NEW Metal1 ( 519120 33040 ) Via1_VV ;
- - net77 ( PIN io_out[16] ) ( tiny_user_project_77 ZN ) + USE SIGNAL
+ - net78 ( PIN io_out[16] ) ( tiny_user_project_78 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 1149680 ) ( * 1157520 )
NEW Metal3 ( 1181040 1149680 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 1157520 ) Via1_VV
NEW Metal2 ( 1181040 1149680 ) Via2_VH ;
- - net78 ( PIN io_out[17] ) ( tiny_user_project_78 ZN ) + USE SIGNAL
+ - net79 ( PIN io_out[17] ) ( tiny_user_project_79 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 148400 7280 0 ) ( * 33040 )
NEW Metal2 ( 148400 33040 ) ( 150640 * )
NEW Metal1 ( 150640 33040 ) Via1_VV ;
- - net79 ( PIN io_out[18] ) ( tiny_user_project_79 ZN ) + USE SIGNAL
+ - net8 ( PIN la_data_out[10] ) ( tiny_user_project_8 ZN ) + USE SIGNAL
+ + ROUTED Metal2 ( 1181040 766640 ) ( * 770000 )
+ NEW Metal3 ( 1181040 766640 ) ( 1193360 * 0 )
+ NEW Metal1 ( 1181040 770000 ) Via1_VV
+ NEW Metal2 ( 1181040 766640 ) Via2_VH ;
+ - net80 ( PIN io_out[18] ) ( tiny_user_project_80 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1196720 7280 0 ) ( * 34160 )
NEW Metal3 ( 1174320 34160 ) ( 1196720 * )
NEW Metal2 ( 1174320 34160 ) ( * 44240 )
NEW Metal2 ( 1196720 34160 ) Via2_VH
NEW Metal2 ( 1174320 34160 ) Via2_VH
NEW Metal1 ( 1174320 44240 ) Via1_VV ;
- - net8 ( PIN la_data_out[11] ) ( tiny_user_project_8 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 47600 0 ) ( 18480 * )
- NEW Metal2 ( 18480 47600 ) ( * 48720 )
- NEW Metal2 ( 18480 47600 ) Via2_VH
- NEW Metal1 ( 18480 48720 ) Via1_VV ;
- - net80 ( PIN io_out[19] ) ( tiny_user_project_80 ZN ) + USE SIGNAL
+ - net81 ( PIN io_out[19] ) ( tiny_user_project_81 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 202160 1319920 ) ( 204400 * )
NEW Metal2 ( 202160 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 204400 1319920 ) Via1_VV ;
- - net81 ( PIN io_out[20] ) ( tiny_user_project_81 ZN ) + USE SIGNAL
+ - net82 ( PIN io_out[20] ) ( tiny_user_project_82 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1181040 202160 ) ( * 205520 )
NEW Metal3 ( 1181040 202160 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 205520 ) Via1_VV
NEW Metal2 ( 1181040 202160 ) Via2_VH ;
- - net82 ( PIN io_out[21] ) ( tiny_user_project_82 ZN ) + USE SIGNAL
+ - net83 ( PIN io_out[21] ) ( tiny_user_project_83 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 7280 847280 0 ) ( 18480 * )
NEW Metal2 ( 18480 847280 ) ( * 848400 )
NEW Metal2 ( 18480 847280 ) Via2_VH
NEW Metal1 ( 18480 848400 ) Via1_VV ;
- - net83 ( PIN io_out[22] ) ( tiny_user_project_83 ZN ) + USE SIGNAL
+ - net84 ( PIN io_out[22] ) ( tiny_user_project_84 ZN ) + USE SIGNAL
+ ROUTED Metal3 ( 1181040 363440 ) ( 1193360 * 0 )
NEW Metal1 ( 1181040 363440 ) Via1_VV
NEW Metal2 ( 1181040 363440 ) Via2_VH
NEW Metal2 ( 1181040 363440 ) RECT ( -280 -660 280 0 ) ;
- - net84 ( PIN io_out[23] ) ( tiny_user_project_84 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 477680 0 ) ( 18480 * )
- NEW Metal2 ( 18480 477680 ) ( * 483280 )
- NEW Metal2 ( 18480 477680 ) Via2_VH
- NEW Metal1 ( 18480 483280 ) Via1_VV ;
- net85 ( PIN io_out[24] ) ( tiny_user_project_85 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 1122800 7280 0 ) ( * 9520 )
NEW Metal2 ( 1122800 9520 ) ( 1125040 * )
@@ -15739,11 +15802,11 @@
+ ROUTED Metal2 ( 820400 1319920 ) ( 822640 * )
NEW Metal2 ( 820400 1319920 ) ( * 1352400 0 )
NEW Metal1 ( 822640 1319920 ) Via1_VV ;
- - net9 ( PIN la_data_out[12] ) ( tiny_user_project_9 ZN ) + USE SIGNAL
- + ROUTED Metal3 ( 7280 921200 0 ) ( 18480 * )
- NEW Metal2 ( 18480 921200 ) ( * 926800 )
- NEW Metal2 ( 18480 921200 ) Via2_VH
- NEW Metal1 ( 18480 926800 ) Via1_VV ;
+ - net9 ( PIN la_data_out[11] ) ( tiny_user_project_9 ZN ) + USE SIGNAL
+ + ROUTED Metal3 ( 7280 47600 0 ) ( 18480 * )
+ NEW Metal2 ( 18480 47600 ) ( * 48720 )
+ NEW Metal2 ( 18480 47600 ) Via2_VH
+ NEW Metal1 ( 18480 48720 ) Via1_VV ;
- net90 ( PIN io_out[29] ) ( tiny_user_project_90 ZN ) + USE SIGNAL
+ ROUTED Metal2 ( 874160 7280 0 ) ( * 18480 )
NEW Metal1 ( 874160 18480 ) ( 880880 * )
diff --git a/gds/tiny_user_project.gds b/gds/tiny_user_project.gds
index 7b988ec..3ba5734 100644
--- a/gds/tiny_user_project.gds
+++ b/gds/tiny_user_project.gds
Binary files differ
diff --git a/gds/user_project_wrapper.gds b/gds/user_project_wrapper.gds
index b69e173..ac2ced6 100644
--- a/gds/user_project_wrapper.gds
+++ b/gds/user_project_wrapper.gds
Binary files differ
diff --git a/mag/tiny_user_project.mag b/mag/tiny_user_project.mag
index 0a3d15d..0fb913b 100644
--- a/mag/tiny_user_project.mag
+++ b/mag/tiny_user_project.mag
@@ -1,7 +1,7 @@
magic
tech gf180mcuC
magscale 1 10
-timestamp 1670136119
+timestamp 1670142893
<< metal1 >>
rect 102834 132638 102846 132690
rect 102898 132687 102910 132690
@@ -1218,6 +1218,10 @@
rect 112154 78374 112206 78426
rect 112258 78374 118608 78426
rect 1344 78340 118608 78374
+rect 1922 78094 1934 78146
+rect 1986 78094 1998 78146
+rect 3266 77870 3278 77922
+rect 3330 77870 3342 77922
rect 1344 77642 118608 77676
rect 1344 77590 4478 77642
rect 4530 77590 4582 77642
@@ -1233,6 +1237,8 @@
rect 96794 77590 96846 77642
rect 96898 77590 118608 77642
rect 1344 77556 118608 77590
+rect 1822 77362 1874 77374
+rect 1822 77298 1874 77310
rect 118078 77026 118130 77038
rect 118078 76962 118130 76974
rect 1344 76858 118608 76892
@@ -1709,6 +1715,8 @@
rect 96794 54070 96846 54122
rect 96898 54070 118608 54122
rect 1344 54036 118608 54070
+rect 1822 53506 1874 53518
+rect 1822 53442 1874 53454
rect 118078 53506 118130 53518
rect 118078 53442 118130 53454
rect 1344 53338 118608 53372
@@ -1727,7 +1735,11 @@
rect 112258 53286 118608 53338
rect 1344 53252 118608 53286
rect 118078 53058 118130 53070
+rect 1922 53006 1934 53058
+rect 1986 53006 1998 53058
rect 118078 52994 118130 53006
+rect 3042 52782 3054 52834
+rect 3106 52782 3118 52834
rect 1344 52554 118608 52588
rect 1344 52502 4478 52554
rect 4530 52502 4582 52554
@@ -1743,6 +1755,14 @@
rect 96794 52502 96846 52554
rect 96898 52502 118608 52554
rect 1344 52468 118608 52502
+rect 2482 52334 2494 52386
+rect 2546 52334 2558 52386
+rect 3614 52274 3666 52286
+rect 2818 52222 2830 52274
+rect 2882 52222 2894 52274
+rect 3614 52210 3666 52222
+rect 2930 52110 2942 52162
+rect 2994 52110 3006 52162
rect 1344 51770 118608 51804
rect 1344 51718 19838 51770
rect 19890 51718 19942 51770
@@ -1758,6 +1778,10 @@
rect 112154 51718 112206 51770
rect 112258 51718 118608 51770
rect 1344 51684 118608 51718
+rect 2494 51490 2546 51502
+rect 2494 51426 2546 51438
+rect 2830 51490 2882 51502
+rect 2830 51426 2882 51438
rect 1344 50986 118608 51020
rect 1344 50934 4478 50986
rect 4530 50934 4582 50986
@@ -1820,8 +1844,10 @@
rect 112154 48582 112206 48634
rect 112258 48582 118608 48634
rect 1344 48548 118608 48582
-rect 1822 48354 1874 48366
-rect 1822 48290 1874 48302
+rect 2818 48190 2830 48242
+rect 2882 48190 2894 48242
+rect 1922 48078 1934 48130
+rect 1986 48078 1998 48130
rect 1344 47850 118608 47884
rect 1344 47798 4478 47850
rect 4530 47798 4582 47850
@@ -3795,6 +3821,8 @@
rect 111998 78374 112050 78426
rect 112102 78374 112154 78426
rect 112206 78374 112258 78426
+rect 1934 78094 1986 78146
+rect 3278 77870 3330 77922
rect 4478 77590 4530 77642
rect 4582 77590 4634 77642
rect 4686 77590 4738 77642
@@ -3807,6 +3835,7 @@
rect 96638 77590 96690 77642
rect 96742 77590 96794 77642
rect 96846 77590 96898 77642
+rect 1822 77310 1874 77362
rect 118078 76974 118130 77026
rect 19838 76806 19890 76858
rect 19942 76806 19994 76858
@@ -4180,6 +4209,7 @@
rect 96638 54070 96690 54122
rect 96742 54070 96794 54122
rect 96846 54070 96898 54122
+rect 1822 53454 1874 53506
rect 118078 53454 118130 53506
rect 19838 53286 19890 53338
rect 19942 53286 19994 53338
@@ -4193,7 +4223,9 @@
rect 111998 53286 112050 53338
rect 112102 53286 112154 53338
rect 112206 53286 112258 53338
+rect 1934 53006 1986 53058
rect 118078 53006 118130 53058
+rect 3054 52782 3106 52834
rect 4478 52502 4530 52554
rect 4582 52502 4634 52554
rect 4686 52502 4738 52554
@@ -4206,6 +4238,10 @@
rect 96638 52502 96690 52554
rect 96742 52502 96794 52554
rect 96846 52502 96898 52554
+rect 2494 52334 2546 52386
+rect 2830 52222 2882 52274
+rect 3614 52222 3666 52274
+rect 2942 52110 2994 52162
rect 19838 51718 19890 51770
rect 19942 51718 19994 51770
rect 20046 51718 20098 51770
@@ -4218,6 +4254,8 @@
rect 111998 51718 112050 51770
rect 112102 51718 112154 51770
rect 112206 51718 112258 51770
+rect 2494 51438 2546 51490
+rect 2830 51438 2882 51490
rect 4478 50934 4530 50986
rect 4582 50934 4634 50986
rect 4686 50934 4738 50986
@@ -4267,7 +4305,8 @@
rect 111998 48582 112050 48634
rect 112102 48582 112154 48634
rect 112206 48582 112258 48634
-rect 1822 48302 1874 48354
+rect 2830 48190 2882 48242
+rect 1934 48078 1986 48130
rect 4478 47798 4530 47850
rect 4582 47798 4634 47850
rect 4686 47798 4738 47850
@@ -5387,6 +5426,8 @@
rect 88338 131966 88340 132018
rect 88060 131964 88340 131966
rect 89404 132020 89460 135200
+rect 95452 132692 95508 135200
+rect 95452 132636 95956 132692
rect 89628 132020 89684 132030
rect 89404 132018 89684 132020
rect 89404 131966 89630 132018
@@ -5399,7 +5440,7 @@
rect 85596 131954 85652 131964
rect 88284 131954 88340 131964
rect 89628 131954 89684 131964
-rect 95452 132020 95508 135200
+rect 95900 132018 95956 132636
rect 102844 132690 102900 135200
rect 102844 132638 102846 132690
rect 102898 132638 102900 132690
@@ -5411,9 +5452,9 @@
rect 96692 132468 96740 132524
rect 96796 132468 96844 132524
rect 96636 132458 96900 132468
-rect 95452 131954 95508 131964
-rect 95900 132020 95956 132030
-rect 95900 131926 95956 131964
+rect 95900 131966 95902 132018
+rect 95954 131966 95956 132018
+rect 95900 131954 95956 131966
rect 103740 132018 103796 132638
rect 103740 131966 103742 132018
rect 103794 131966 103796 132018
@@ -6728,6 +6769,25 @@
rect 112052 78372 112100 78428
rect 112156 78372 112204 78428
rect 111996 78362 112260 78372
+rect 1932 78146 1988 78158
+rect 1932 78094 1934 78146
+rect 1986 78094 1988 78146
+rect 1820 77364 1876 77374
+rect 1932 77364 1988 78094
+rect 3276 77924 3332 77934
+rect 3276 77922 3444 77924
+rect 3276 77870 3278 77922
+rect 3330 77870 3444 77922
+rect 3276 77868 3444 77870
+rect 3276 77858 3332 77868
+rect 1876 77308 1988 77364
+rect 1820 77232 1876 77308
+rect 1820 73442 1876 73454
+rect 1820 73390 1822 73442
+rect 1874 73390 1876 73442
+rect 1820 72660 1876 73390
+rect 1820 72594 1876 72604
+rect 3388 67228 3444 77868
rect 4476 77644 4740 77654
rect 4532 77588 4580 77644
rect 4636 77588 4684 77644
@@ -6832,10 +6892,6 @@
rect 112052 73668 112100 73724
rect 112156 73668 112204 73724
rect 111996 73658 112260 73668
-rect 1820 73442 1876 73454
-rect 1820 73390 1822 73442
-rect 1874 73390 1876 73442
-rect 1820 72660 1876 73390
rect 118076 73332 118132 73838
rect 118076 73266 118132 73276
rect 4476 72940 4740 72950
@@ -6854,7 +6910,6 @@
rect 96692 72884 96740 72940
rect 96796 72884 96844 72940
rect 96636 72874 96900 72884
-rect 1820 72594 1876 72604
rect 19836 72156 20100 72166
rect 19892 72100 19940 72156
rect 19996 72100 20044 72156
@@ -6978,7 +7033,49 @@
rect 112156 67396 112204 67452
rect 111996 67386 112260 67396
rect 118076 67284 118132 67566
+rect 3388 67172 3668 67228
rect 118076 67218 118132 67228
+rect 1820 64482 1876 64494
+rect 1820 64430 1822 64482
+rect 1874 64430 1876 64482
+rect 1820 63924 1876 64430
+rect 1820 63858 1876 63868
+rect 1820 61346 1876 61358
+rect 1820 61294 1822 61346
+rect 1874 61294 1876 61346
+rect 1820 61236 1876 61294
+rect 1820 61170 1876 61180
+rect 1820 58210 1876 58222
+rect 1820 58158 1822 58210
+rect 1874 58158 1876 58210
+rect 1820 57876 1876 58158
+rect 1820 57810 1876 57820
+rect 1820 53508 1876 53518
+rect 1820 53506 1988 53508
+rect 1820 53454 1822 53506
+rect 1874 53454 1988 53506
+rect 1820 53452 1988 53454
+rect 1820 53442 1876 53452
+rect 1932 53058 1988 53452
+rect 1932 53006 1934 53058
+rect 1986 53006 1988 53058
+rect 1932 52500 1988 53006
+rect 3052 52836 3108 52846
+rect 1932 52434 1988 52444
+rect 2828 52834 3108 52836
+rect 2828 52782 3054 52834
+rect 3106 52782 3108 52834
+rect 2828 52780 3108 52782
+rect 2492 52386 2548 52398
+rect 2492 52334 2494 52386
+rect 2546 52334 2548 52386
+rect 2492 51490 2548 52334
+rect 2828 52274 2884 52780
+rect 3052 52770 3108 52780
+rect 2828 52222 2830 52274
+rect 2882 52222 2884 52274
+rect 2828 52210 2884 52222
+rect 3612 52274 3668 67172
rect 4476 66668 4740 66678
rect 4532 66612 4580 66668
rect 4636 66612 4684 66668
@@ -7027,10 +7124,6 @@
rect 96692 65044 96740 65100
rect 96796 65044 96844 65100
rect 96636 65034 96900 65044
-rect 1820 64482 1876 64494
-rect 1820 64430 1822 64482
-rect 1874 64430 1876 64482
-rect 1820 63924 1876 64430
rect 19836 64316 20100 64326
rect 19892 64260 19940 64316
rect 19996 64260 20044 64316
@@ -7047,7 +7140,6 @@
rect 112052 64260 112100 64316
rect 112156 64260 112204 64316
rect 111996 64250 112260 64260
-rect 1820 63858 1876 63868
rect 4476 63532 4740 63542
rect 4532 63476 4580 63532
rect 4636 63476 4684 63532
@@ -7096,11 +7188,6 @@
rect 96692 61908 96740 61964
rect 96796 61908 96844 61964
rect 96636 61898 96900 61908
-rect 1820 61346 1876 61358
-rect 1820 61294 1822 61346
-rect 1874 61294 1876 61346
-rect 1820 61236 1876 61294
-rect 1820 61170 1876 61180
rect 19836 61180 20100 61190
rect 19892 61124 19940 61180
rect 19996 61124 20044 61180
@@ -7177,10 +7264,6 @@
rect 96636 58762 96900 58772
rect 118076 58548 118132 59278
rect 118076 58482 118132 58492
-rect 1820 58210 1876 58222
-rect 1820 58158 1822 58210
-rect 1874 58158 1876 58210
-rect 1820 57876 1876 58158
rect 19836 58044 20100 58054
rect 19892 57988 19940 58044
rect 19996 57988 20044 58044
@@ -7197,7 +7280,6 @@
rect 112052 57988 112100 58044
rect 112156 57988 112204 58044
rect 111996 57978 112260 57988
-rect 1820 57810 1876 57820
rect 118076 57762 118132 57774
rect 118076 57710 118078 57762
rect 118130 57710 118132 57762
@@ -7325,6 +7407,12 @@
rect 96636 52490 96900 52500
rect 118076 52500 118132 53006
rect 118076 52434 118132 52444
+rect 3612 52222 3614 52274
+rect 3666 52222 3668 52274
+rect 2940 52164 2996 52174
+rect 2940 52070 2996 52108
+rect 3612 52164 3668 52222
+rect 3612 52098 3668 52108
rect 19836 51772 20100 51782
rect 19892 51716 19940 51772
rect 19996 51716 20044 51772
@@ -7341,6 +7429,18 @@
rect 112052 51716 112100 51772
rect 112156 51716 112204 51772
rect 111996 51706 112260 51716
+rect 2492 51438 2494 51490
+rect 2546 51438 2548 51490
+rect 2492 51426 2548 51438
+rect 2828 51490 2884 51502
+rect 2828 51438 2830 51490
+rect 2882 51438 2884 51490
+rect 1820 49922 1876 49934
+rect 1820 49870 1822 49922
+rect 1874 49870 1876 49922
+rect 1820 49140 1876 49870
+rect 1820 49074 1876 49084
+rect 2828 48242 2884 51438
rect 4476 50988 4740 50998
rect 4532 50932 4580 50988
rect 4636 50932 4684 50988
@@ -7373,10 +7473,6 @@
rect 112052 50148 112100 50204
rect 112156 50148 112204 50204
rect 111996 50138 112260 50148
-rect 1820 49922 1876 49934
-rect 1820 49870 1822 49922
-rect 1874 49870 1876 49922
-rect 1820 49140 1876 49870
rect 4476 49420 4740 49430
rect 4532 49364 4580 49420
rect 4636 49364 4684 49420
@@ -7393,7 +7489,6 @@
rect 96692 49364 96740 49420
rect 96796 49364 96844 49420
rect 96636 49354 96900 49364
-rect 1820 49074 1876 49084
rect 19836 48636 20100 48646
rect 19892 48580 19940 48636
rect 19996 48580 20044 48636
@@ -7410,10 +7505,13 @@
rect 112052 48580 112100 48636
rect 112156 48580 112204 48636
rect 111996 48570 112260 48580
-rect 1820 48354 1876 48366
-rect 1820 48302 1822 48354
-rect 1874 48302 1876 48354
-rect 1820 47796 1876 48302
+rect 2828 48190 2830 48242
+rect 2882 48190 2884 48242
+rect 2828 48178 2884 48190
+rect 1932 48130 1988 48142
+rect 1932 48078 1934 48130
+rect 1986 48078 1988 48130
+rect 1932 47796 1988 48078
rect 4476 47852 4740 47862
rect 4532 47796 4580 47852
rect 4636 47796 4684 47852
@@ -7430,7 +7528,7 @@
rect 96692 47796 96740 47852
rect 96796 47796 96844 47852
rect 96636 47786 96900 47796
-rect 1820 47730 1876 47740
+rect 1932 47730 1988 47740
rect 118076 47234 118132 47246
rect 118076 47182 118078 47234
rect 118130 47182 118132 47234
@@ -8991,12 +9089,6 @@
rect 96846 132470 96898 132522
rect 96898 132470 96900 132522
rect 96844 132468 96900 132470
-rect 95452 131964 95508 132020
-rect 95900 132018 95956 132020
-rect 95900 131966 95902 132018
-rect 95902 131966 95954 132018
-rect 95954 131966 95956 132018
-rect 95900 131964 95956 131966
rect 117292 132412 117348 132468
rect 19836 131738 19892 131740
rect 19836 131686 19838 131738
@@ -13194,6 +13286,12 @@
rect 112206 78374 112258 78426
rect 112258 78374 112260 78426
rect 112204 78372 112260 78374
+rect 1820 77362 1876 77364
+rect 1820 77310 1822 77362
+rect 1822 77310 1874 77362
+rect 1874 77310 1876 77362
+rect 1820 77308 1876 77310
+rect 1820 72604 1876 72660
rect 4476 77642 4532 77644
rect 4476 77590 4478 77642
rect 4478 77590 4530 77642
@@ -13616,7 +13714,6 @@
rect 96846 72886 96898 72938
rect 96898 72886 96900 72938
rect 96844 72884 96900 72886
-rect 1820 72604 1876 72660
rect 19836 72154 19892 72156
rect 19836 72102 19838 72154
rect 19838 72102 19890 72154
@@ -14044,6 +14141,10 @@
rect 112258 67398 112260 67450
rect 112204 67396 112260 67398
rect 118076 67228 118132 67284
+rect 1820 63868 1876 63924
+rect 1820 61180 1876 61236
+rect 1820 57820 1876 57876
+rect 1932 52444 1988 52500
rect 4476 66666 4532 66668
rect 4476 66614 4478 66666
rect 4478 66614 4530 66666
@@ -14284,7 +14385,6 @@
rect 112206 64262 112258 64314
rect 112258 64262 112260 64314
rect 112204 64260 112260 64262
-rect 1820 63868 1876 63924
rect 4476 63530 4532 63532
rect 4476 63478 4478 63530
rect 4478 63478 4530 63530
@@ -14465,7 +14565,6 @@
rect 96846 61910 96898 61962
rect 96898 61910 96900 61962
rect 96844 61908 96900 61910
-rect 1820 61180 1876 61236
rect 19836 61178 19892 61180
rect 19836 61126 19838 61178
rect 19838 61126 19890 61178
@@ -14773,7 +14872,6 @@
rect 112206 57990 112258 58042
rect 112258 57990 112260 58042
rect 112204 57988 112260 57990
-rect 1820 57820 1876 57876
rect 4476 57258 4532 57260
rect 4476 57206 4478 57258
rect 4478 57206 4530 57258
@@ -15197,6 +15295,12 @@
rect 96898 52502 96900 52554
rect 96844 52500 96900 52502
rect 118076 52444 118132 52500
+rect 2940 52162 2996 52164
+rect 2940 52110 2942 52162
+rect 2942 52110 2994 52162
+rect 2994 52110 2996 52162
+rect 2940 52108 2996 52110
+rect 3612 52108 3668 52164
rect 19836 51770 19892 51772
rect 19836 51718 19838 51770
rect 19838 51718 19890 51770
@@ -15257,6 +15361,7 @@
rect 112206 51718 112258 51770
rect 112258 51718 112260 51770
rect 112204 51716 112260 51718
+rect 1820 49084 1876 49140
rect 4476 50986 4532 50988
rect 4476 50934 4478 50986
rect 4478 50934 4530 50986
@@ -15437,7 +15542,6 @@
rect 96846 49366 96898 49418
rect 96898 49366 96900 49418
rect 96844 49364 96900 49366
-rect 1820 49084 1876 49140
rect 19836 48634 19892 48636
rect 19836 48582 19838 48634
rect 19838 48582 19890 48634
@@ -15498,7 +15602,7 @@
rect 112206 48582 112258 48634
rect 112258 48582 112260 48634
rect 112204 48580 112260 48582
-rect 1820 47740 1876 47796
+rect 1932 47740 1988 47796
rect 4476 47850 4532 47852
rect 4476 47798 4478 47850
rect 4478 47798 4530 47850
@@ -19082,9 +19186,6 @@
rect 75282 131964 75292 132020
rect 75348 131964 76300 132020
rect 76356 131964 76366 132020
-rect 95442 131964 95452 132020
-rect 95508 131964 95900 132020
-rect 95956 131964 95966 132020
rect 200 131712 800 131824
rect 19826 131684 19836 131740
rect 19892 131684 19940 131740
@@ -20401,7 +20502,10 @@
rect 96692 77588 96740 77644
rect 96796 77588 96844 77644
rect 96900 77588 96910 77644
-rect 200 77280 800 77392
+rect 200 77364 800 77392
+rect 200 77308 1820 77364
+rect 1876 77308 1886 77364
+rect 200 77280 800 77308
rect 19826 76804 19836 76860
rect 19892 76804 19940 76860
rect 19996 76804 20044 76860
@@ -20981,7 +21085,7 @@
rect 119200 53172 119800 53200
rect 118076 53116 119800 53172
rect 119200 53088 119800 53116
-rect 200 52416 800 52528
+rect 200 52500 800 52528
rect 4466 52500 4476 52556
rect 4532 52500 4580 52556
rect 4636 52500 4684 52556
@@ -20999,9 +21103,15 @@
rect 96796 52500 96844 52556
rect 96900 52500 96910 52556
rect 119200 52500 119800 52528
+rect 200 52444 1932 52500
+rect 1988 52444 1998 52500
rect 118066 52444 118076 52500
rect 118132 52444 119800 52500
+rect 200 52416 800 52444
rect 119200 52416 119800 52444
+rect 2930 52108 2940 52164
+rect 2996 52108 3612 52164
+rect 3668 52108 3678 52164
rect 200 51744 800 51856
rect 19826 51716 19836 51772
rect 19892 51716 19940 51772
@@ -21108,8 +21218,8 @@
rect 96692 47796 96740 47852
rect 96796 47796 96844 47852
rect 96900 47796 96910 47852
-rect 200 47740 1820 47796
-rect 1876 47740 1886 47796
+rect 200 47740 1932 47796
+rect 1988 47740 1998 47796
rect 200 47712 800 47740
rect 119200 47124 119800 47152
rect 118066 47068 118076 47124
@@ -27542,6 +27652,18 @@
rect 112156 3108 112204 3164
rect 112260 3108 112288 3164
rect 111968 3076 112288 3108
+use gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA__001__A1 pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
+timestamp 1669390400
+transform 1 0 3584 0 1 51744
+box -86 -86 310 870
+use gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA_input1_I
+timestamp 1669390400
+transform -1 0 1904 0 1 76832
+box -86 -86 310 870
+use gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA_input2_I
+timestamp 1669390400
+transform -1 0 1904 0 1 53312
+box -86 -86 310 870
use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_0_2 pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
timestamp 1669390400
transform 1 0 1568 0 1 3136
@@ -38450,10 +38572,22 @@
timestamp 1669390400
transform 1 0 1568 0 -1 48608
box 0 -60 112 844
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_57_7
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_57_17
timestamp 1669390400
-transform 1 0 2128 0 -1 48608
-box -86 -86 7254 870
+transform 1 0 3248 0 -1 48608
+box -86 -86 3670 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_57_49
+timestamp 1669390400
+transform 1 0 6832 0 -1 48608
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_57_65
+timestamp 1669390400
+transform 1 0 8624 0 -1 48608
+box -86 -86 534 870
+use gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_57_69
+timestamp 1669390400
+transform 1 0 9072 0 -1 48608
+box 0 -60 224 844
use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_57_73
timestamp 1669390400
transform 1 0 9520 0 -1 48608
@@ -39174,18 +39308,30 @@
timestamp 1669390400
transform 1 0 118160 0 1 50176
box 0 -60 224 844
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_61_2
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_61_2
timestamp 1669390400
transform 1 0 1568 0 -1 51744
-box -86 -86 7254 870
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_61_66
-timestamp 1669390400
-transform 1 0 8736 0 -1 51744
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_70
+use gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_61_6
timestamp 1669390400
-transform 1 0 9184 0 -1 51744
+transform 1 0 2016 0 -1 51744
+box 0 -60 224 844
+use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_8
+timestamp 1669390400
+transform 1 0 2240 0 -1 51744
box 0 -60 112 844
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_61_15
+timestamp 1669390400
+transform 1 0 3024 0 -1 51744
+box -86 -86 3670 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_61_47
+timestamp 1669390400
+transform 1 0 6608 0 -1 51744
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_61_63
+timestamp 1669390400
+transform 1 0 8400 0 -1 51744
+box -86 -86 982 870
use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_61_73
timestamp 1669390400
transform 1 0 9520 0 -1 51744
@@ -39354,10 +39500,26 @@
timestamp 1669390400
transform 1 0 118272 0 -1 51744
box 0 -60 112 844
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_62_2
+use gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_2
timestamp 1669390400
transform 1 0 1568 0 1 51744
-box -86 -86 3670 870
+box 0 -60 224 844
+use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_62_4
+timestamp 1669390400
+transform 1 0 1792 0 1 51744
+box 0 -60 112 844
+use gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_18
+timestamp 1669390400
+transform 1 0 3360 0 1 51744
+box 0 -60 224 844
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_62_22
+timestamp 1669390400
+transform 1 0 3808 0 1 51744
+box -86 -86 982 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_62_30
+timestamp 1669390400
+transform 1 0 4704 0 1 51744
+box -86 -86 534 870
use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_62_34
timestamp 1669390400
transform 1 0 5152 0 1 51744
@@ -39542,18 +39704,22 @@
timestamp 1669390400
transform 1 0 118160 0 1 51744
box 0 -60 224 844
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_63_2
+use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_2
timestamp 1669390400
transform 1 0 1568 0 -1 53312
-box -86 -86 7254 870
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_66
-timestamp 1669390400
-transform 1 0 8736 0 -1 53312
-box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_70
-timestamp 1669390400
-transform 1 0 9184 0 -1 53312
box 0 -60 112 844
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_63_19
+timestamp 1669390400
+transform 1 0 3472 0 -1 53312
+box -86 -86 3670 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_63_51
+timestamp 1669390400
+transform 1 0 7056 0 -1 53312
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_67
+timestamp 1669390400
+transform 1 0 8848 0 -1 53312
+box -86 -86 534 870
use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_63_73
timestamp 1669390400
transform 1 0 9520 0 -1 53312
@@ -39726,14 +39892,26 @@
timestamp 1669390400
transform 1 0 118272 0 -1 53312
box 0 -60 112 844
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_64_2
+use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_64_2
timestamp 1669390400
transform 1 0 1568 0 1 53312
-box -86 -86 3670 870
-use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_64_34
-timestamp 1669390400
-transform 1 0 5152 0 1 53312
box 0 -60 112 844
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_64_5
+timestamp 1669390400
+transform 1 0 1904 0 1 53312
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_64_21
+timestamp 1669390400
+transform 1 0 3696 0 1 53312
+box -86 -86 982 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_64_29
+timestamp 1669390400
+transform 1 0 4592 0 1 53312
+box -86 -86 534 870
+use gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_64_33
+timestamp 1669390400
+transform 1 0 5040 0 1 53312
+box 0 -60 224 844
use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_64_37
timestamp 1669390400
transform 1 0 5488 0 1 53312
@@ -45282,14 +45460,26 @@
timestamp 1669390400
transform 1 0 118272 0 -1 76832
box 0 -60 112 844
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_94_2
+use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_2
timestamp 1669390400
transform 1 0 1568 0 1 76832
-box -86 -86 3670 870
-use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_34
-timestamp 1669390400
-transform 1 0 5152 0 1 76832
box 0 -60 112 844
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_94_5
+timestamp 1669390400
+transform 1 0 1904 0 1 76832
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_94_21
+timestamp 1669390400
+transform 1 0 3696 0 1 76832
+box -86 -86 982 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_94_29
+timestamp 1669390400
+transform 1 0 4592 0 1 76832
+box -86 -86 534 870
+use gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_94_33
+timestamp 1669390400
+transform 1 0 5040 0 1 76832
+box 0 -60 224 844
use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_94_37
timestamp 1669390400
transform 1 0 5488 0 1 76832
@@ -45470,18 +45660,22 @@
timestamp 1669390400
transform 1 0 118272 0 1 76832
box 0 -60 112 844
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_95_2
+use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_95_2
timestamp 1669390400
transform 1 0 1568 0 -1 78400
-box -86 -86 7254 870
-use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_95_66
-timestamp 1669390400
-transform 1 0 8736 0 -1 78400
-box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_95_70
-timestamp 1669390400
-transform 1 0 9184 0 -1 78400
box 0 -60 112 844
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_95_19
+timestamp 1669390400
+transform 1 0 3472 0 -1 78400
+box -86 -86 3670 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_95_51
+timestamp 1669390400
+transform 1 0 7056 0 -1 78400
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_95_67
+timestamp 1669390400
+transform 1 0 8848 0 -1 78400
+box -86 -86 534 870
use gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_95_73
timestamp 1669390400
transform 1 0 9520 0 -1 78400
@@ -69826,341 +70020,349 @@
timestamp 1669390400
transform 1 0 115024 0 1 131712
box -86 -86 310 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_1 pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
+use gf180mcu_fd_sc_mcu7t5v0__xnor2_1 _001_ pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
timestamp 1669390400
-transform -1 0 65072 0 1 131712
-box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_2
+transform -1 0 3360 0 1 51744
+box -86 -86 1542 870
+use gf180mcu_fd_sc_mcu7t5v0__clkbuf_1 _002_ pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
timestamp 1669390400
-transform 1 0 117824 0 -1 84672
-box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_3
+transform 1 0 2352 0 -1 51744
+box -86 -86 758 870
+use gf180mcu_fd_sc_mcu7t5v0__dlyb_1 input1 pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
+timestamp 1669390400
+transform 1 0 1680 0 -1 78400
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__dlyb_1 input2
+timestamp 1669390400
+transform 1 0 1680 0 -1 53312
+box -86 -86 1878 870
+use gf180mcu_fd_sc_mcu7t5v0__clkbuf_3 output3 pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
+timestamp 1669390400
+transform -1 0 3248 0 -1 48608
+box -86 -86 1654 870
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_4 pdk/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/mag
timestamp 1669390400
transform 1 0 117824 0 1 45472
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_4
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_5
timestamp 1669390400
transform -1 0 115808 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_5
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_6
timestamp 1669390400
transform -1 0 2128 0 1 7840
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_6
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_7
timestamp 1669390400
transform 1 0 117824 0 1 68992
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_7
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_8
timestamp 1669390400
transform 1 0 117824 0 1 76832
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_8
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_9
timestamp 1669390400
transform -1 0 2128 0 1 4704
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_9
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_10
timestamp 1669390400
transform -1 0 2128 0 1 92512
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_10
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_11
timestamp 1669390400
transform -1 0 48272 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_11
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_12
timestamp 1669390400
transform 1 0 117824 0 -1 61152
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_12
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_13
timestamp 1669390400
transform -1 0 2128 0 1 109760
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_13
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_14
timestamp 1669390400
transform 1 0 117824 0 -1 79968
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_14
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_15
timestamp 1669390400
transform -1 0 54992 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_15
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_16
timestamp 1669390400
transform 1 0 117824 0 -1 114464
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_16
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_17
timestamp 1669390400
transform -1 0 68768 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_17
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_18
timestamp 1669390400
transform 1 0 117824 0 1 26656
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_18
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_19
timestamp 1669390400
transform -1 0 2128 0 1 127008
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_19
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_20
timestamp 1669390400
transform 1 0 117824 0 1 87808
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_20
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_21
timestamp 1669390400
transform -1 0 38192 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_21
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_22
timestamp 1669390400
transform -1 0 2128 0 1 58016
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_22
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_23
timestamp 1669390400
transform -1 0 69440 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_23
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_24
timestamp 1669390400
transform -1 0 2128 0 -1 125440
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_24
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_25
timestamp 1669390400
transform -1 0 69776 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_25
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_26
timestamp 1669390400
transform 1 0 117824 0 -1 111328
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_26
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_27
timestamp 1669390400
transform -1 0 55664 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_27
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_28
timestamp 1669390400
transform 1 0 117824 0 1 67424
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_28
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_29
timestamp 1669390400
transform 1 0 117824 0 1 14112
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_29
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_30
timestamp 1669390400
transform -1 0 67760 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_30
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_31
timestamp 1669390400
transform 1 0 117824 0 1 31360
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_31
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_32
timestamp 1669390400
transform -1 0 63056 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_32
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_33
timestamp 1669390400
transform -1 0 61040 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_33
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_34
timestamp 1669390400
transform 1 0 117824 0 1 111328
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_34
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_35
timestamp 1669390400
transform 1 0 117824 0 -1 59584
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_35
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_36
timestamp 1669390400
transform 1 0 117824 0 -1 10976
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_36
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_37
timestamp 1669390400
transform 1 0 117824 0 1 25088
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_37
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_38
timestamp 1669390400
transform 1 0 117824 0 -1 4704
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_38
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_39
timestamp 1669390400
transform 1 0 117824 0 1 47040
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_39
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_40
timestamp 1669390400
transform 1 0 117824 0 1 116032
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_40
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_41
timestamp 1669390400
transform -1 0 7952 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_41
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_42
timestamp 1669390400
transform -1 0 53088 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_42
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_43
timestamp 1669390400
transform -1 0 11984 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_43
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_44
timestamp 1669390400
transform -1 0 10640 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_44
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_45
timestamp 1669390400
transform -1 0 2128 0 1 90944
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_45
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_46
timestamp 1669390400
transform -1 0 30128 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_46
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_47
timestamp 1669390400
transform -1 0 116144 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_47
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_48
timestamp 1669390400
transform 1 0 36064 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_48
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_49
timestamp 1669390400
transform -1 0 2128 0 -1 123872
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_49
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_50
timestamp 1669390400
transform 1 0 117824 0 -1 17248
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_50
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_51
timestamp 1669390400
transform -1 0 2128 0 -1 122304
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_51
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_52
timestamp 1669390400
transform 1 0 117824 0 1 95648
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_52
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_53
timestamp 1669390400
transform -1 0 40208 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_53
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_54
timestamp 1669390400
transform 1 0 117824 0 -1 39200
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_54
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_55
timestamp 1669390400
transform -1 0 89936 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_55
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_56
timestamp 1669390400
transform 1 0 117824 0 1 97216
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_56
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_57
timestamp 1669390400
transform -1 0 2128 0 -1 50176
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_57
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_58
timestamp 1669390400
transform -1 0 96208 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_58
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_59
timestamp 1669390400
transform -1 0 34832 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_59
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_60
timestamp 1669390400
transform -1 0 111888 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_60
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_61
timestamp 1669390400
transform 1 0 117824 0 1 17248
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_61
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_62
timestamp 1669390400
transform -1 0 13888 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_62
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_63
timestamp 1669390400
transform -1 0 8624 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_63
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_64
timestamp 1669390400
transform 1 0 117824 0 1 53312
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_64
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_65
timestamp 1669390400
transform -1 0 51632 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_65
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_66
timestamp 1669390400
transform -1 0 59696 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_66
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_67
timestamp 1669390400
transform -1 0 46256 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_67
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_68
timestamp 1669390400
transform -1 0 2128 0 -1 23520
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_68
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_69
timestamp 1669390400
transform -1 0 2128 0 -1 73696
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_69
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_70
timestamp 1669390400
transform -1 0 93968 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_70
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_71
timestamp 1669390400
transform -1 0 33488 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_71
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_72
timestamp 1669390400
transform -1 0 31472 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_72
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_73
timestamp 1669390400
transform -1 0 83216 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_73
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_74
timestamp 1669390400
transform -1 0 118160 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_74
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_75
timestamp 1669390400
transform -1 0 2128 0 -1 128576
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_75
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_76
timestamp 1669390400
transform -1 0 2128 0 -1 95648
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_76
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_77
timestamp 1669390400
transform -1 0 52192 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_77
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_78
timestamp 1669390400
transform 1 0 117824 0 -1 116032
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_78
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_79
timestamp 1669390400
transform -1 0 15344 0 1 3136
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_79
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_80
timestamp 1669390400
transform 1 0 117152 0 -1 4704
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_80
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_81
timestamp 1669390400
transform -1 0 20720 0 1 131712
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_81
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_82
timestamp 1669390400
transform 1 0 117824 0 1 20384
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_82
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_83
timestamp 1669390400
transform -1 0 2128 0 1 84672
box -86 -86 534 870
-use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_83
-timestamp 1669390400
-transform 1 0 117824 0 1 36064
-box -86 -86 534 870
use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_84
timestamp 1669390400
-transform -1 0 2128 0 -1 48608
+transform 1 0 117824 0 1 36064
box -86 -86 534 870
use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_85
timestamp 1669390400
@@ -70530,6 +70732,14 @@
timestamp 1669390400
transform -1 0 2128 0 -1 21952
box -86 -86 534 870
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_177
+timestamp 1669390400
+transform -1 0 65072 0 1 131712
+box -86 -86 534 870
+use gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_178
+timestamp 1669390400
+transform 1 0 117824 0 -1 84672
+box -86 -86 534 870
<< labels >>
flabel metal3 s 200 88704 800 88816 0 FreeSans 448 0 0 0 io_in[0]
port 0 nsew signal input
@@ -71381,8 +71591,12 @@
port 417 nsew signal input
rlabel metal1 59976 132496 59976 132496 0 vdd
rlabel metal1 59976 131712 59976 131712 0 vss
-rlabel metal2 64680 131992 64680 131992 0 net1
-rlabel metal2 47768 2030 47768 2030 0 net10
+rlabel metal2 2520 51912 2520 51912 0 _000_
+rlabel metal2 1904 77336 1904 77336 0 io_in[12]
+rlabel metal2 1960 52752 1960 52752 0 io_in[13]
+rlabel metal3 1358 47768 1358 47768 0 io_out[23]
+rlabel metal3 3304 52136 3304 52136 0 net1
+rlabel metal3 1302 92120 1302 92120 0 net10
rlabel metal2 26376 131992 26376 131992 0 net100
rlabel metal2 118104 57456 118104 57456 0 net101
rlabel metal3 1302 96152 1302 96152 0 net102
@@ -71393,7 +71607,7 @@
rlabel metal3 1302 63896 1302 63896 0 net107
rlabel metal2 117320 132216 117320 132216 0 net108
rlabel metal2 118104 90944 118104 90944 0 net109
-rlabel metal2 118104 60704 118104 60704 0 net11
+rlabel metal2 47768 2030 47768 2030 0 net11
rlabel metal2 1848 132552 1848 132552 0 net110
rlabel metal2 78680 2030 78680 2030 0 net111
rlabel metal3 1302 32984 1302 32984 0 net112
@@ -71404,7 +71618,7 @@
rlabel metal2 2520 133224 2520 133224 0 net117
rlabel metal2 37128 131992 37128 131992 0 net118
rlabel metal2 66136 132160 66136 132160 0 net119
-rlabel metal3 1302 109592 1302 109592 0 net12
+rlabel metal2 118104 60704 118104 60704 0 net12
rlabel metal2 109592 2030 109592 2030 0 net120
rlabel metal3 118706 41048 118706 41048 0 net121
rlabel metal2 116424 131992 116424 131992 0 net122
@@ -71415,7 +71629,7 @@
rlabel metal3 1302 130424 1302 130424 0 net127
rlabel metal2 118104 73584 118104 73584 0 net128
rlabel metal2 118104 1680 118104 1680 0 net129
-rlabel metal2 118104 79520 118104 79520 0 net13
+rlabel metal3 1302 109592 1302 109592 0 net13
rlabel metal3 1302 39032 1302 39032 0 net130
rlabel metal2 104328 131992 104328 131992 0 net131
rlabel metal2 118104 29232 118104 29232 0 net132
@@ -71426,7 +71640,7 @@
rlabel metal2 118104 106512 118104 106512 0 net137
rlabel metal2 23688 131992 23688 131992 0 net138
rlabel metal3 1302 82712 1302 82712 0 net139
-rlabel metal2 54600 131992 54600 131992 0 net14
+rlabel metal2 118104 79520 118104 79520 0 net14
rlabel metal2 118104 52752 118104 52752 0 net140
rlabel metal3 1302 25592 1302 25592 0 net141
rlabel metal2 100856 2030 100856 2030 0 net142
@@ -71437,7 +71651,7 @@
rlabel metal2 118104 103040 118104 103040 0 net147
rlabel metal2 77336 2030 77336 2030 0 net148
rlabel metal3 75824 131992 75824 131992 0 net149
-rlabel metal3 118706 113624 118706 113624 0 net15
+rlabel metal2 54600 131992 54600 131992 0 net15
rlabel metal2 74760 131992 74760 131992 0 net150
rlabel metal2 118104 82432 118104 82432 0 net151
rlabel metal2 2072 2030 2072 2030 0 net152
@@ -71448,7 +71662,7 @@
rlabel metal3 1302 35672 1302 35672 0 net157
rlabel metal3 1302 40376 1302 40376 0 net158
rlabel metal2 86072 2030 86072 2030 0 net159
-rlabel metal2 67928 1246 67928 1246 0 net16
+rlabel metal3 118706 113624 118706 113624 0 net16
rlabel metal2 56 2590 56 2590 0 net160
rlabel metal3 1302 61208 1302 61208 0 net161
rlabel metal3 1302 110936 1302 110936 0 net162
@@ -71459,7 +71673,7 @@
rlabel metal2 58632 131992 58632 131992 0 net167
rlabel metal2 29736 131992 29736 131992 0 net168
rlabel metal2 69944 2030 69944 2030 0 net169
-rlabel metal2 118104 26544 118104 26544 0 net17
+rlabel metal2 67928 1246 67928 1246 0 net17
rlabel metal2 80808 131992 80808 131992 0 net170
rlabel metal3 1638 83384 1638 83384 0 net171
rlabel metal2 118104 107744 118104 107744 0 net172
@@ -71467,86 +71681,88 @@
rlabel metal2 118104 68320 118104 68320 0 net174
rlabel metal3 1302 29624 1302 29624 0 net175
rlabel metal3 1302 20888 1302 20888 0 net176
-rlabel metal3 1302 127064 1302 127064 0 net18
-rlabel metal3 118706 88088 118706 88088 0 net19
-rlabel metal2 118104 84224 118104 84224 0 net2
-rlabel metal2 37688 2030 37688 2030 0 net20
-rlabel metal3 1302 57848 1302 57848 0 net21
-rlabel metal2 68600 2030 68600 2030 0 net22
-rlabel metal3 1302 124376 1302 124376 0 net23
-rlabel metal2 69384 131992 69384 131992 0 net24
-rlabel metal2 118104 110656 118104 110656 0 net25
-rlabel metal2 55160 2030 55160 2030 0 net26
-rlabel metal2 118104 67424 118104 67424 0 net27
-rlabel metal2 118104 14224 118104 14224 0 net28
-rlabel metal2 67368 131992 67368 131992 0 net29
-rlabel metal2 118104 45360 118104 45360 0 net3
-rlabel metal2 118104 31248 118104 31248 0 net30
-rlabel metal2 62552 2030 62552 2030 0 net31
-rlabel metal2 60648 131992 60648 131992 0 net32
-rlabel metal3 118706 111608 118706 111608 0 net33
-rlabel metal2 118104 58912 118104 58912 0 net34
-rlabel metal2 118104 10416 118104 10416 0 net35
-rlabel metal2 118104 25088 118104 25088 0 net36
-rlabel metal2 118104 4256 118104 4256 0 net37
-rlabel metal2 118104 47152 118104 47152 0 net38
-rlabel metal3 118706 116312 118706 116312 0 net39
-rlabel metal2 115528 133728 115528 133728 0 net4
-rlabel metal2 7448 2030 7448 2030 0 net40
-rlabel metal2 52472 2030 52472 2030 0 net41
-rlabel metal2 11592 131992 11592 131992 0 net42
-rlabel metal2 10248 131992 10248 131992 0 net43
-rlabel metal3 1302 90776 1302 90776 0 net44
-rlabel metal2 29624 2030 29624 2030 0 net45
-rlabel metal2 115640 2030 115640 2030 0 net46
-rlabel metal2 36344 133602 36344 133602 0 net47
-rlabel metal3 1302 123032 1302 123032 0 net48
-rlabel metal2 118104 16576 118104 16576 0 net49
-rlabel metal3 1302 7448 1302 7448 0 net5
-rlabel metal3 1302 121688 1302 121688 0 net50
-rlabel metal2 118104 95648 118104 95648 0 net51
-rlabel metal2 39816 131992 39816 131992 0 net52
-rlabel metal2 118104 38640 118104 38640 0 net53
-rlabel metal2 89544 131992 89544 131992 0 net54
-rlabel metal2 118104 97104 118104 97104 0 net55
-rlabel metal3 1302 49112 1302 49112 0 net56
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-rlabel metal2 34328 2030 34328 2030 0 net58
-rlabel metal2 110936 1302 110936 1302 0 net59
-rlabel metal3 118706 69272 118706 69272 0 net6
-rlabel metal3 118706 17528 118706 17528 0 net60
-rlabel metal2 13608 132328 13608 132328 0 net61
-rlabel metal2 8120 2030 8120 2030 0 net62
-rlabel metal2 118104 53368 118104 53368 0 net63
-rlabel metal2 51240 131992 51240 131992 0 net64
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-rlabel metal2 45864 131992 45864 131992 0 net66
-rlabel metal3 1302 22904 1302 22904 0 net67
-rlabel metal3 1302 72632 1302 72632 0 net68
-rlabel metal2 93464 2030 93464 2030 0 net69
-rlabel metal2 118104 76832 118104 76832 0 net7
-rlabel metal2 32984 2030 32984 2030 0 net70
-rlabel metal2 31080 131992 31080 131992 0 net71
-rlabel metal2 82712 2030 82712 2030 0 net72
-rlabel metal2 117768 131992 117768 131992 0 net73
-rlabel metal3 1302 127736 1302 127736 0 net74
-rlabel metal3 1302 94808 1302 94808 0 net75
-rlabel metal2 51800 2030 51800 2030 0 net76
-rlabel metal2 118104 115360 118104 115360 0 net77
-rlabel metal2 14840 2030 14840 2030 0 net78
-rlabel metal2 119672 2086 119672 2086 0 net79
-rlabel metal3 1302 4760 1302 4760 0 net8
-rlabel metal2 20328 131992 20328 131992 0 net80
-rlabel metal2 118104 20384 118104 20384 0 net81
-rlabel metal3 1302 84728 1302 84728 0 net82
-rlabel metal3 118706 36344 118706 36344 0 net83
-rlabel metal3 1302 47768 1302 47768 0 net84
+rlabel metal2 64680 131992 64680 131992 0 net177
+rlabel metal2 118104 84224 118104 84224 0 net178
+rlabel metal2 118104 26544 118104 26544 0 net18
+rlabel metal3 1302 127064 1302 127064 0 net19
+rlabel metal2 2856 52528 2856 52528 0 net2
+rlabel metal3 118706 88088 118706 88088 0 net20
+rlabel metal2 37688 2030 37688 2030 0 net21
+rlabel metal3 1302 57848 1302 57848 0 net22
+rlabel metal2 68600 2030 68600 2030 0 net23
+rlabel metal3 1302 124376 1302 124376 0 net24
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+rlabel metal2 118104 110656 118104 110656 0 net26
+rlabel metal2 55160 2030 55160 2030 0 net27
+rlabel metal2 118104 67424 118104 67424 0 net28
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+rlabel metal2 67368 131992 67368 131992 0 net30
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+rlabel metal2 60648 131992 60648 131992 0 net33
+rlabel metal3 118706 111608 118706 111608 0 net34
+rlabel metal2 118104 58912 118104 58912 0 net35
+rlabel metal2 118104 10416 118104 10416 0 net36
+rlabel metal2 118104 25088 118104 25088 0 net37
+rlabel metal2 118104 4256 118104 4256 0 net38
+rlabel metal2 118104 47152 118104 47152 0 net39
+rlabel metal2 118104 45360 118104 45360 0 net4
+rlabel metal3 118706 116312 118706 116312 0 net40
+rlabel metal2 7448 2030 7448 2030 0 net41
+rlabel metal2 52472 2030 52472 2030 0 net42
+rlabel metal2 11592 131992 11592 131992 0 net43
+rlabel metal2 10248 131992 10248 131992 0 net44
+rlabel metal3 1302 90776 1302 90776 0 net45
+rlabel metal2 29624 2030 29624 2030 0 net46
+rlabel metal2 115640 2030 115640 2030 0 net47
+rlabel metal2 36344 133602 36344 133602 0 net48
+rlabel metal3 1302 123032 1302 123032 0 net49
+rlabel metal2 115528 133728 115528 133728 0 net5
+rlabel metal2 118104 16576 118104 16576 0 net50
+rlabel metal3 1302 121688 1302 121688 0 net51
+rlabel metal2 118104 95648 118104 95648 0 net52
+rlabel metal2 39816 131992 39816 131992 0 net53
+rlabel metal2 118104 38640 118104 38640 0 net54
+rlabel metal2 89544 131992 89544 131992 0 net55
+rlabel metal2 118104 97104 118104 97104 0 net56
+rlabel metal3 1302 49112 1302 49112 0 net57
+rlabel metal2 95928 132328 95928 132328 0 net58
+rlabel metal2 34328 2030 34328 2030 0 net59
+rlabel metal3 1302 7448 1302 7448 0 net6
+rlabel metal2 110936 1302 110936 1302 0 net60
+rlabel metal3 118706 17528 118706 17528 0 net61
+rlabel metal2 13608 132328 13608 132328 0 net62
+rlabel metal2 8120 2030 8120 2030 0 net63
+rlabel metal2 118104 53368 118104 53368 0 net64
+rlabel metal2 51240 131992 51240 131992 0 net65
+rlabel metal2 59192 2030 59192 2030 0 net66
+rlabel metal2 45864 131992 45864 131992 0 net67
+rlabel metal3 1302 22904 1302 22904 0 net68
+rlabel metal3 1302 72632 1302 72632 0 net69
+rlabel metal3 118706 69272 118706 69272 0 net7
+rlabel metal2 93464 2030 93464 2030 0 net70
+rlabel metal2 32984 2030 32984 2030 0 net71
+rlabel metal2 31080 131992 31080 131992 0 net72
+rlabel metal2 82712 2030 82712 2030 0 net73
+rlabel metal2 117768 131992 117768 131992 0 net74
+rlabel metal3 1302 127736 1302 127736 0 net75
+rlabel metal3 1302 94808 1302 94808 0 net76
+rlabel metal2 51800 2030 51800 2030 0 net77
+rlabel metal2 118104 115360 118104 115360 0 net78
+rlabel metal2 14840 2030 14840 2030 0 net79
+rlabel metal2 118104 76832 118104 76832 0 net8
+rlabel metal2 119672 2086 119672 2086 0 net80
+rlabel metal2 20328 131992 20328 131992 0 net81
+rlabel metal2 118104 20384 118104 20384 0 net82
+rlabel metal3 1302 84728 1302 84728 0 net83
+rlabel metal3 118706 36344 118706 36344 0 net84
rlabel metal2 112280 854 112280 854 0 net85
rlabel metal2 118104 11872 118104 11872 0 net86
rlabel metal2 53816 2030 53816 2030 0 net87
rlabel metal2 43064 2030 43064 2030 0 net88
rlabel metal2 82152 131992 82152 131992 0 net89
-rlabel metal3 1302 92120 1302 92120 0 net9
+rlabel metal3 1302 4760 1302 4760 0 net9
rlabel metal2 87416 1302 87416 1302 0 net90
rlabel metal2 109032 131992 109032 131992 0 net91
rlabel metal2 45080 2030 45080 2030 0 net92
diff --git a/mag/user_project_wrapper.mag b/mag/user_project_wrapper.mag
index 4a36153..6b977f7 100644
--- a/mag/user_project_wrapper.mag
+++ b/mag/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech gf180mcuC
magscale 1 10
-timestamp 1670136213
+timestamp 1670142993
<< metal1 >>
rect 240706 232318 240718 232370
rect 240770 232318 240782 232370
diff --git a/maglef/tiny_user_project.mag b/maglef/tiny_user_project.mag
index f9fb5a2..e994027 100644
--- a/maglef/tiny_user_project.mag
+++ b/maglef/tiny_user_project.mag
@@ -1,7 +1,7 @@
magic
tech gf180mcuC
magscale 1 5
-timestamp 1670136120
+timestamp 1670142895
<< obsm1 >>
rect 672 855 59304 66345
<< metal2 >>
@@ -1993,8 +1993,8 @@
string FIXED_BBOX 0 0 60000 68000
string LEFclass BLOCK
string LEFview TRUE
-string GDS_END 1616322
-string GDS_FILE /home/runner/work/tiny_user_project/tiny_user_project/openlane/tiny_user_project/runs/22_12_04_06_40/results/signoff/tiny_user_project.magic.gds
-string GDS_START 48106
+string GDS_END 1637992
+string GDS_FILE /home/runner/work/tiny_user_project/tiny_user_project/openlane/tiny_user_project/runs/22_12_04_08_33/results/signoff/tiny_user_project.magic.gds
+string GDS_START 63906
<< end >>
diff --git a/maglef/user_project_wrapper.mag b/maglef/user_project_wrapper.mag
index 77d6d26..3158308 100644
--- a/maglef/user_project_wrapper.mag
+++ b/maglef/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech gf180mcuC
magscale 1 5
-timestamp 1670136217
+timestamp 1670142998
<< obsm1 >>
rect 120353 115879 179304 182345
<< metal2 >>
@@ -2206,8 +2206,8 @@
string FIXED_BBOX 0 0 298020 298020
string LEFclass BLOCK
string LEFview TRUE
-string GDS_END 4712098
-string GDS_FILE /home/runner/work/tiny_user_project/tiny_user_project/openlane/user_project_wrapper/runs/22_12_04_06_42/results/signoff/user_project_wrapper.magic.gds
-string GDS_START 1616376
+string GDS_END 4733768
+string GDS_FILE /home/runner/work/tiny_user_project/tiny_user_project/openlane/user_project_wrapper/runs/22_12_04_08_35/results/signoff/user_project_wrapper.magic.gds
+string GDS_START 1638046
<< end >>
diff --git a/sdc/tiny_user_project.sdc b/sdc/tiny_user_project.sdc
index bcd4cd2..e9d48c2 100644
--- a/sdc/tiny_user_project.sdc
+++ b/sdc/tiny_user_project.sdc
@@ -1,6 +1,6 @@
###############################################################################
# Created by write_sdc
-# Sun Dec 4 06:41:37 2022
+# Sun Dec 4 08:34:30 2022
###############################################################################
current_design tiny_user_project
###############################################################################
diff --git a/sdc/user_project_wrapper.sdc b/sdc/user_project_wrapper.sdc
index 136b4ca..55d410c 100644
--- a/sdc/user_project_wrapper.sdc
+++ b/sdc/user_project_wrapper.sdc
@@ -1,6 +1,6 @@
###############################################################################
# Created by write_sdc
-# Sun Dec 4 06:42:57 2022
+# Sun Dec 4 08:35:58 2022
###############################################################################
current_design user_project_wrapper
###############################################################################
diff --git a/sdf/multicorner/nom/user_project_wrapper.ff.sdf b/sdf/multicorner/nom/user_project_wrapper.ff.sdf
index 6f8a0a7..d87b667 100644
--- a/sdf/multicorner/nom/user_project_wrapper.ff.sdf
+++ b/sdf/multicorner/nom/user_project_wrapper.ff.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Sun Dec 4 06:43:30 2022")
+ (DATE "Sun Dec 4 08:36:30 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/nom/user_project_wrapper.ss.sdf b/sdf/multicorner/nom/user_project_wrapper.ss.sdf
index a0c8be3..581502c 100644
--- a/sdf/multicorner/nom/user_project_wrapper.ss.sdf
+++ b/sdf/multicorner/nom/user_project_wrapper.ss.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Sun Dec 4 06:43:30 2022")
+ (DATE "Sun Dec 4 08:36:30 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/multicorner/nom/user_project_wrapper.tt.sdf b/sdf/multicorner/nom/user_project_wrapper.tt.sdf
index b21920a..aa3d679 100644
--- a/sdf/multicorner/nom/user_project_wrapper.tt.sdf
+++ b/sdf/multicorner/nom/user_project_wrapper.tt.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Sun Dec 4 06:43:30 2022")
+ (DATE "Sun Dec 4 08:36:30 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/sdf/tiny_user_project.sdf b/sdf/tiny_user_project.sdf
index 591b389..6741a82 100644
--- a/sdf/tiny_user_project.sdf
+++ b/sdf/tiny_user_project.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "tiny_user_project")
- (DATE "Sun Dec 4 06:41:57 2022")
+ (DATE "Sun Dec 4 08:34:51 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
@@ -12,89 +12,92 @@
(INSTANCE)
(DELAY
(ABSOLUTE
- (INTERCONNECT tiny_user_project_2.ZN la_data_out[5] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_3.ZN la_data_out[6] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_4.ZN la_data_out[7] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_5.ZN la_data_out[8] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_6.ZN la_data_out[9] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_7.ZN la_data_out[10] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_8.ZN la_data_out[11] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_9.ZN la_data_out[12] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_10.ZN la_data_out[13] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_11.ZN la_data_out[14] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_12.ZN la_data_out[15] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_13.ZN la_data_out[16] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_14.ZN la_data_out[17] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_15.ZN la_data_out[18] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_16.ZN la_data_out[19] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_17.ZN la_data_out[20] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_18.ZN la_data_out[21] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_19.ZN la_data_out[22] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_20.ZN la_data_out[23] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_21.ZN la_data_out[24] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_22.ZN la_data_out[25] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_23.ZN la_data_out[26] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_24.ZN la_data_out[27] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_25.ZN la_data_out[28] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_26.ZN la_data_out[29] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_27.ZN la_data_out[30] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_28.ZN la_data_out[31] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_29.ZN la_data_out[32] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_30.ZN la_data_out[33] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_31.ZN la_data_out[34] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_32.ZN la_data_out[35] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_33.ZN la_data_out[36] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_34.ZN la_data_out[37] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_35.ZN la_data_out[38] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_36.ZN la_data_out[39] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_37.ZN la_data_out[40] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_38.ZN la_data_out[41] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_39.ZN la_data_out[42] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_40.ZN la_data_out[43] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_41.ZN la_data_out[44] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_42.ZN la_data_out[45] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_43.ZN la_data_out[46] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_44.ZN la_data_out[47] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_45.ZN la_data_out[48] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_46.ZN la_data_out[49] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_47.ZN la_data_out[50] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_48.ZN la_data_out[51] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_49.ZN la_data_out[52] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_50.ZN la_data_out[53] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_51.ZN la_data_out[54] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_52.ZN la_data_out[55] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_53.ZN la_data_out[56] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_54.ZN la_data_out[57] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_55.ZN la_data_out[58] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_56.ZN la_data_out[59] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_57.ZN la_data_out[60] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_58.ZN la_data_out[61] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_59.ZN la_data_out[62] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_60.ZN la_data_out[63] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_61.ZN io_out[0] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_62.ZN io_out[1] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_63.ZN io_out[2] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_64.ZN io_out[3] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_65.ZN io_out[4] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_66.ZN io_out[5] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_67.ZN io_out[6] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_68.ZN io_out[7] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_69.ZN io_out[8] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_70.ZN io_out[9] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_71.ZN io_out[10] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_72.ZN io_out[11] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_73.ZN io_out[12] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_74.ZN io_out[13] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_75.ZN io_out[14] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_76.ZN io_out[15] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_77.ZN io_out[16] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_78.ZN io_out[17] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_79.ZN io_out[18] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_80.ZN io_out[19] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_81.ZN io_out[20] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_82.ZN io_out[21] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_83.ZN io_out[22] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_84.ZN io_out[23] (0.000:0.000:0.000))
+ (INTERCONNECT io_in[12] input1.I (0.047:0.047:0.047) (0.029:0.029:0.029))
+ (INTERCONNECT io_in[12] ANTENNA_input1_I.I (0.047:0.047:0.047) (0.029:0.029:0.029))
+ (INTERCONNECT io_in[13] input2.I (0.050:0.050:0.050) (0.031:0.031:0.031))
+ (INTERCONNECT io_in[13] ANTENNA_input2_I.I (0.050:0.050:0.050) (0.031:0.031:0.031))
+ (INTERCONNECT _001_.ZN _002_.I (0.000:0.000:0.000))
+ (INTERCONNECT _002_.Z output3.I (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_5.ZN la_data_out[7] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_6.ZN la_data_out[8] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_7.ZN la_data_out[9] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_8.ZN la_data_out[10] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_9.ZN la_data_out[11] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_10.ZN la_data_out[12] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_11.ZN la_data_out[13] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_12.ZN la_data_out[14] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_13.ZN la_data_out[15] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_14.ZN la_data_out[16] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_15.ZN la_data_out[17] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_16.ZN la_data_out[18] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_17.ZN la_data_out[19] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_18.ZN la_data_out[20] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_19.ZN la_data_out[21] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_20.ZN la_data_out[22] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_21.ZN la_data_out[23] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_22.ZN la_data_out[24] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_23.ZN la_data_out[25] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_24.ZN la_data_out[26] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_25.ZN la_data_out[27] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_26.ZN la_data_out[28] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_27.ZN la_data_out[29] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_28.ZN la_data_out[30] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_29.ZN la_data_out[31] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_30.ZN la_data_out[32] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_31.ZN la_data_out[33] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_32.ZN la_data_out[34] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_33.ZN la_data_out[35] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_34.ZN la_data_out[36] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_35.ZN la_data_out[37] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_36.ZN la_data_out[38] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_37.ZN la_data_out[39] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_38.ZN la_data_out[40] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_39.ZN la_data_out[41] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_40.ZN la_data_out[42] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_41.ZN la_data_out[43] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_42.ZN la_data_out[44] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_43.ZN la_data_out[45] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_44.ZN la_data_out[46] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_45.ZN la_data_out[47] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_46.ZN la_data_out[48] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_47.ZN la_data_out[49] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_48.ZN la_data_out[50] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_49.ZN la_data_out[51] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_50.ZN la_data_out[52] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_51.ZN la_data_out[53] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_52.ZN la_data_out[54] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_53.ZN la_data_out[55] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_54.ZN la_data_out[56] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_55.ZN la_data_out[57] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_56.ZN la_data_out[58] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_57.ZN la_data_out[59] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_58.ZN la_data_out[60] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_59.ZN la_data_out[61] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_60.ZN la_data_out[62] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_61.ZN la_data_out[63] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_62.ZN io_out[0] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_63.ZN io_out[1] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_64.ZN io_out[2] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_65.ZN io_out[3] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_66.ZN io_out[4] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_67.ZN io_out[5] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_68.ZN io_out[6] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_69.ZN io_out[7] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_70.ZN io_out[8] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_71.ZN io_out[9] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_72.ZN io_out[10] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_73.ZN io_out[11] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_74.ZN io_out[12] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_75.ZN io_out[13] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_76.ZN io_out[14] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_77.ZN io_out[15] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_78.ZN io_out[16] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_79.ZN io_out[17] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_80.ZN io_out[18] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_81.ZN io_out[19] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_82.ZN io_out[20] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_83.ZN io_out[21] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_84.ZN io_out[22] (0.000:0.000:0.000))
(INTERCONNECT tiny_user_project_85.ZN io_out[24] (0.000:0.000:0.000))
(INTERCONNECT tiny_user_project_86.ZN io_out[25] (0.000:0.000:0.000))
(INTERCONNECT tiny_user_project_87.ZN io_out[26] (0.000:0.000:0.000))
@@ -187,7 +190,61 @@
(INTERCONNECT tiny_user_project_174.ZN la_data_out[1] (0.000:0.000:0.000))
(INTERCONNECT tiny_user_project_175.ZN la_data_out[2] (0.000:0.000:0.000))
(INTERCONNECT tiny_user_project_176.ZN la_data_out[3] (0.000:0.000:0.000))
- (INTERCONNECT tiny_user_project_1.ZN la_data_out[4] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_177.ZN la_data_out[4] (0.000:0.000:0.000))
+ (INTERCONNECT tiny_user_project_178.ZN la_data_out[5] (0.000:0.000:0.000))
+ (INTERCONNECT input1.Z _001_.A1 (0.001:0.001:0.001) (0.001:0.001:0.001))
+ (INTERCONNECT input1.Z ANTENNA__001__A1.I (0.001:0.001:0.001) (0.001:0.001:0.001))
+ (INTERCONNECT input2.Z _001_.A2 (0.000:0.000:0.000))
+ (INTERCONNECT output3.Z io_out[23] (0.001:0.001:0.001) (0.001:0.001:0.001))
+ (INTERCONNECT tiny_user_project_4.ZN la_data_out[6] (0.000:0.000:0.000))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "gf180mcu_fd_sc_mcu7t5v0__xnor2_1")
+ (INSTANCE _001_)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH A1 ZN (0.380:0.380:0.380) (0.417:0.417:0.417))
+ (IOPATH A1 ZN (0.285:0.285:0.285) (0.137:0.137:0.137))
+ (IOPATH A2 ZN (0.374:0.374:0.374) (0.339:0.339:0.339))
+ (IOPATH A2 ZN (0.258:0.258:0.258) (0.146:0.146:0.146))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "gf180mcu_fd_sc_mcu7t5v0__clkbuf_1")
+ (INSTANCE _002_)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH I Z (0.258:0.264:0.269) (0.241:0.246:0.251))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "gf180mcu_fd_sc_mcu7t5v0__dlyb_1")
+ (INSTANCE input1)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH I Z (1.036:1.036:1.036) (1.113:1.113:1.113))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "gf180mcu_fd_sc_mcu7t5v0__dlyb_1")
+ (INSTANCE input2)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH I Z (0.910:0.910:0.910) (0.994:0.994:0.994))
+ )
+ )
+ )
+ (CELL
+ (CELLTYPE "gf180mcu_fd_sc_mcu7t5v0__clkbuf_3")
+ (INSTANCE output3)
+ (DELAY
+ (ABSOLUTE
+ (IOPATH I Z (0.415:0.415:0.415) (0.425:0.425:0.426))
)
)
)
diff --git a/sdf/user_project_wrapper.sdf b/sdf/user_project_wrapper.sdf
index 5c9c043..d531a36 100644
--- a/sdf/user_project_wrapper.sdf
+++ b/sdf/user_project_wrapper.sdf
@@ -1,7 +1,7 @@
(DELAYFILE
(SDFVERSION "3.0")
(DESIGN "user_project_wrapper")
- (DATE "Sun Dec 4 06:43:32 2022")
+ (DATE "Sun Dec 4 08:36:32 2022")
(VENDOR "Parallax")
(PROGRAM "STA")
(VERSION "2.3.2")
diff --git a/signoff/tiny_user_project/metrics.csv b/signoff/tiny_user_project/metrics.csv
index 80cbaea..851f80a 100644
--- a/signoff/tiny_user_project/metrics.csv
+++ b/signoff/tiny_user_project/metrics.csv
@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
-/home/runner/work/tiny_user_project/tiny_user_project/openlane/tiny_user_project,tiny_user_project,22_12_04_06_40,flow completed,0h1m56s0ms,0h1m5s0ms,215.68627450980392,1.632,107.84313725490196,0.42,558.36,176,0,0,0,0,0,0,0,-1,0,-1,-1,2144,288,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,5722231.0,0.0,0.19,0.14,0.0,-1,0.11,41,453,41,453,0,0,0,0,0,0,0,0,0,0,0,0,-1,-1,-1,330,2421,0,2751,379231.776,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,24.0,41.666666666666664,24,AREA 0,4,50,1,153.6,153.18,0.7,0.3,gf180mcu_fd_sc_mcu7t5v0,4
+/home/runner/work/tiny_user_project/tiny_user_project/openlane/tiny_user_project,tiny_user_project,22_12_04_08_33,flow completed,0h2m4s0ms,0h1m5s0ms,216.91176470588238,1.632,108.45588235294119,0.43,569.28,177,0,0,0,0,0,0,0,-1,0,-1,-1,2324,303,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,6072364.0,0.0,0.23,0.15,0.0,-1,0.13,29,444,29,444,0,0,0,1,0,0,0,0,0,0,1,0,2,1,2,330,2421,0,2751,379231.776,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,24.0,41.666666666666664,24,AREA 0,4,50,1,153.6,153.18,0.7,0.3,gf180mcu_fd_sc_mcu7t5v0,4
diff --git a/signoff/user_project_wrapper/metrics.csv b/signoff/user_project_wrapper/metrics.csv
index 385e0a2..8e9bd19 100644
--- a/signoff/user_project_wrapper/metrics.csv
+++ b/signoff/user_project_wrapper/metrics.csv
@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GRT_ADJUSTMENT,STD_CELL_LIBRARY,DIODE_INSERTION_STRATEGY
-/home/runner/work/tiny_user_project/tiny_user_project/openlane/user_project_wrapper,user_project_wrapper,22_12_04_06_42,flow completed,0h1m38s0ms,0h0m42s0ms,-2.0,-1,-1,-1,561.71,1,0,0,0,0,0,0,0,-1,0,-1,-1,965916,1925,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,0.0,-1,0.0,6.1,4.33,0.09,-1,3.52,18,416,18,416,0,0,0,1,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,8724457.9968,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,24.0,41.666666666666664,24,AREA 0,10,50,1,90,90,0.55,0.3,gf180mcu_fd_sc_mcu7t5v0,0
+/home/runner/work/tiny_user_project/tiny_user_project/openlane/user_project_wrapper,user_project_wrapper,22_12_04_08_35,flow completed,0h1m46s0ms,0h0m42s0ms,-2.0,-1,-1,-1,561.79,1,0,0,0,0,0,0,0,-1,0,-1,-1,965916,1925,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,0.0,-1,0.0,6.1,4.33,0.09,-1,3.52,18,416,18,416,0,0,0,1,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,8724457.9968,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,24.0,41.666666666666664,24,AREA 0,10,50,1,90,90,0.55,0.3,gf180mcu_fd_sc_mcu7t5v0,0
diff --git a/spef/tiny_user_project.spef b/spef/tiny_user_project.spef
index f4fb53c..17328a6 100644
--- a/spef/tiny_user_project.spef
+++ b/spef/tiny_user_project.spef
@@ -90,29 +90,29 @@
*74 net106
*75 net107
*76 net108
-*77 net61
-*78 net71
-*79 net72
-*80 net73
-*81 net74
-*82 net75
-*83 net76
-*84 net77
-*85 net78
-*86 net79
-*87 net80
-*88 net62
-*89 net81
-*90 net82
-*91 net83
-*92 net84
+*77 net62
+*78 net72
+*79 net73
+*80 net74
+*81 net75
+*82 net76
+*83 net77
+*84 net78
+*85 net79
+*86 net80
+*87 net81
+*88 net63
+*89 net82
+*90 net83
+*91 net84
+*92 io_out[23]
*93 net85
*94 net86
*95 net87
*96 net88
*97 net89
*98 net90
-*99 net63
+*99 net64
*100 net91
*101 net92
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@@ -121,13 +121,13 @@
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*115 la_data_in[0]
*116 la_data_in[10]
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@@ -193,69 +193,69 @@
*177 la_data_in[8]
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@@ -430,10753 +430,10782 @@
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-*8514 PHY_5
-*8515 PHY_50
-*8516 PHY_51
-*8517 PHY_52
-*8518 PHY_53
-*8519 PHY_54
-*8520 PHY_55
-*8521 PHY_56
-*8522 PHY_57
-*8523 PHY_58
-*8524 PHY_59
-*8525 PHY_6
-*8526 PHY_60
-*8527 PHY_61
-*8528 PHY_62
-*8529 PHY_63
-*8530 PHY_64
-*8531 PHY_65
-*8532 PHY_66
-*8533 PHY_67
-*8534 PHY_68
-*8535 PHY_69
-*8536 PHY_7
-*8537 PHY_70
-*8538 PHY_71
-*8539 PHY_72
-*8540 PHY_73
-*8541 PHY_74
-*8542 PHY_75
-*8543 PHY_76
-*8544 PHY_77
-*8545 PHY_78
-*8546 PHY_79
-*8547 PHY_8
-*8548 PHY_80
-*8549 PHY_81
-*8550 PHY_82
-*8551 PHY_83
-*8552 PHY_84
-*8553 PHY_85
-*8554 PHY_86
-*8555 PHY_87
-*8556 PHY_88
-*8557 PHY_89
-*8558 PHY_9
-*8559 PHY_90
-*8560 PHY_91
-*8561 PHY_92
-*8562 PHY_93
-*8563 PHY_94
-*8564 PHY_95
-*8565 PHY_96
-*8566 PHY_97
-*8567 PHY_98
-*8568 PHY_99
-*8569 TAP_1000
-*8570 TAP_1001
-*8571 TAP_1002
-*8572 TAP_1003
-*8573 TAP_1004
-*8574 TAP_1005
-*8575 TAP_1006
-*8576 TAP_1007
-*8577 TAP_1008
-*8578 TAP_1009
-*8579 TAP_1010
-*8580 TAP_1011
-*8581 TAP_1012
-*8582 TAP_1013
-*8583 TAP_1014
-*8584 TAP_1015
-*8585 TAP_1016
-*8586 TAP_1017
-*8587 TAP_1018
-*8588 TAP_1019
-*8589 TAP_1020
-*8590 TAP_1021
-*8591 TAP_1022
-*8592 TAP_1023
-*8593 TAP_1024
-*8594 TAP_1025
-*8595 TAP_1026
-*8596 TAP_1027
-*8597 TAP_1028
-*8598 TAP_1029
-*8599 TAP_1030
-*8600 TAP_1031
-*8601 TAP_1032
-*8602 TAP_1033
-*8603 TAP_1034
-*8604 TAP_1035
-*8605 TAP_1036
-*8606 TAP_1037
-*8607 TAP_1038
-*8608 TAP_1039
-*8609 TAP_1040
-*8610 TAP_1041
-*8611 TAP_1042
-*8612 TAP_1043
-*8613 TAP_1044
-*8614 TAP_1045
-*8615 TAP_1046
-*8616 TAP_1047
-*8617 TAP_1048
-*8618 TAP_1049
-*8619 TAP_1050
-*8620 TAP_1051
-*8621 TAP_1052
-*8622 TAP_1053
-*8623 TAP_1054
-*8624 TAP_1055
-*8625 TAP_1056
-*8626 TAP_1057
-*8627 TAP_1058
-*8628 TAP_1059
-*8629 TAP_1060
-*8630 TAP_1061
-*8631 TAP_1062
-*8632 TAP_1063
-*8633 TAP_1064
-*8634 TAP_1065
-*8635 TAP_1066
-*8636 TAP_1067
-*8637 TAP_1068
-*8638 TAP_1069
-*8639 TAP_1070
-*8640 TAP_1071
-*8641 TAP_1072
-*8642 TAP_1073
-*8643 TAP_1074
-*8644 TAP_1075
-*8645 TAP_1076
-*8646 TAP_1077
-*8647 TAP_1078
-*8648 TAP_1079
-*8649 TAP_1080
-*8650 TAP_1081
-*8651 TAP_1082
-*8652 TAP_1083
-*8653 TAP_1084
-*8654 TAP_1085
-*8655 TAP_1086
-*8656 TAP_1087
-*8657 TAP_1088
-*8658 TAP_1089
-*8659 TAP_1090
-*8660 TAP_1091
-*8661 TAP_1092
-*8662 TAP_1093
-*8663 TAP_1094
-*8664 TAP_1095
-*8665 TAP_1096
-*8666 TAP_1097
-*8667 TAP_1098
-*8668 TAP_1099
-*8669 TAP_1100
-*8670 TAP_1101
-*8671 TAP_1102
-*8672 TAP_1103
-*8673 TAP_1104
-*8674 TAP_1105
-*8675 TAP_1106
-*8676 TAP_1107
-*8677 TAP_1108
-*8678 TAP_1109
-*8679 TAP_1110
-*8680 TAP_1111
-*8681 TAP_1112
-*8682 TAP_1113
-*8683 TAP_1114
-*8684 TAP_1115
-*8685 TAP_1116
-*8686 TAP_1117
-*8687 TAP_1118
-*8688 TAP_1119
-*8689 TAP_1120
-*8690 TAP_1121
-*8691 TAP_1122
-*8692 TAP_1123
-*8693 TAP_1124
-*8694 TAP_1125
-*8695 TAP_1126
-*8696 TAP_1127
-*8697 TAP_1128
-*8698 TAP_1129
-*8699 TAP_1130
-*8700 TAP_1131
-*8701 TAP_1132
-*8702 TAP_1133
-*8703 TAP_1134
-*8704 TAP_1135
-*8705 TAP_1136
-*8706 TAP_1137
-*8707 TAP_1138
-*8708 TAP_1139
-*8709 TAP_1140
-*8710 TAP_1141
-*8711 TAP_1142
-*8712 TAP_1143
-*8713 TAP_1144
-*8714 TAP_1145
-*8715 TAP_1146
-*8716 TAP_1147
-*8717 TAP_1148
-*8718 TAP_1149
-*8719 TAP_1150
-*8720 TAP_1151
-*8721 TAP_1152
-*8722 TAP_1153
-*8723 TAP_1154
-*8724 TAP_1155
-*8725 TAP_1156
-*8726 TAP_1157
-*8727 TAP_1158
-*8728 TAP_1159
-*8729 TAP_1160
-*8730 TAP_1161
-*8731 TAP_1162
-*8732 TAP_1163
-*8733 TAP_1164
-*8734 TAP_1165
-*8735 TAP_1166
-*8736 TAP_1167
-*8737 TAP_1168
-*8738 TAP_1169
-*8739 TAP_1170
-*8740 TAP_1171
-*8741 TAP_1172
-*8742 TAP_1173
-*8743 TAP_1174
-*8744 TAP_1175
-*8745 TAP_1176
-*8746 TAP_1177
-*8747 TAP_1178
-*8748 TAP_1179
-*8749 TAP_1180
-*8750 TAP_1181
-*8751 TAP_1182
-*8752 TAP_1183
-*8753 TAP_1184
-*8754 TAP_1185
-*8755 TAP_1186
-*8756 TAP_1187
-*8757 TAP_1188
-*8758 TAP_1189
-*8759 TAP_1190
-*8760 TAP_1191
-*8761 TAP_1192
-*8762 TAP_1193
-*8763 TAP_1194
-*8764 TAP_1195
-*8765 TAP_1196
-*8766 TAP_1197
-*8767 TAP_1198
-*8768 TAP_1199
-*8769 TAP_1200
-*8770 TAP_1201
-*8771 TAP_1202
-*8772 TAP_1203
-*8773 TAP_1204
-*8774 TAP_1205
-*8775 TAP_1206
-*8776 TAP_1207
-*8777 TAP_1208
-*8778 TAP_1209
-*8779 TAP_1210
-*8780 TAP_1211
-*8781 TAP_1212
-*8782 TAP_1213
-*8783 TAP_1214
-*8784 TAP_1215
-*8785 TAP_1216
-*8786 TAP_1217
-*8787 TAP_1218
-*8788 TAP_1219
-*8789 TAP_1220
-*8790 TAP_1221
-*8791 TAP_1222
-*8792 TAP_1223
-*8793 TAP_1224
-*8794 TAP_1225
-*8795 TAP_1226
-*8796 TAP_1227
-*8797 TAP_1228
-*8798 TAP_1229
-*8799 TAP_1230
-*8800 TAP_1231
-*8801 TAP_1232
-*8802 TAP_1233
-*8803 TAP_1234
-*8804 TAP_1235
-*8805 TAP_1236
-*8806 TAP_1237
-*8807 TAP_1238
-*8808 TAP_1239
-*8809 TAP_1240
-*8810 TAP_1241
-*8811 TAP_1242
-*8812 TAP_1243
-*8813 TAP_1244
-*8814 TAP_1245
-*8815 TAP_1246
-*8816 TAP_1247
-*8817 TAP_1248
-*8818 TAP_1249
-*8819 TAP_1250
-*8820 TAP_1251
-*8821 TAP_1252
-*8822 TAP_1253
-*8823 TAP_1254
-*8824 TAP_1255
-*8825 TAP_1256
-*8826 TAP_1257
-*8827 TAP_1258
-*8828 TAP_1259
-*8829 TAP_1260
-*8830 TAP_1261
-*8831 TAP_1262
-*8832 TAP_1263
-*8833 TAP_1264
-*8834 TAP_1265
-*8835 TAP_1266
-*8836 TAP_1267
-*8837 TAP_1268
-*8838 TAP_1269
-*8839 TAP_1270
-*8840 TAP_1271
-*8841 TAP_1272
-*8842 TAP_1273
-*8843 TAP_1274
-*8844 TAP_1275
-*8845 TAP_1276
-*8846 TAP_1277
-*8847 TAP_1278
-*8848 TAP_1279
-*8849 TAP_1280
-*8850 TAP_1281
-*8851 TAP_1282
-*8852 TAP_1283
-*8853 TAP_1284
-*8854 TAP_1285
-*8855 TAP_1286
-*8856 TAP_1287
-*8857 TAP_1288
-*8858 TAP_1289
-*8859 TAP_1290
-*8860 TAP_1291
-*8861 TAP_1292
-*8862 TAP_1293
-*8863 TAP_1294
-*8864 TAP_1295
-*8865 TAP_1296
-*8866 TAP_1297
-*8867 TAP_1298
-*8868 TAP_1299
-*8869 TAP_1300
-*8870 TAP_1301
-*8871 TAP_1302
-*8872 TAP_1303
-*8873 TAP_1304
-*8874 TAP_1305
-*8875 TAP_1306
-*8876 TAP_1307
-*8877 TAP_1308
-*8878 TAP_1309
-*8879 TAP_1310
-*8880 TAP_1311
-*8881 TAP_1312
-*8882 TAP_1313
-*8883 TAP_1314
-*8884 TAP_1315
-*8885 TAP_1316
-*8886 TAP_1317
-*8887 TAP_1318
-*8888 TAP_1319
-*8889 TAP_1320
-*8890 TAP_1321
-*8891 TAP_1322
-*8892 TAP_1323
-*8893 TAP_1324
-*8894 TAP_1325
-*8895 TAP_1326
-*8896 TAP_1327
-*8897 TAP_1328
-*8898 TAP_1329
-*8899 TAP_1330
-*8900 TAP_1331
-*8901 TAP_1332
-*8902 TAP_1333
-*8903 TAP_1334
-*8904 TAP_1335
-*8905 TAP_1336
-*8906 TAP_1337
-*8907 TAP_1338
-*8908 TAP_1339
-*8909 TAP_1340
-*8910 TAP_1341
-*8911 TAP_1342
-*8912 TAP_1343
-*8913 TAP_1344
-*8914 TAP_1345
-*8915 TAP_1346
-*8916 TAP_1347
-*8917 TAP_1348
-*8918 TAP_1349
-*8919 TAP_1350
-*8920 TAP_1351
-*8921 TAP_1352
-*8922 TAP_1353
-*8923 TAP_1354
-*8924 TAP_1355
-*8925 TAP_1356
-*8926 TAP_1357
-*8927 TAP_1358
-*8928 TAP_1359
-*8929 TAP_1360
-*8930 TAP_1361
-*8931 TAP_1362
-*8932 TAP_1363
-*8933 TAP_1364
-*8934 TAP_1365
-*8935 TAP_1366
-*8936 TAP_1367
-*8937 TAP_1368
-*8938 TAP_1369
-*8939 TAP_1370
-*8940 TAP_1371
-*8941 TAP_1372
-*8942 TAP_1373
-*8943 TAP_1374
-*8944 TAP_1375
-*8945 TAP_1376
-*8946 TAP_1377
-*8947 TAP_1378
-*8948 TAP_1379
-*8949 TAP_1380
-*8950 TAP_1381
-*8951 TAP_1382
-*8952 TAP_1383
-*8953 TAP_1384
-*8954 TAP_1385
-*8955 TAP_1386
-*8956 TAP_1387
-*8957 TAP_1388
-*8958 TAP_1389
-*8959 TAP_1390
-*8960 TAP_1391
-*8961 TAP_1392
-*8962 TAP_1393
-*8963 TAP_1394
-*8964 TAP_1395
-*8965 TAP_1396
-*8966 TAP_1397
-*8967 TAP_1398
-*8968 TAP_1399
-*8969 TAP_1400
-*8970 TAP_1401
-*8971 TAP_1402
-*8972 TAP_1403
-*8973 TAP_1404
-*8974 TAP_1405
-*8975 TAP_1406
-*8976 TAP_1407
-*8977 TAP_1408
-*8978 TAP_1409
-*8979 TAP_1410
-*8980 TAP_1411
-*8981 TAP_1412
-*8982 TAP_1413
-*8983 TAP_1414
-*8984 TAP_1415
-*8985 TAP_1416
-*8986 TAP_1417
-*8987 TAP_1418
-*8988 TAP_1419
-*8989 TAP_1420
-*8990 TAP_1421
-*8991 TAP_1422
-*8992 TAP_1423
-*8993 TAP_1424
-*8994 TAP_1425
-*8995 TAP_1426
-*8996 TAP_1427
-*8997 TAP_1428
-*8998 TAP_1429
-*8999 TAP_1430
-*9000 TAP_1431
-*9001 TAP_1432
-*9002 TAP_1433
-*9003 TAP_1434
-*9004 TAP_1435
-*9005 TAP_1436
-*9006 TAP_1437
-*9007 TAP_1438
-*9008 TAP_1439
-*9009 TAP_1440
-*9010 TAP_1441
-*9011 TAP_1442
-*9012 TAP_1443
-*9013 TAP_1444
-*9014 TAP_1445
-*9015 TAP_1446
-*9016 TAP_1447
-*9017 TAP_1448
-*9018 TAP_1449
-*9019 TAP_1450
-*9020 TAP_1451
-*9021 TAP_1452
-*9022 TAP_1453
-*9023 TAP_1454
-*9024 TAP_1455
-*9025 TAP_1456
-*9026 TAP_1457
-*9027 TAP_1458
-*9028 TAP_1459
-*9029 TAP_1460
-*9030 TAP_1461
-*9031 TAP_1462
-*9032 TAP_1463
-*9033 TAP_1464
-*9034 TAP_1465
-*9035 TAP_1466
-*9036 TAP_1467
-*9037 TAP_1468
-*9038 TAP_1469
-*9039 TAP_1470
-*9040 TAP_1471
-*9041 TAP_1472
-*9042 TAP_1473
-*9043 TAP_1474
-*9044 TAP_1475
-*9045 TAP_1476
-*9046 TAP_1477
-*9047 TAP_1478
-*9048 TAP_1479
-*9049 TAP_1480
-*9050 TAP_1481
-*9051 TAP_1482
-*9052 TAP_1483
-*9053 TAP_1484
-*9054 TAP_1485
-*9055 TAP_1486
-*9056 TAP_1487
-*9057 TAP_1488
-*9058 TAP_1489
-*9059 TAP_1490
-*9060 TAP_1491
-*9061 TAP_1492
-*9062 TAP_1493
-*9063 TAP_1494
-*9064 TAP_1495
-*9065 TAP_1496
-*9066 TAP_1497
-*9067 TAP_1498
-*9068 TAP_1499
-*9069 TAP_1500
-*9070 TAP_1501
-*9071 TAP_1502
-*9072 TAP_1503
-*9073 TAP_1504
-*9074 TAP_1505
-*9075 TAP_1506
-*9076 TAP_1507
-*9077 TAP_1508
-*9078 TAP_1509
-*9079 TAP_1510
-*9080 TAP_1511
-*9081 TAP_1512
-*9082 TAP_1513
-*9083 TAP_1514
-*9084 TAP_1515
-*9085 TAP_1516
-*9086 TAP_1517
-*9087 TAP_1518
-*9088 TAP_1519
-*9089 TAP_1520
-*9090 TAP_1521
-*9091 TAP_1522
-*9092 TAP_1523
-*9093 TAP_1524
-*9094 TAP_1525
-*9095 TAP_1526
-*9096 TAP_1527
-*9097 TAP_1528
-*9098 TAP_1529
-*9099 TAP_1530
-*9100 TAP_1531
-*9101 TAP_1532
-*9102 TAP_1533
-*9103 TAP_1534
-*9104 TAP_1535
-*9105 TAP_1536
-*9106 TAP_1537
-*9107 TAP_1538
-*9108 TAP_1539
-*9109 TAP_1540
-*9110 TAP_1541
-*9111 TAP_1542
-*9112 TAP_1543
-*9113 TAP_1544
-*9114 TAP_1545
-*9115 TAP_1546
-*9116 TAP_1547
-*9117 TAP_1548
-*9118 TAP_1549
-*9119 TAP_1550
-*9120 TAP_1551
-*9121 TAP_1552
-*9122 TAP_1553
-*9123 TAP_1554
-*9124 TAP_1555
-*9125 TAP_1556
-*9126 TAP_1557
-*9127 TAP_1558
-*9128 TAP_1559
-*9129 TAP_1560
-*9130 TAP_1561
-*9131 TAP_1562
-*9132 TAP_1563
-*9133 TAP_1564
-*9134 TAP_1565
-*9135 TAP_1566
-*9136 TAP_1567
-*9137 TAP_1568
-*9138 TAP_1569
-*9139 TAP_1570
-*9140 TAP_1571
-*9141 TAP_1572
-*9142 TAP_1573
-*9143 TAP_1574
-*9144 TAP_1575
-*9145 TAP_1576
-*9146 TAP_1577
-*9147 TAP_1578
-*9148 TAP_1579
-*9149 TAP_1580
-*9150 TAP_1581
-*9151 TAP_1582
-*9152 TAP_1583
-*9153 TAP_1584
-*9154 TAP_1585
-*9155 TAP_1586
-*9156 TAP_1587
-*9157 TAP_1588
-*9158 TAP_1589
-*9159 TAP_1590
-*9160 TAP_1591
-*9161 TAP_1592
-*9162 TAP_1593
-*9163 TAP_1594
-*9164 TAP_1595
-*9165 TAP_1596
-*9166 TAP_1597
-*9167 TAP_1598
-*9168 TAP_1599
-*9169 TAP_1600
-*9170 TAP_1601
-*9171 TAP_1602
-*9172 TAP_1603
-*9173 TAP_1604
-*9174 TAP_1605
-*9175 TAP_1606
-*9176 TAP_1607
-*9177 TAP_1608
-*9178 TAP_1609
-*9179 TAP_1610
-*9180 TAP_1611
-*9181 TAP_1612
-*9182 TAP_1613
-*9183 TAP_1614
-*9184 TAP_1615
-*9185 TAP_1616
-*9186 TAP_1617
-*9187 TAP_1618
-*9188 TAP_1619
-*9189 TAP_1620
-*9190 TAP_1621
-*9191 TAP_1622
-*9192 TAP_1623
-*9193 TAP_1624
-*9194 TAP_1625
-*9195 TAP_1626
-*9196 TAP_1627
-*9197 TAP_1628
-*9198 TAP_1629
-*9199 TAP_1630
-*9200 TAP_1631
-*9201 TAP_1632
-*9202 TAP_1633
-*9203 TAP_1634
-*9204 TAP_1635
-*9205 TAP_1636
-*9206 TAP_1637
-*9207 TAP_1638
-*9208 TAP_1639
-*9209 TAP_1640
-*9210 TAP_1641
-*9211 TAP_1642
-*9212 TAP_1643
-*9213 TAP_1644
-*9214 TAP_1645
-*9215 TAP_1646
-*9216 TAP_1647
-*9217 TAP_1648
-*9218 TAP_1649
-*9219 TAP_1650
-*9220 TAP_1651
-*9221 TAP_1652
-*9222 TAP_1653
-*9223 TAP_1654
-*9224 TAP_1655
-*9225 TAP_1656
-*9226 TAP_1657
-*9227 TAP_1658
-*9228 TAP_1659
-*9229 TAP_1660
-*9230 TAP_1661
-*9231 TAP_1662
-*9232 TAP_1663
-*9233 TAP_1664
-*9234 TAP_1665
-*9235 TAP_1666
-*9236 TAP_1667
-*9237 TAP_1668
-*9238 TAP_1669
-*9239 TAP_1670
-*9240 TAP_1671
-*9241 TAP_1672
-*9242 TAP_1673
-*9243 TAP_1674
-*9244 TAP_1675
-*9245 TAP_1676
-*9246 TAP_1677
-*9247 TAP_1678
-*9248 TAP_1679
-*9249 TAP_1680
-*9250 TAP_1681
-*9251 TAP_1682
-*9252 TAP_1683
-*9253 TAP_1684
-*9254 TAP_1685
-*9255 TAP_1686
-*9256 TAP_1687
-*9257 TAP_1688
-*9258 TAP_1689
-*9259 TAP_1690
-*9260 TAP_1691
-*9261 TAP_1692
-*9262 TAP_1693
-*9263 TAP_1694
-*9264 TAP_1695
-*9265 TAP_1696
-*9266 TAP_1697
-*9267 TAP_1698
-*9268 TAP_1699
-*9269 TAP_1700
-*9270 TAP_1701
-*9271 TAP_1702
-*9272 TAP_1703
-*9273 TAP_1704
-*9274 TAP_1705
-*9275 TAP_1706
-*9276 TAP_1707
-*9277 TAP_1708
-*9278 TAP_1709
-*9279 TAP_1710
-*9280 TAP_1711
-*9281 TAP_1712
-*9282 TAP_1713
-*9283 TAP_1714
-*9284 TAP_1715
-*9285 TAP_1716
-*9286 TAP_1717
-*9287 TAP_1718
-*9288 TAP_1719
-*9289 TAP_1720
-*9290 TAP_1721
-*9291 TAP_1722
-*9292 TAP_1723
-*9293 TAP_1724
-*9294 TAP_1725
-*9295 TAP_1726
-*9296 TAP_1727
-*9297 TAP_1728
-*9298 TAP_1729
-*9299 TAP_1730
-*9300 TAP_1731
-*9301 TAP_1732
-*9302 TAP_1733
-*9303 TAP_1734
-*9304 TAP_1735
-*9305 TAP_1736
-*9306 TAP_1737
-*9307 TAP_1738
-*9308 TAP_1739
-*9309 TAP_1740
-*9310 TAP_1741
-*9311 TAP_1742
-*9312 TAP_1743
-*9313 TAP_1744
-*9314 TAP_1745
-*9315 TAP_1746
-*9316 TAP_1747
-*9317 TAP_1748
-*9318 TAP_1749
-*9319 TAP_1750
-*9320 TAP_1751
-*9321 TAP_1752
-*9322 TAP_1753
-*9323 TAP_1754
-*9324 TAP_1755
-*9325 TAP_1756
-*9326 TAP_1757
-*9327 TAP_1758
-*9328 TAP_1759
-*9329 TAP_1760
-*9330 TAP_1761
-*9331 TAP_1762
-*9332 TAP_1763
-*9333 TAP_1764
-*9334 TAP_1765
-*9335 TAP_1766
-*9336 TAP_1767
-*9337 TAP_1768
-*9338 TAP_1769
-*9339 TAP_1770
-*9340 TAP_1771
-*9341 TAP_1772
-*9342 TAP_1773
-*9343 TAP_1774
-*9344 TAP_1775
-*9345 TAP_1776
-*9346 TAP_1777
-*9347 TAP_1778
-*9348 TAP_1779
-*9349 TAP_1780
-*9350 TAP_1781
-*9351 TAP_1782
-*9352 TAP_1783
-*9353 TAP_1784
-*9354 TAP_1785
-*9355 TAP_1786
-*9356 TAP_1787
-*9357 TAP_1788
-*9358 TAP_1789
-*9359 TAP_1790
-*9360 TAP_1791
-*9361 TAP_1792
-*9362 TAP_1793
-*9363 TAP_1794
-*9364 TAP_1795
-*9365 TAP_1796
-*9366 TAP_1797
-*9367 TAP_1798
-*9368 TAP_1799
-*9369 TAP_1800
-*9370 TAP_1801
-*9371 TAP_1802
-*9372 TAP_1803
-*9373 TAP_1804
-*9374 TAP_1805
-*9375 TAP_1806
-*9376 TAP_1807
-*9377 TAP_1808
-*9378 TAP_1809
-*9379 TAP_1810
-*9380 TAP_1811
-*9381 TAP_1812
-*9382 TAP_1813
-*9383 TAP_1814
-*9384 TAP_1815
-*9385 TAP_1816
-*9386 TAP_1817
-*9387 TAP_1818
-*9388 TAP_1819
-*9389 TAP_1820
-*9390 TAP_1821
-*9391 TAP_1822
-*9392 TAP_1823
-*9393 TAP_1824
-*9394 TAP_1825
-*9395 TAP_1826
-*9396 TAP_1827
-*9397 TAP_1828
-*9398 TAP_1829
-*9399 TAP_1830
-*9400 TAP_1831
-*9401 TAP_1832
-*9402 TAP_1833
-*9403 TAP_1834
-*9404 TAP_1835
-*9405 TAP_1836
-*9406 TAP_1837
-*9407 TAP_1838
-*9408 TAP_1839
-*9409 TAP_1840
-*9410 TAP_1841
-*9411 TAP_1842
-*9412 TAP_1843
-*9413 TAP_1844
-*9414 TAP_1845
-*9415 TAP_1846
-*9416 TAP_1847
-*9417 TAP_1848
-*9418 TAP_1849
-*9419 TAP_1850
-*9420 TAP_1851
-*9421 TAP_1852
-*9422 TAP_1853
-*9423 TAP_1854
-*9424 TAP_1855
-*9425 TAP_1856
-*9426 TAP_1857
-*9427 TAP_1858
-*9428 TAP_1859
-*9429 TAP_1860
-*9430 TAP_1861
-*9431 TAP_1862
-*9432 TAP_1863
-*9433 TAP_1864
-*9434 TAP_1865
-*9435 TAP_1866
-*9436 TAP_1867
-*9437 TAP_1868
-*9438 TAP_1869
-*9439 TAP_1870
-*9440 TAP_1871
-*9441 TAP_1872
-*9442 TAP_1873
-*9443 TAP_1874
-*9444 TAP_1875
-*9445 TAP_1876
-*9446 TAP_1877
-*9447 TAP_1878
-*9448 TAP_1879
-*9449 TAP_1880
-*9450 TAP_1881
-*9451 TAP_1882
-*9452 TAP_1883
-*9453 TAP_1884
-*9454 TAP_1885
-*9455 TAP_1886
-*9456 TAP_1887
-*9457 TAP_1888
-*9458 TAP_1889
-*9459 TAP_1890
-*9460 TAP_1891
-*9461 TAP_1892
-*9462 TAP_1893
-*9463 TAP_1894
-*9464 TAP_1895
-*9465 TAP_1896
-*9466 TAP_1897
-*9467 TAP_1898
-*9468 TAP_1899
-*9469 TAP_1900
-*9470 TAP_1901
-*9471 TAP_1902
-*9472 TAP_1903
-*9473 TAP_1904
-*9474 TAP_1905
-*9475 TAP_1906
-*9476 TAP_1907
-*9477 TAP_1908
-*9478 TAP_1909
-*9479 TAP_1910
-*9480 TAP_1911
-*9481 TAP_1912
-*9482 TAP_1913
-*9483 TAP_1914
-*9484 TAP_1915
-*9485 TAP_1916
-*9486 TAP_1917
-*9487 TAP_1918
-*9488 TAP_1919
-*9489 TAP_1920
-*9490 TAP_1921
-*9491 TAP_1922
-*9492 TAP_1923
-*9493 TAP_1924
-*9494 TAP_1925
-*9495 TAP_1926
-*9496 TAP_1927
-*9497 TAP_1928
-*9498 TAP_1929
-*9499 TAP_1930
-*9500 TAP_1931
-*9501 TAP_1932
-*9502 TAP_1933
-*9503 TAP_1934
-*9504 TAP_1935
-*9505 TAP_1936
-*9506 TAP_1937
-*9507 TAP_1938
-*9508 TAP_1939
-*9509 TAP_1940
-*9510 TAP_1941
-*9511 TAP_1942
-*9512 TAP_1943
-*9513 TAP_1944
-*9514 TAP_1945
-*9515 TAP_1946
-*9516 TAP_1947
-*9517 TAP_1948
-*9518 TAP_1949
-*9519 TAP_1950
-*9520 TAP_1951
-*9521 TAP_1952
-*9522 TAP_1953
-*9523 TAP_1954
-*9524 TAP_1955
-*9525 TAP_1956
-*9526 TAP_1957
-*9527 TAP_1958
-*9528 TAP_1959
-*9529 TAP_1960
-*9530 TAP_1961
-*9531 TAP_1962
-*9532 TAP_1963
-*9533 TAP_1964
-*9534 TAP_1965
-*9535 TAP_1966
-*9536 TAP_1967
-*9537 TAP_1968
-*9538 TAP_1969
-*9539 TAP_1970
-*9540 TAP_1971
-*9541 TAP_1972
-*9542 TAP_1973
-*9543 TAP_1974
-*9544 TAP_1975
-*9545 TAP_1976
-*9546 TAP_1977
-*9547 TAP_1978
-*9548 TAP_1979
-*9549 TAP_1980
-*9550 TAP_1981
-*9551 TAP_1982
-*9552 TAP_1983
-*9553 TAP_1984
-*9554 TAP_1985
-*9555 TAP_1986
-*9556 TAP_1987
-*9557 TAP_1988
-*9558 TAP_1989
-*9559 TAP_1990
-*9560 TAP_1991
-*9561 TAP_1992
-*9562 TAP_1993
-*9563 TAP_1994
-*9564 TAP_1995
-*9565 TAP_1996
-*9566 TAP_1997
-*9567 TAP_1998
-*9568 TAP_1999
-*9569 TAP_2000
-*9570 TAP_2001
-*9571 TAP_2002
-*9572 TAP_2003
-*9573 TAP_2004
-*9574 TAP_2005
-*9575 TAP_2006
-*9576 TAP_2007
-*9577 TAP_2008
-*9578 TAP_2009
-*9579 TAP_2010
-*9580 TAP_2011
-*9581 TAP_2012
-*9582 TAP_2013
-*9583 TAP_2014
-*9584 TAP_2015
-*9585 TAP_2016
-*9586 TAP_2017
-*9587 TAP_2018
-*9588 TAP_2019
-*9589 TAP_2020
-*9590 TAP_2021
-*9591 TAP_2022
-*9592 TAP_2023
-*9593 TAP_2024
-*9594 TAP_2025
-*9595 TAP_2026
-*9596 TAP_2027
-*9597 TAP_2028
-*9598 TAP_2029
-*9599 TAP_2030
-*9600 TAP_2031
-*9601 TAP_2032
-*9602 TAP_2033
-*9603 TAP_2034
-*9604 TAP_2035
-*9605 TAP_2036
-*9606 TAP_2037
-*9607 TAP_2038
-*9608 TAP_2039
-*9609 TAP_2040
-*9610 TAP_2041
-*9611 TAP_2042
-*9612 TAP_2043
-*9613 TAP_2044
-*9614 TAP_2045
-*9615 TAP_2046
-*9616 TAP_2047
-*9617 TAP_2048
-*9618 TAP_2049
-*9619 TAP_2050
-*9620 TAP_2051
-*9621 TAP_2052
-*9622 TAP_2053
-*9623 TAP_2054
-*9624 TAP_2055
-*9625 TAP_2056
-*9626 TAP_2057
-*9627 TAP_2058
-*9628 TAP_2059
-*9629 TAP_2060
-*9630 TAP_2061
-*9631 TAP_2062
-*9632 TAP_2063
-*9633 TAP_2064
-*9634 TAP_2065
-*9635 TAP_2066
-*9636 TAP_2067
-*9637 TAP_2068
-*9638 TAP_2069
-*9639 TAP_2070
-*9640 TAP_2071
-*9641 TAP_2072
-*9642 TAP_2073
-*9643 TAP_2074
-*9644 TAP_2075
-*9645 TAP_2076
-*9646 TAP_2077
-*9647 TAP_2078
-*9648 TAP_2079
-*9649 TAP_2080
-*9650 TAP_2081
-*9651 TAP_2082
-*9652 TAP_2083
-*9653 TAP_2084
-*9654 TAP_2085
-*9655 TAP_2086
-*9656 TAP_2087
-*9657 TAP_2088
-*9658 TAP_2089
-*9659 TAP_2090
-*9660 TAP_2091
-*9661 TAP_2092
-*9662 TAP_2093
-*9663 TAP_2094
-*9664 TAP_2095
-*9665 TAP_2096
-*9666 TAP_2097
-*9667 TAP_2098
-*9668 TAP_2099
-*9669 TAP_2100
-*9670 TAP_2101
-*9671 TAP_2102
-*9672 TAP_2103
-*9673 TAP_2104
-*9674 TAP_2105
-*9675 TAP_2106
-*9676 TAP_2107
-*9677 TAP_2108
-*9678 TAP_2109
-*9679 TAP_2110
-*9680 TAP_2111
-*9681 TAP_2112
-*9682 TAP_2113
-*9683 TAP_2114
-*9684 TAP_2115
-*9685 TAP_2116
-*9686 TAP_2117
-*9687 TAP_2118
-*9688 TAP_2119
-*9689 TAP_2120
-*9690 TAP_2121
-*9691 TAP_2122
-*9692 TAP_2123
-*9693 TAP_2124
-*9694 TAP_2125
-*9695 TAP_2126
-*9696 TAP_2127
-*9697 TAP_2128
-*9698 TAP_2129
-*9699 TAP_2130
-*9700 TAP_2131
-*9701 TAP_2132
-*9702 TAP_2133
-*9703 TAP_2134
-*9704 TAP_2135
-*9705 TAP_2136
-*9706 TAP_2137
-*9707 TAP_2138
-*9708 TAP_2139
-*9709 TAP_2140
-*9710 TAP_2141
-*9711 TAP_2142
-*9712 TAP_2143
-*9713 TAP_2144
-*9714 TAP_2145
-*9715 TAP_2146
-*9716 TAP_2147
-*9717 TAP_2148
-*9718 TAP_2149
-*9719 TAP_2150
-*9720 TAP_2151
-*9721 TAP_2152
-*9722 TAP_2153
-*9723 TAP_2154
-*9724 TAP_2155
-*9725 TAP_2156
-*9726 TAP_2157
-*9727 TAP_2158
-*9728 TAP_2159
-*9729 TAP_2160
-*9730 TAP_2161
-*9731 TAP_2162
-*9732 TAP_2163
-*9733 TAP_2164
-*9734 TAP_2165
-*9735 TAP_2166
-*9736 TAP_2167
-*9737 TAP_2168
-*9738 TAP_2169
-*9739 TAP_2170
-*9740 TAP_2171
-*9741 TAP_2172
-*9742 TAP_2173
-*9743 TAP_2174
-*9744 TAP_2175
-*9745 TAP_2176
-*9746 TAP_2177
-*9747 TAP_2178
-*9748 TAP_2179
-*9749 TAP_2180
-*9750 TAP_2181
-*9751 TAP_2182
-*9752 TAP_2183
-*9753 TAP_2184
-*9754 TAP_2185
-*9755 TAP_2186
-*9756 TAP_2187
-*9757 TAP_2188
-*9758 TAP_2189
-*9759 TAP_2190
-*9760 TAP_2191
-*9761 TAP_2192
-*9762 TAP_2193
-*9763 TAP_2194
-*9764 TAP_2195
-*9765 TAP_2196
-*9766 TAP_2197
-*9767 TAP_2198
-*9768 TAP_2199
-*9769 TAP_2200
-*9770 TAP_2201
-*9771 TAP_2202
-*9772 TAP_2203
-*9773 TAP_2204
-*9774 TAP_2205
-*9775 TAP_2206
-*9776 TAP_2207
-*9777 TAP_2208
-*9778 TAP_2209
-*9779 TAP_2210
-*9780 TAP_2211
-*9781 TAP_2212
-*9782 TAP_2213
-*9783 TAP_2214
-*9784 TAP_2215
-*9785 TAP_2216
-*9786 TAP_2217
-*9787 TAP_2218
-*9788 TAP_2219
-*9789 TAP_2220
-*9790 TAP_2221
-*9791 TAP_2222
-*9792 TAP_2223
-*9793 TAP_2224
-*9794 TAP_2225
-*9795 TAP_2226
-*9796 TAP_2227
-*9797 TAP_2228
-*9798 TAP_2229
-*9799 TAP_2230
-*9800 TAP_2231
-*9801 TAP_2232
-*9802 TAP_2233
-*9803 TAP_2234
-*9804 TAP_2235
-*9805 TAP_2236
-*9806 TAP_2237
-*9807 TAP_2238
-*9808 TAP_2239
-*9809 TAP_2240
-*9810 TAP_2241
-*9811 TAP_2242
-*9812 TAP_2243
-*9813 TAP_2244
-*9814 TAP_2245
-*9815 TAP_2246
-*9816 TAP_2247
-*9817 TAP_2248
-*9818 TAP_2249
-*9819 TAP_2250
-*9820 TAP_2251
-*9821 TAP_2252
-*9822 TAP_2253
-*9823 TAP_2254
-*9824 TAP_2255
-*9825 TAP_2256
-*9826 TAP_2257
-*9827 TAP_2258
-*9828 TAP_2259
-*9829 TAP_2260
-*9830 TAP_2261
-*9831 TAP_2262
-*9832 TAP_2263
-*9833 TAP_2264
-*9834 TAP_2265
-*9835 TAP_2266
-*9836 TAP_2267
-*9837 TAP_2268
-*9838 TAP_2269
-*9839 TAP_2270
-*9840 TAP_2271
-*9841 TAP_2272
-*9842 TAP_2273
-*9843 TAP_2274
-*9844 TAP_2275
-*9845 TAP_2276
-*9846 TAP_2277
-*9847 TAP_2278
-*9848 TAP_2279
-*9849 TAP_2280
-*9850 TAP_2281
-*9851 TAP_2282
-*9852 TAP_2283
-*9853 TAP_2284
-*9854 TAP_2285
-*9855 TAP_2286
-*9856 TAP_2287
-*9857 TAP_2288
-*9858 TAP_2289
-*9859 TAP_2290
-*9860 TAP_2291
-*9861 TAP_2292
-*9862 TAP_2293
-*9863 TAP_2294
-*9864 TAP_2295
-*9865 TAP_2296
-*9866 TAP_2297
-*9867 TAP_2298
-*9868 TAP_2299
-*9869 TAP_2300
-*9870 TAP_2301
-*9871 TAP_2302
-*9872 TAP_2303
-*9873 TAP_2304
-*9874 TAP_2305
-*9875 TAP_2306
-*9876 TAP_2307
-*9877 TAP_2308
-*9878 TAP_2309
-*9879 TAP_2310
-*9880 TAP_2311
-*9881 TAP_2312
-*9882 TAP_2313
-*9883 TAP_2314
-*9884 TAP_2315
-*9885 TAP_2316
-*9886 TAP_2317
-*9887 TAP_2318
-*9888 TAP_2319
-*9889 TAP_2320
-*9890 TAP_2321
-*9891 TAP_2322
-*9892 TAP_2323
-*9893 TAP_2324
-*9894 TAP_2325
-*9895 TAP_2326
-*9896 TAP_2327
-*9897 TAP_2328
-*9898 TAP_2329
-*9899 TAP_2330
-*9900 TAP_2331
-*9901 TAP_2332
-*9902 TAP_2333
-*9903 TAP_2334
-*9904 TAP_2335
-*9905 TAP_2336
-*9906 TAP_2337
-*9907 TAP_2338
-*9908 TAP_2339
-*9909 TAP_2340
-*9910 TAP_2341
-*9911 TAP_2342
-*9912 TAP_2343
-*9913 TAP_2344
-*9914 TAP_2345
-*9915 TAP_2346
-*9916 TAP_2347
-*9917 TAP_2348
-*9918 TAP_2349
-*9919 TAP_2350
-*9920 TAP_2351
-*9921 TAP_2352
-*9922 TAP_2353
-*9923 TAP_2354
-*9924 TAP_2355
-*9925 TAP_2356
-*9926 TAP_2357
-*9927 TAP_2358
-*9928 TAP_2359
-*9929 TAP_2360
-*9930 TAP_2361
-*9931 TAP_2362
-*9932 TAP_2363
-*9933 TAP_2364
-*9934 TAP_2365
-*9935 TAP_2366
-*9936 TAP_2367
-*9937 TAP_2368
-*9938 TAP_2369
-*9939 TAP_2370
-*9940 TAP_2371
-*9941 TAP_2372
-*9942 TAP_2373
-*9943 TAP_2374
-*9944 TAP_2375
-*9945 TAP_2376
-*9946 TAP_2377
-*9947 TAP_2378
-*9948 TAP_2379
-*9949 TAP_2380
-*9950 TAP_2381
-*9951 TAP_2382
-*9952 TAP_2383
-*9953 TAP_2384
-*9954 TAP_2385
-*9955 TAP_2386
-*9956 TAP_2387
-*9957 TAP_2388
-*9958 TAP_2389
-*9959 TAP_2390
-*9960 TAP_2391
-*9961 TAP_2392
-*9962 TAP_2393
-*9963 TAP_2394
-*9964 TAP_2395
-*9965 TAP_2396
-*9966 TAP_2397
-*9967 TAP_2398
-*9968 TAP_2399
-*9969 TAP_2400
-*9970 TAP_2401
-*9971 TAP_2402
-*9972 TAP_2403
-*9973 TAP_2404
-*9974 TAP_2405
-*9975 TAP_2406
-*9976 TAP_2407
-*9977 TAP_2408
-*9978 TAP_2409
-*9979 TAP_2410
-*9980 TAP_2411
-*9981 TAP_2412
-*9982 TAP_2413
-*9983 TAP_2414
-*9984 TAP_2415
-*9985 TAP_2416
-*9986 TAP_2417
-*9987 TAP_2418
-*9988 TAP_2419
-*9989 TAP_2420
-*9990 TAP_2421
-*9991 TAP_2422
-*9992 TAP_2423
-*9993 TAP_2424
-*9994 TAP_2425
-*9995 TAP_2426
-*9996 TAP_2427
-*9997 TAP_2428
-*9998 TAP_2429
-*9999 TAP_2430
-*10000 TAP_2431
-*10001 TAP_2432
-*10002 TAP_2433
-*10003 TAP_2434
-*10004 TAP_2435
-*10005 TAP_2436
-*10006 TAP_2437
-*10007 TAP_2438
-*10008 TAP_2439
-*10009 TAP_2440
-*10010 TAP_2441
-*10011 TAP_2442
-*10012 TAP_2443
-*10013 TAP_2444
-*10014 TAP_2445
-*10015 TAP_2446
-*10016 TAP_2447
-*10017 TAP_2448
-*10018 TAP_2449
-*10019 TAP_2450
-*10020 TAP_2451
-*10021 TAP_2452
-*10022 TAP_2453
-*10023 TAP_2454
-*10024 TAP_2455
-*10025 TAP_2456
-*10026 TAP_2457
-*10027 TAP_2458
-*10028 TAP_2459
-*10029 TAP_2460
-*10030 TAP_2461
-*10031 TAP_2462
-*10032 TAP_2463
-*10033 TAP_2464
-*10034 TAP_2465
-*10035 TAP_2466
-*10036 TAP_2467
-*10037 TAP_2468
-*10038 TAP_2469
-*10039 TAP_2470
-*10040 TAP_2471
-*10041 TAP_2472
-*10042 TAP_2473
-*10043 TAP_2474
-*10044 TAP_2475
-*10045 TAP_2476
-*10046 TAP_2477
-*10047 TAP_2478
-*10048 TAP_2479
-*10049 TAP_2480
-*10050 TAP_2481
-*10051 TAP_2482
-*10052 TAP_2483
-*10053 TAP_2484
-*10054 TAP_2485
-*10055 TAP_2486
-*10056 TAP_2487
-*10057 TAP_2488
-*10058 TAP_2489
-*10059 TAP_2490
-*10060 TAP_2491
-*10061 TAP_2492
-*10062 TAP_2493
-*10063 TAP_2494
-*10064 TAP_2495
-*10065 TAP_2496
-*10066 TAP_2497
-*10067 TAP_2498
-*10068 TAP_2499
-*10069 TAP_2500
-*10070 TAP_2501
-*10071 TAP_2502
-*10072 TAP_2503
-*10073 TAP_2504
-*10074 TAP_2505
-*10075 TAP_2506
-*10076 TAP_2507
-*10077 TAP_2508
-*10078 TAP_2509
-*10079 TAP_2510
-*10080 TAP_2511
-*10081 TAP_2512
-*10082 TAP_2513
-*10083 TAP_2514
-*10084 TAP_2515
-*10085 TAP_2516
-*10086 TAP_2517
-*10087 TAP_2518
-*10088 TAP_2519
-*10089 TAP_2520
-*10090 TAP_2521
-*10091 TAP_2522
-*10092 TAP_2523
-*10093 TAP_2524
-*10094 TAP_2525
-*10095 TAP_2526
-*10096 TAP_2527
-*10097 TAP_2528
-*10098 TAP_2529
-*10099 TAP_2530
-*10100 TAP_2531
-*10101 TAP_2532
-*10102 TAP_2533
-*10103 TAP_2534
-*10104 TAP_2535
-*10105 TAP_2536
-*10106 TAP_2537
-*10107 TAP_2538
-*10108 TAP_2539
-*10109 TAP_2540
-*10110 TAP_2541
-*10111 TAP_2542
-*10112 TAP_2543
-*10113 TAP_2544
-*10114 TAP_2545
-*10115 TAP_2546
-*10116 TAP_2547
-*10117 TAP_2548
-*10118 TAP_2549
-*10119 TAP_2550
-*10120 TAP_2551
-*10121 TAP_2552
-*10122 TAP_2553
-*10123 TAP_2554
-*10124 TAP_2555
-*10125 TAP_2556
-*10126 TAP_2557
-*10127 TAP_2558
-*10128 TAP_2559
-*10129 TAP_2560
-*10130 TAP_2561
-*10131 TAP_2562
-*10132 TAP_2563
-*10133 TAP_2564
-*10134 TAP_2565
-*10135 TAP_2566
-*10136 TAP_2567
-*10137 TAP_2568
-*10138 TAP_2569
-*10139 TAP_2570
-*10140 TAP_2571
-*10141 TAP_2572
-*10142 TAP_2573
-*10143 TAP_2574
-*10144 TAP_2575
-*10145 TAP_2576
-*10146 TAP_2577
-*10147 TAP_2578
-*10148 TAP_2579
-*10149 TAP_2580
-*10150 TAP_2581
-*10151 TAP_2582
-*10152 TAP_2583
-*10153 TAP_2584
-*10154 TAP_2585
-*10155 TAP_2586
-*10156 TAP_2587
-*10157 TAP_2588
-*10158 TAP_2589
-*10159 TAP_2590
-*10160 TAP_2591
-*10161 TAP_2592
-*10162 TAP_2593
-*10163 TAP_2594
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+*10742 TAP_727
+*10743 TAP_728
+*10744 TAP_729
+*10745 TAP_730
+*10746 TAP_731
+*10747 TAP_732
+*10748 TAP_733
+*10749 TAP_734
+*10750 TAP_735
+*10751 TAP_736
+*10752 TAP_737
+*10753 TAP_738
+*10754 TAP_739
+*10755 TAP_740
+*10756 TAP_741
+*10757 TAP_742
+*10758 TAP_743
+*10759 TAP_744
+*10760 TAP_745
+*10761 TAP_746
+*10762 TAP_747
+*10763 TAP_748
+*10764 TAP_749
+*10765 TAP_750
+*10766 TAP_751
+*10767 TAP_752
+*10768 TAP_753
+*10769 TAP_754
+*10770 TAP_755
+*10771 TAP_756
+*10772 TAP_757
+*10773 TAP_758
+*10774 TAP_759
+*10775 TAP_760
+*10776 TAP_761
+*10777 TAP_762
+*10778 TAP_763
+*10779 TAP_764
+*10780 TAP_765
+*10781 TAP_766
+*10782 TAP_767
+*10783 TAP_768
+*10784 TAP_769
+*10785 TAP_770
+*10786 TAP_771
+*10787 TAP_772
+*10788 TAP_773
+*10789 TAP_774
+*10790 TAP_775
+*10791 TAP_776
+*10792 TAP_777
+*10793 TAP_778
+*10794 TAP_779
+*10795 TAP_780
+*10796 TAP_781
+*10797 TAP_782
+*10798 TAP_783
+*10799 TAP_784
+*10800 TAP_785
+*10801 TAP_786
+*10802 TAP_787
+*10803 TAP_788
+*10804 TAP_789
+*10805 TAP_790
+*10806 TAP_791
+*10807 TAP_792
+*10808 TAP_793
+*10809 TAP_794
+*10810 TAP_795
+*10811 TAP_796
+*10812 TAP_797
+*10813 TAP_798
+*10814 TAP_799
+*10815 TAP_800
+*10816 TAP_801
+*10817 TAP_802
+*10818 TAP_803
+*10819 TAP_804
+*10820 TAP_805
+*10821 TAP_806
+*10822 TAP_807
+*10823 TAP_808
+*10824 TAP_809
+*10825 TAP_810
+*10826 TAP_811
+*10827 TAP_812
+*10828 TAP_813
+*10829 TAP_814
+*10830 TAP_815
+*10831 TAP_816
+*10832 TAP_817
+*10833 TAP_818
+*10834 TAP_819
+*10835 TAP_820
+*10836 TAP_821
+*10837 TAP_822
+*10838 TAP_823
+*10839 TAP_824
+*10840 TAP_825
+*10841 TAP_826
+*10842 TAP_827
+*10843 TAP_828
+*10844 TAP_829
+*10845 TAP_830
+*10846 TAP_831
+*10847 TAP_832
+*10848 TAP_833
+*10849 TAP_834
+*10850 TAP_835
+*10851 TAP_836
+*10852 TAP_837
+*10853 TAP_838
+*10854 TAP_839
+*10855 TAP_840
+*10856 TAP_841
+*10857 TAP_842
+*10858 TAP_843
+*10859 TAP_844
+*10860 TAP_845
+*10861 TAP_846
+*10862 TAP_847
+*10863 TAP_848
+*10864 TAP_849
+*10865 TAP_850
+*10866 TAP_851
+*10867 TAP_852
+*10868 TAP_853
+*10869 TAP_854
+*10870 TAP_855
+*10871 TAP_856
+*10872 TAP_857
+*10873 TAP_858
+*10874 TAP_859
+*10875 TAP_860
+*10876 TAP_861
+*10877 TAP_862
+*10878 TAP_863
+*10879 TAP_864
+*10880 TAP_865
+*10881 TAP_866
+*10882 TAP_867
+*10883 TAP_868
+*10884 TAP_869
+*10885 TAP_870
+*10886 TAP_871
+*10887 TAP_872
+*10888 TAP_873
+*10889 TAP_874
+*10890 TAP_875
+*10891 TAP_876
+*10892 TAP_877
+*10893 TAP_878
+*10894 TAP_879
+*10895 TAP_880
+*10896 TAP_881
+*10897 TAP_882
+*10898 TAP_883
+*10899 TAP_884
+*10900 TAP_885
+*10901 TAP_886
+*10902 TAP_887
+*10903 TAP_888
+*10904 TAP_889
+*10905 TAP_890
+*10906 TAP_891
+*10907 TAP_892
+*10908 TAP_893
+*10909 TAP_894
+*10910 TAP_895
+*10911 TAP_896
+*10912 TAP_897
+*10913 TAP_898
+*10914 TAP_899
+*10915 TAP_900
+*10916 TAP_901
+*10917 TAP_902
+*10918 TAP_903
+*10919 TAP_904
+*10920 TAP_905
+*10921 TAP_906
+*10922 TAP_907
+*10923 TAP_908
+*10924 TAP_909
+*10925 TAP_910
+*10926 TAP_911
+*10927 TAP_912
+*10928 TAP_913
+*10929 TAP_914
+*10930 TAP_915
+*10931 TAP_916
+*10932 TAP_917
+*10933 TAP_918
+*10934 TAP_919
+*10935 TAP_920
+*10936 TAP_921
+*10937 TAP_922
+*10938 TAP_923
+*10939 TAP_924
+*10940 TAP_925
+*10941 TAP_926
+*10942 TAP_927
+*10943 TAP_928
+*10944 TAP_929
+*10945 TAP_930
+*10946 TAP_931
+*10947 TAP_932
+*10948 TAP_933
+*10949 TAP_934
+*10950 TAP_935
+*10951 TAP_936
+*10952 TAP_937
+*10953 TAP_938
+*10954 TAP_939
+*10955 TAP_940
+*10956 TAP_941
+*10957 TAP_942
+*10958 TAP_943
+*10959 TAP_944
+*10960 TAP_945
+*10961 TAP_946
+*10962 TAP_947
+*10963 TAP_948
+*10964 TAP_949
+*10965 TAP_950
+*10966 TAP_951
+*10967 TAP_952
+*10968 TAP_953
+*10969 TAP_954
+*10970 TAP_955
+*10971 TAP_956
+*10972 TAP_957
+*10973 TAP_958
+*10974 TAP_959
+*10975 TAP_960
+*10976 TAP_961
+*10977 TAP_962
+*10978 TAP_963
+*10979 TAP_964
+*10980 TAP_965
+*10981 TAP_966
+*10982 TAP_967
+*10983 TAP_968
+*10984 TAP_969
+*10985 TAP_970
+*10986 TAP_971
+*10987 TAP_972
+*10988 TAP_973
+*10989 TAP_974
+*10990 TAP_975
+*10991 TAP_976
+*10992 TAP_977
+*10993 TAP_978
+*10994 TAP_979
+*10995 TAP_980
+*10996 TAP_981
+*10997 TAP_982
+*10998 TAP_983
+*10999 TAP_984
+*11000 TAP_985
+*11001 TAP_986
+*11002 TAP_987
+*11003 TAP_988
+*11004 TAP_989
+*11005 TAP_990
+*11006 TAP_991
+*11007 TAP_992
+*11008 TAP_993
+*11009 TAP_994
+*11010 TAP_995
+*11011 TAP_996
+*11012 TAP_997
+*11013 TAP_998
+*11014 TAP_999
+*11015 _001_
+*11016 _002_
+*11017 input1
+*11018 input2
+*11019 output3
+*11020 tiny_user_project_10
+*11021 tiny_user_project_100
+*11022 tiny_user_project_101
+*11023 tiny_user_project_102
+*11024 tiny_user_project_103
+*11025 tiny_user_project_104
+*11026 tiny_user_project_105
+*11027 tiny_user_project_106
+*11028 tiny_user_project_107
+*11029 tiny_user_project_108
+*11030 tiny_user_project_109
+*11031 tiny_user_project_11
+*11032 tiny_user_project_110
+*11033 tiny_user_project_111
+*11034 tiny_user_project_112
+*11035 tiny_user_project_113
+*11036 tiny_user_project_114
+*11037 tiny_user_project_115
+*11038 tiny_user_project_116
+*11039 tiny_user_project_117
+*11040 tiny_user_project_118
+*11041 tiny_user_project_119
+*11042 tiny_user_project_12
+*11043 tiny_user_project_120
+*11044 tiny_user_project_121
+*11045 tiny_user_project_122
+*11046 tiny_user_project_123
+*11047 tiny_user_project_124
+*11048 tiny_user_project_125
+*11049 tiny_user_project_126
+*11050 tiny_user_project_127
+*11051 tiny_user_project_128
+*11052 tiny_user_project_129
+*11053 tiny_user_project_13
+*11054 tiny_user_project_130
+*11055 tiny_user_project_131
+*11056 tiny_user_project_132
+*11057 tiny_user_project_133
+*11058 tiny_user_project_134
+*11059 tiny_user_project_135
+*11060 tiny_user_project_136
+*11061 tiny_user_project_137
+*11062 tiny_user_project_138
+*11063 tiny_user_project_139
+*11064 tiny_user_project_14
+*11065 tiny_user_project_140
+*11066 tiny_user_project_141
+*11067 tiny_user_project_142
+*11068 tiny_user_project_143
+*11069 tiny_user_project_144
+*11070 tiny_user_project_145
+*11071 tiny_user_project_146
+*11072 tiny_user_project_147
+*11073 tiny_user_project_148
+*11074 tiny_user_project_149
+*11075 tiny_user_project_15
+*11076 tiny_user_project_150
+*11077 tiny_user_project_151
+*11078 tiny_user_project_152
+*11079 tiny_user_project_153
+*11080 tiny_user_project_154
+*11081 tiny_user_project_155
+*11082 tiny_user_project_156
+*11083 tiny_user_project_157
+*11084 tiny_user_project_158
+*11085 tiny_user_project_159
+*11086 tiny_user_project_16
+*11087 tiny_user_project_160
+*11088 tiny_user_project_161
+*11089 tiny_user_project_162
+*11090 tiny_user_project_163
+*11091 tiny_user_project_164
+*11092 tiny_user_project_165
+*11093 tiny_user_project_166
+*11094 tiny_user_project_167
+*11095 tiny_user_project_168
+*11096 tiny_user_project_169
+*11097 tiny_user_project_17
+*11098 tiny_user_project_170
+*11099 tiny_user_project_171
+*11100 tiny_user_project_172
+*11101 tiny_user_project_173
+*11102 tiny_user_project_174
+*11103 tiny_user_project_175
+*11104 tiny_user_project_176
+*11105 tiny_user_project_177
+*11106 tiny_user_project_178
+*11107 tiny_user_project_18
+*11108 tiny_user_project_19
+*11109 tiny_user_project_20
+*11110 tiny_user_project_21
+*11111 tiny_user_project_22
+*11112 tiny_user_project_23
+*11113 tiny_user_project_24
+*11114 tiny_user_project_25
+*11115 tiny_user_project_26
+*11116 tiny_user_project_27
+*11117 tiny_user_project_28
+*11118 tiny_user_project_29
+*11119 tiny_user_project_30
+*11120 tiny_user_project_31
+*11121 tiny_user_project_32
+*11122 tiny_user_project_33
+*11123 tiny_user_project_34
+*11124 tiny_user_project_35
+*11125 tiny_user_project_36
+*11126 tiny_user_project_37
+*11127 tiny_user_project_38
+*11128 tiny_user_project_39
+*11129 tiny_user_project_4
+*11130 tiny_user_project_40
+*11131 tiny_user_project_41
+*11132 tiny_user_project_42
+*11133 tiny_user_project_43
+*11134 tiny_user_project_44
+*11135 tiny_user_project_45
+*11136 tiny_user_project_46
+*11137 tiny_user_project_47
+*11138 tiny_user_project_48
+*11139 tiny_user_project_49
+*11140 tiny_user_project_5
+*11141 tiny_user_project_50
+*11142 tiny_user_project_51
+*11143 tiny_user_project_52
+*11144 tiny_user_project_53
+*11145 tiny_user_project_54
+*11146 tiny_user_project_55
+*11147 tiny_user_project_56
+*11148 tiny_user_project_57
+*11149 tiny_user_project_58
+*11150 tiny_user_project_59
+*11151 tiny_user_project_6
+*11152 tiny_user_project_60
+*11153 tiny_user_project_61
+*11154 tiny_user_project_62
+*11155 tiny_user_project_63
+*11156 tiny_user_project_64
+*11157 tiny_user_project_65
+*11158 tiny_user_project_66
+*11159 tiny_user_project_67
+*11160 tiny_user_project_68
+*11161 tiny_user_project_69
+*11162 tiny_user_project_7
+*11163 tiny_user_project_70
+*11164 tiny_user_project_71
+*11165 tiny_user_project_72
+*11166 tiny_user_project_73
+*11167 tiny_user_project_74
+*11168 tiny_user_project_75
+*11169 tiny_user_project_76
+*11170 tiny_user_project_77
+*11171 tiny_user_project_78
+*11172 tiny_user_project_79
+*11173 tiny_user_project_8
+*11174 tiny_user_project_80
+*11175 tiny_user_project_81
+*11176 tiny_user_project_82
+*11177 tiny_user_project_83
+*11178 tiny_user_project_84
+*11179 tiny_user_project_85
+*11180 tiny_user_project_86
+*11181 tiny_user_project_87
+*11182 tiny_user_project_88
+*11183 tiny_user_project_89
+*11184 tiny_user_project_9
+*11185 tiny_user_project_90
+*11186 tiny_user_project_91
+*11187 tiny_user_project_92
+*11188 tiny_user_project_93
+*11189 tiny_user_project_94
+*11190 tiny_user_project_95
+*11191 tiny_user_project_96
+*11192 tiny_user_project_97
+*11193 tiny_user_project_98
+*11194 tiny_user_project_99
*PORTS
io_in[0] I
@@ -11596,1982 +11625,2077 @@
wbs_stb_i I
wbs_we_i I
+*D_NET *4 0.000934794
+*CONN
+*P io_in[12] I
+*I *11017:I I *D gf180mcu_fd_sc_mcu7t5v0__dlyb_1
+*I *424:I I *D gf180mcu_fd_sc_mcu7t5v0__antenna
+*CAP
+1 io_in[12] 0.000228875
+2 *11017:I 0.000238522
+3 *424:I 0
+4 *4:7 0.000467397
+*RES
+1 io_in[12] *4:7 6.345
+2 *4:7 *424:I 4.5
+3 *4:7 *11017:I 6.12
+*END
+
+*D_NET *5 0.00123926
+*CONN
+*P io_in[13] I
+*I *425:I I *D gf180mcu_fd_sc_mcu7t5v0__antenna
+*I *11018:I I *D gf180mcu_fd_sc_mcu7t5v0__dlyb_1
+*CAP
+1 io_in[13] 0.000450051
+2 *425:I 0.000169577
+3 *11018:I 0
+4 *5:8 0.000619628
+5 *5:8 *11015:A2 0
+*RES
+1 io_in[13] *5:8 7.515
+2 *5:8 *11018:I 4.5
+3 *5:8 *425:I 5.58
+*END
+
*D_NET *39 0.000695583
*CONN
*P io_oeb[0] O
-*I *11165:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11194:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[0] 0.000347791
-2 *11165:ZN 0.000347791
+2 *11194:ZN 0.000347791
*RES
-1 *11165:ZN io_oeb[0] 11.655
+1 *11194:ZN io_oeb[0] 11.655
*END
*D_NET *40 0.000758959
*CONN
*P io_oeb[10] O
-*I *11001:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11030:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[10] 0.00037948
-2 *11001:ZN 0.00037948
+2 *11030:ZN 0.00037948
*RES
-1 *11001:ZN io_oeb[10] 11.655
+1 *11030:ZN io_oeb[10] 11.655
*END
*D_NET *41 0.0010409
*CONN
*P io_oeb[11] O
-*I *11003:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11032:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[11] 0.000496591
-2 *11003:ZN 0.000496591
+2 *11032:ZN 0.000496591
3 io_oeb[11] io_oeb[18] 4.77151e-05
*RES
-1 *11003:ZN io_oeb[11] 12.735
+1 *11032:ZN io_oeb[11] 12.735
*END
*D_NET *42 0.00124692
*CONN
*P io_oeb[12] O
-*I *11004:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11033:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[12] 0.000623462
-2 *11004:ZN 0.000623462
+2 *11033:ZN 0.000623462
*RES
-1 *11004:ZN io_oeb[12] 9.135
+1 *11033:ZN io_oeb[12] 9.135
*END
*D_NET *43 0.000628172
*CONN
*P io_oeb[13] O
-*I *11005:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11034:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[13] 0.000314086
-2 *11005:ZN 0.000314086
+2 *11034:ZN 0.000314086
*RES
-1 *11005:ZN io_oeb[13] 11.115
+1 *11034:ZN io_oeb[13] 11.115
*END
*D_NET *44 0.00124692
*CONN
*P io_oeb[14] O
-*I *11006:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11035:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[14] 0.000623462
-2 *11006:ZN 0.000623462
+2 *11035:ZN 0.000623462
3 io_oeb[14] io_oeb[30] 0
*RES
-1 *11006:ZN io_oeb[14] 9.135
+1 *11035:ZN io_oeb[14] 9.135
*END
*D_NET *45 0.0015227
*CONN
*P io_oeb[15] O
-*I *11007:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11036:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[15] 0.000761351
-2 *11007:ZN 0.000761351
+2 *11036:ZN 0.000761351
3 io_oeb[15] io_out[32] 0
*RES
-1 *11007:ZN io_oeb[15] 10.215
+1 *11036:ZN io_oeb[15] 10.215
*END
*D_NET *46 0.00125599
*CONN
*P io_oeb[16] O
-*I *11008:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11037:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[16] 0.000568856
-2 *11008:ZN 0.000568856
+2 *11037:ZN 0.000568856
3 io_oeb[16] la_data_out[23] 0.000118278
*RES
-1 *11008:ZN io_oeb[16] 9.135
+1 *11037:ZN io_oeb[16] 9.135
*END
*D_NET *47 0.00124692
*CONN
*P io_oeb[17] O
-*I *11009:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11038:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[17] 0.000623462
-2 *11009:ZN 0.000623462
+2 *11038:ZN 0.000623462
*RES
-1 *11009:ZN io_oeb[17] 9.135
+1 *11038:ZN io_oeb[17] 9.135
*END
*D_NET *48 0.00186313
*CONN
*P io_oeb[18] O
-*I *11010:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11039:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[18] 0.000907707
-2 *11010:ZN 0.000907707
+2 *11039:ZN 0.000907707
3 io_oeb[11] io_oeb[18] 4.77151e-05
*RES
-1 *11010:ZN io_oeb[18] 15.975
+1 *11039:ZN io_oeb[18] 15.975
*END
*D_NET *49 0.00153434
*CONN
*P io_oeb[19] O
-*I *11011:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11040:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[19] 0.000692092
-2 *11011:ZN 0.000692092
+2 *11040:ZN 0.000692092
3 io_oeb[19] la_data_out[50] 0.000150157
*RES
-1 *11011:ZN io_oeb[19] 10.215
+1 *11040:ZN io_oeb[19] 10.215
*END
*D_NET *50 0.0015227
*CONN
*P io_oeb[1] O
-*I *10992:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11021:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[1] 0.000761351
-2 *10992:ZN 0.000761351
+2 *11021:ZN 0.000761351
*RES
-1 *10992:ZN io_oeb[1] 10.215
+1 *11021:ZN io_oeb[1] 10.215
*END
*D_NET *51 0.00171593
*CONN
*P io_oeb[20] O
-*I *11012:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11041:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[20] 0.000857966
-2 *11012:ZN 0.000857966
+2 *11041:ZN 0.000857966
*RES
-1 *11012:ZN io_oeb[20] 10.845
+1 *11041:ZN io_oeb[20] 10.845
*END
*D_NET *52 0.00124692
*CONN
*P io_oeb[21] O
-*I *11014:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11043:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[21] 0.000623462
-2 *11014:ZN 0.000623462
+2 *11043:ZN 0.000623462
*RES
-1 *11014:ZN io_oeb[21] 9.135
+1 *11043:ZN io_oeb[21] 9.135
*END
*D_NET *53 0.000485048
*CONN
*P io_oeb[22] O
-*I *11015:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11044:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[22] 0.000242524
-2 *11015:ZN 0.000242524
+2 *11044:ZN 0.000242524
*RES
-1 *11015:ZN io_oeb[22] 11.025
+1 *11044:ZN io_oeb[22] 11.025
*END
*D_NET *54 0.0015227
*CONN
*P io_oeb[23] O
-*I *11016:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11045:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[23] 0.000761351
-2 *11016:ZN 0.000761351
+2 *11045:ZN 0.000761351
3 io_oeb[23] io_oeb[9] 0
4 io_oeb[23] la_data_out[7] 0
*RES
-1 *11016:ZN io_oeb[23] 10.215
+1 *11045:ZN io_oeb[23] 10.215
*END
*D_NET *55 0.000652498
*CONN
*P io_oeb[24] O
-*I *11017:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11046:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[24] 0.000326249
-2 *11017:ZN 0.000326249
+2 *11046:ZN 0.000326249
*RES
-1 *11017:ZN io_oeb[24] 11.475
+1 *11046:ZN io_oeb[24] 11.475
*END
*D_NET *56 0.000652498
*CONN
*P io_oeb[25] O
-*I *11018:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11047:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[25] 0.000326249
-2 *11018:ZN 0.000326249
+2 *11047:ZN 0.000326249
*RES
-1 *11018:ZN io_oeb[25] 11.475
+1 *11047:ZN io_oeb[25] 11.475
*END
*D_NET *57 0.000652498
*CONN
*P io_oeb[26] O
-*I *11019:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11048:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[26] 0.000326249
-2 *11019:ZN 0.000326249
+2 *11048:ZN 0.000326249
*RES
-1 *11019:ZN io_oeb[26] 11.475
+1 *11048:ZN io_oeb[26] 11.475
*END
*D_NET *58 0.00150507
*CONN
*P io_oeb[27] O
-*I *11020:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11049:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[27] 0.000752537
-2 *11020:ZN 0.000752537
+2 *11049:ZN 0.000752537
*RES
-1 *11020:ZN io_oeb[27] 19.035
+1 *11049:ZN io_oeb[27] 19.035
*END
*D_NET *59 0.000441933
*CONN
*P io_oeb[28] O
-*I *11021:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11050:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[28] 0.000220966
-2 *11021:ZN 0.000220966
+2 *11050:ZN 0.000220966
*RES
-1 *11021:ZN io_oeb[28] 10.845
+1 *11050:ZN io_oeb[28] 10.845
*END
*D_NET *60 0.000850885
*CONN
*P io_oeb[29] O
-*I *11022:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11051:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[29] 0.000425443
-2 *11022:ZN 0.000425443
+2 *11051:ZN 0.000425443
*RES
-1 *11022:ZN io_oeb[29] 12.015
+1 *11051:ZN io_oeb[29] 12.015
*END
*D_NET *61 0.000888682
*CONN
*P io_oeb[2] O
-*I *10993:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11022:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[2] 0.000444341
-2 *10993:ZN 0.000444341
+2 *11022:ZN 0.000444341
*RES
-1 *10993:ZN io_oeb[2] 12.015
+1 *11022:ZN io_oeb[2] 12.015
*END
*D_NET *62 0.001954
*CONN
*P io_oeb[30] O
-*I *11023:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11052:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[30] 0.000976999
-2 *11023:ZN 0.000976999
+2 *11052:ZN 0.000976999
3 io_oeb[14] io_oeb[30] 0
*RES
-1 *11023:ZN io_oeb[30] 16.335
+1 *11052:ZN io_oeb[30] 16.335
*END
*D_NET *63 0.000715875
*CONN
*P io_oeb[31] O
-*I *11025:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11054:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[31] 0.000357937
-2 *11025:ZN 0.000357937
+2 *11054:ZN 0.000357937
*RES
-1 *11025:ZN io_oeb[31] 11.475
+1 *11054:ZN io_oeb[31] 11.475
*END
*D_NET *64 0.00154385
*CONN
*P io_oeb[32] O
-*I *11026:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11055:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[32] 0.00073169
-2 *11026:ZN 0.00073169
+2 *11055:ZN 0.00073169
3 io_oeb[32] la_data_out[0] 8.04696e-05
*RES
-1 *11026:ZN io_oeb[32] 10.215
+1 *11055:ZN io_oeb[32] 10.215
*END
*D_NET *65 0.000888682
*CONN
*P io_oeb[33] O
-*I *11027:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11056:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[33] 0.000444341
-2 *11027:ZN 0.000444341
+2 *11056:ZN 0.000444341
*RES
-1 *11027:ZN io_oeb[33] 12.015
+1 *11056:ZN io_oeb[33] 12.015
*END
*D_NET *66 0.000715875
*CONN
*P io_oeb[34] O
-*I *11028:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11057:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[34] 0.000357937
-2 *11028:ZN 0.000357937
+2 *11057:ZN 0.000357937
*RES
-1 *11028:ZN io_oeb[34] 11.475
+1 *11057:ZN io_oeb[34] 11.475
*END
*D_NET *67 0.000758959
*CONN
*P io_oeb[35] O
-*I *11029:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11058:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[35] 0.00037948
-2 *11029:ZN 0.00037948
+2 *11058:ZN 0.00037948
*RES
-1 *11029:ZN io_oeb[35] 11.655
+1 *11058:ZN io_oeb[35] 11.655
*END
*D_NET *68 0.0015227
*CONN
*P io_oeb[36] O
-*I *11030:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11059:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[36] 0.000761351
-2 *11030:ZN 0.000761351
+2 *11059:ZN 0.000761351
*RES
-1 *11030:ZN io_oeb[36] 10.215
+1 *11059:ZN io_oeb[36] 10.215
*END
*D_NET *69 0.00049069
*CONN
*P io_oeb[37] O
-*I *11031:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11060:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[37] 0.000210551
-2 *11031:ZN 0.000210551
+2 *11060:ZN 0.000210551
3 io_oeb[37] la_data_out[14] 6.95892e-05
*RES
-1 *11031:ZN io_oeb[37] 11.025
+1 *11060:ZN io_oeb[37] 11.025
*END
*D_NET *70 0.000899727
*CONN
*P io_oeb[3] O
-*I *10994:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11023:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[3] 0.000449863
-2 *10994:ZN 0.000449863
+2 *11023:ZN 0.000449863
*RES
-1 *10994:ZN io_oeb[3] 12.195
+1 *11023:ZN io_oeb[3] 12.195
*END
*D_NET *71 0.000807801
*CONN
*P io_oeb[4] O
-*I *10995:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11024:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[4] 0.0004039
-2 *10995:ZN 0.0004039
+2 *11024:ZN 0.0004039
*RES
-1 *10995:ZN io_oeb[4] 11.835
+1 *11024:ZN io_oeb[4] 11.835
*END
*D_NET *72 0.0015227
*CONN
*P io_oeb[5] O
-*I *10996:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11025:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[5] 0.000761351
-2 *10996:ZN 0.000761351
+2 *11025:ZN 0.000761351
*RES
-1 *10996:ZN io_oeb[5] 10.215
+1 *11025:ZN io_oeb[5] 10.215
*END
*D_NET *73 0.000899727
*CONN
*P io_oeb[6] O
-*I *10997:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11026:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[6] 0.000449863
-2 *10997:ZN 0.000449863
+2 *11026:ZN 0.000449863
*RES
-1 *10997:ZN io_oeb[6] 12.195
+1 *11026:ZN io_oeb[6] 12.195
*END
*D_NET *74 0.0015227
*CONN
*P io_oeb[7] O
-*I *10998:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11027:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[7] 0.000761351
-2 *10998:ZN 0.000761351
+2 *11027:ZN 0.000761351
*RES
-1 *10998:ZN io_oeb[7] 10.215
+1 *11027:ZN io_oeb[7] 10.215
*END
*D_NET *75 0.000807801
*CONN
*P io_oeb[8] O
-*I *10999:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11028:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[8] 0.0004039
-2 *10999:ZN 0.0004039
+2 *11028:ZN 0.0004039
*RES
-1 *10999:ZN io_oeb[8] 11.835
+1 *11028:ZN io_oeb[8] 11.835
*END
*D_NET *76 0.00123984
*CONN
*P io_oeb[9] O
-*I *11000:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11029:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_oeb[9] 0.000577784
-2 *11000:ZN 0.000577784
+2 *11029:ZN 0.000577784
3 io_oeb[9] io_out[12] 8.42708e-05
4 io_oeb[23] io_oeb[9] 0
*RES
-1 *11000:ZN io_oeb[9] 13.095
+1 *11029:ZN io_oeb[9] 13.095
*END
*D_NET *77 0.00207959
*CONN
*P io_out[0] O
-*I *11124:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11154:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[0] 0.00103979
-2 *11124:ZN 0.00103979
+2 *11154:ZN 0.00103979
*RES
-1 *11124:ZN io_out[0] 13.005
+1 *11154:ZN io_out[0] 13.005
*END
*D_NET *78 0.0015227
*CONN
*P io_out[10] O
-*I *11135:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11165:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[10] 0.000761351
-2 *11135:ZN 0.000761351
+2 *11165:ZN 0.000761351
*RES
-1 *11135:ZN io_out[10] 10.215
+1 *11165:ZN io_out[10] 10.215
*END
*D_NET *79 0.00124692
*CONN
*P io_out[11] O
-*I *11136:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11166:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[11] 0.000623462
-2 *11136:ZN 0.000623462
+2 *11166:ZN 0.000623462
*RES
-1 *11136:ZN io_out[11] 9.135
+1 *11166:ZN io_out[11] 9.135
*END
*D_NET *80 0.00156028
*CONN
*P io_out[12] O
-*I *11137:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11167:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[12] 0.000738002
-2 *11137:ZN 0.000738002
+2 *11167:ZN 0.000738002
3 io_oeb[9] io_out[12] 8.42708e-05
*RES
-1 *11137:ZN io_out[12] 10.215
+1 *11167:ZN io_out[12] 10.215
*END
*D_NET *81 0.000847227
*CONN
*P io_out[13] O
-*I *11138:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11168:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[13] 0.000396306
-2 *11138:ZN 0.000396306
+2 *11168:ZN 0.000396306
3 io_out[13] la_data_out[21] 5.46144e-05
*RES
-1 *11138:ZN io_out[13] 11.835
+1 *11168:ZN io_out[13] 11.835
*END
*D_NET *82 0.000843699
*CONN
*P io_out[14] O
-*I *11139:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11169:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[14] 0.000421849
-2 *11139:ZN 0.000421849
+2 *11169:ZN 0.000421849
*RES
-1 *11139:ZN io_out[14] 11.835
+1 *11169:ZN io_out[14] 11.835
*END
*D_NET *83 0.00121003
*CONN
*P io_out[15] O
-*I *11140:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11170:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[15] 0.000545874
-2 *11140:ZN 0.000545874
+2 *11170:ZN 0.000545874
3 io_out[15] la_data_out[44] 0.000118278
*RES
-1 *11140:ZN io_out[15] 8.955
+1 *11170:ZN io_out[15] 8.955
*END
*D_NET *84 0.000942811
*CONN
*P io_out[16] O
-*I *11141:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11171:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[16] 0.000471406
-2 *11141:ZN 0.000471406
+2 *11171:ZN 0.000471406
*RES
-1 *11141:ZN io_out[16] 12.375
+1 *11171:ZN io_out[16] 12.375
*END
*D_NET *85 0.00124692
*CONN
*P io_out[17] O
-*I *11142:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11172:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[17] 0.000623462
-2 *11142:ZN 0.000623462
+2 *11172:ZN 0.000623462
*RES
-1 *11142:ZN io_out[17] 9.135
+1 *11172:ZN io_out[17] 9.135
*END
*D_NET *86 0.00260502
*CONN
*P io_out[18] O
-*I *11143:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11174:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[18] 0.00125842
-2 *11143:ZN 0.00125842
+2 *11174:ZN 0.00125842
3 io_out[18] la_data_out[40] 8.81855e-05
*RES
-1 *11143:ZN io_out[18] 23.265
+1 *11174:ZN io_out[18] 23.265
*END
*D_NET *87 0.0015227
*CONN
*P io_out[19] O
-*I *11145:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11175:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[19] 0.000761351
-2 *11145:ZN 0.000761351
+2 *11175:ZN 0.000761351
*RES
-1 *11145:ZN io_out[19] 10.215
+1 *11175:ZN io_out[19] 10.215
*END
*D_NET *88 0.00125599
*CONN
*P io_out[1] O
-*I *11125:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11155:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[1] 0.000568856
-2 *11125:ZN 0.000568856
+2 *11155:ZN 0.000568856
3 io_out[1] la_data_out[43] 0.000118278
*RES
-1 *11125:ZN io_out[1] 9.135
+1 *11155:ZN io_out[1] 9.135
*END
*D_NET *89 0.000758959
*CONN
*P io_out[20] O
-*I *11146:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11176:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[20] 0.00037948
-2 *11146:ZN 0.00037948
+2 *11176:ZN 0.00037948
*RES
-1 *11146:ZN io_out[20] 11.655
+1 *11176:ZN io_out[20] 11.655
*END
*D_NET *90 0.000628172
*CONN
*P io_out[21] O
-*I *11147:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11177:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[21] 0.000314086
-2 *11147:ZN 0.000314086
+2 *11177:ZN 0.000314086
*RES
-1 *11147:ZN io_out[21] 11.115
+1 *11177:ZN io_out[21] 11.115
*END
*D_NET *91 0.000485048
*CONN
*P io_out[22] O
-*I *11148:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11178:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[22] 0.000242524
-2 *11148:ZN 0.000242524
+2 *11178:ZN 0.000242524
*RES
-1 *11148:ZN io_out[22] 11.025
+1 *11178:ZN io_out[22] 11.025
*END
-*D_NET *92 0.000843699
+*D_NET *92 0.000808176
*CONN
*P io_out[23] O
-*I *11149:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11019:Z O *D gf180mcu_fd_sc_mcu7t5v0__clkbuf_3
*CAP
-1 io_out[23] 0.000421849
-2 *11149:ZN 0.000421849
+1 io_out[23] 0.000404088
+2 *11019:Z 0.000404088
*RES
-1 *11149:ZN io_out[23] 11.835
+1 *11019:Z io_out[23] 11.655
*END
*D_NET *93 0.00126029
*CONN
*P io_out[24] O
-*I *11150:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11179:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[24] 0.000630143
-2 *11150:ZN 0.000630143
+2 *11179:ZN 0.000630143
3 io_out[24] la_data_out[62] 0
*RES
-1 *11150:ZN io_out[24] 9.225
+1 *11179:ZN io_out[24] 9.225
*END
*D_NET *94 0.000942811
*CONN
*P io_out[25] O
-*I *11151:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11180:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[25] 0.000471406
-2 *11151:ZN 0.000471406
+2 *11180:ZN 0.000471406
*RES
-1 *11151:ZN io_out[25] 12.375
+1 *11180:ZN io_out[25] 12.375
*END
*D_NET *95 0.00124692
*CONN
*P io_out[26] O
-*I *11152:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11181:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[26] 0.000623462
-2 *11152:ZN 0.000623462
+2 *11181:ZN 0.000623462
*RES
-1 *11152:ZN io_out[26] 9.135
+1 *11181:ZN io_out[26] 9.135
*END
*D_NET *96 0.00124692
*CONN
*P io_out[27] O
-*I *11153:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11182:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[27] 0.000623462
-2 *11153:ZN 0.000623462
+2 *11182:ZN 0.000623462
*RES
-1 *11153:ZN io_out[27] 9.135
+1 *11182:ZN io_out[27] 9.135
*END
*D_NET *97 0.0015227
*CONN
*P io_out[28] O
-*I *11154:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11183:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[28] 0.000761351
-2 *11154:ZN 0.000761351
+2 *11183:ZN 0.000761351
*RES
-1 *11154:ZN io_out[28] 10.215
+1 *11183:ZN io_out[28] 10.215
*END
*D_NET *98 0.00156127
*CONN
*P io_out[29] O
-*I *11156:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11185:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[29] 0.000780633
-2 *11156:ZN 0.000780633
+2 *11185:ZN 0.000780633
*RES
-1 *11156:ZN io_out[29] 19.1798
+1 *11185:ZN io_out[29] 19.1798
*END
*D_NET *99 0.000790829
*CONN
*P io_out[2] O
-*I *11126:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11156:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[2] 0.000365121
-2 *11126:ZN 0.000365121
+2 *11156:ZN 0.000365121
3 io_out[2] wbs_ack_o 6.05871e-05
*RES
-1 *11126:ZN io_out[2] 11.745
+1 *11156:ZN io_out[2] 11.745
*END
*D_NET *100 0.0015227
*CONN
*P io_out[30] O
-*I *11157:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11186:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[30] 0.000761351
-2 *11157:ZN 0.000761351
+2 *11186:ZN 0.000761351
*RES
-1 *11157:ZN io_out[30] 10.215
+1 *11186:ZN io_out[30] 10.215
*END
*D_NET *101 0.00124692
*CONN
*P io_out[31] O
-*I *11158:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11187:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[31] 0.000623462
-2 *11158:ZN 0.000623462
+2 *11187:ZN 0.000623462
*RES
-1 *11158:ZN io_out[31] 9.135
+1 *11187:ZN io_out[31] 9.135
*END
*D_NET *102 0.00161994
*CONN
*P io_out[32] O
-*I *11159:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11188:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[32] 0.000809971
-2 *11159:ZN 0.000809971
+2 *11188:ZN 0.000809971
3 io_oeb[15] io_out[32] 0
*RES
-1 *11159:ZN io_out[32] 10.665
+1 *11188:ZN io_out[32] 10.665
*END
*D_NET *103 0.000652498
*CONN
*P io_out[33] O
-*I *11160:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11189:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[33] 0.000326249
-2 *11160:ZN 0.000326249
+2 *11189:ZN 0.000326249
*RES
-1 *11160:ZN io_out[33] 11.475
+1 *11189:ZN io_out[33] 11.475
*END
*D_NET *104 0.00124692
*CONN
*P io_out[34] O
-*I *11161:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11190:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[34] 0.000623462
-2 *11161:ZN 0.000623462
+2 *11190:ZN 0.000623462
*RES
-1 *11161:ZN io_out[34] 9.135
+1 *11190:ZN io_out[34] 9.135
*END
*D_NET *105 0.00129289
*CONN
*P io_out[35] O
-*I *11162:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11191:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[35] 0.000646444
-2 *11162:ZN 0.000646444
+2 *11191:ZN 0.000646444
*RES
-1 *11162:ZN io_out[35] 9.315
+1 *11191:ZN io_out[35] 9.315
*END
*D_NET *106 0.00125599
*CONN
*P io_out[36] O
-*I *11163:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11192:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[36] 0.000568856
-2 *11163:ZN 0.000568856
+2 *11192:ZN 0.000568856
3 io_out[36] la_data_out[48] 0.000118278
*RES
-1 *11163:ZN io_out[36] 9.135
+1 *11192:ZN io_out[36] 9.135
*END
*D_NET *107 0.000715875
*CONN
*P io_out[37] O
-*I *11164:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11193:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[37] 0.000357937
-2 *11164:ZN 0.000357937
+2 *11193:ZN 0.000357937
*RES
-1 *11164:ZN io_out[37] 11.475
+1 *11193:ZN io_out[37] 11.475
*END
*D_NET *108 0.0015227
*CONN
*P io_out[3] O
-*I *11127:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11157:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[3] 0.000761351
-2 *11127:ZN 0.000761351
+2 *11157:ZN 0.000761351
*RES
-1 *11127:ZN io_out[3] 10.215
+1 *11157:ZN io_out[3] 10.215
*END
*D_NET *109 0.00124692
*CONN
*P io_out[4] O
-*I *11128:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11158:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[4] 0.000623462
-2 *11128:ZN 0.000623462
+2 *11158:ZN 0.000623462
*RES
-1 *11128:ZN io_out[4] 9.135
+1 *11158:ZN io_out[4] 9.135
*END
*D_NET *110 0.0015227
*CONN
*P io_out[5] O
-*I *11129:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11159:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[5] 0.000761351
-2 *11129:ZN 0.000761351
+2 *11159:ZN 0.000761351
*RES
-1 *11129:ZN io_out[5] 10.215
+1 *11159:ZN io_out[5] 10.215
*END
*D_NET *111 0.000652498
*CONN
*P io_out[6] O
-*I *11130:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11160:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[6] 0.000326249
-2 *11130:ZN 0.000326249
+2 *11160:ZN 0.000326249
*RES
-1 *11130:ZN io_out[6] 11.475
+1 *11160:ZN io_out[6] 11.475
*END
*D_NET *112 0.000899727
*CONN
*P io_out[7] O
-*I *11131:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11161:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[7] 0.000449863
-2 *11131:ZN 0.000449863
+2 *11161:ZN 0.000449863
*RES
-1 *11131:ZN io_out[7] 12.195
+1 *11161:ZN io_out[7] 12.195
*END
*D_NET *113 0.00124692
*CONN
*P io_out[8] O
-*I *11132:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11163:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[8] 0.000623462
-2 *11132:ZN 0.000623462
+2 *11163:ZN 0.000623462
*RES
-1 *11132:ZN io_out[8] 9.135
+1 *11163:ZN io_out[8] 9.135
*END
*D_NET *114 0.00124692
*CONN
*P io_out[9] O
-*I *11134:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11164:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 io_out[9] 0.000623462
-2 *11134:ZN 0.000623462
+2 *11164:ZN 0.000623462
*RES
-1 *11134:ZN io_out[9] 9.135
+1 *11164:ZN io_out[9] 9.135
*END
*D_NET *179 0.00216276
*CONN
*P la_data_out[0] O
-*I *11072:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11101:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[0] 0.00104114
-2 *11072:ZN 0.00104114
+2 *11101:ZN 0.00104114
3 io_oeb[32] la_data_out[0] 8.04696e-05
*RES
-1 *11072:ZN la_data_out[0] 20.698
+1 *11101:ZN la_data_out[0] 20.698
*END
*D_NET *180 0.000758959
*CONN
*P la_data_out[10] O
-*I *11133:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11173:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[10] 0.00037948
-2 *11133:ZN 0.00037948
+2 *11173:ZN 0.00037948
*RES
-1 *11133:ZN la_data_out[10] 11.655
+1 *11173:ZN la_data_out[10] 11.655
*END
*D_NET *181 0.000648189
*CONN
*P la_data_out[11] O
-*I *11144:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11184:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[11] 0.000203112
-2 *11144:ZN 0.000203112
+2 *11184:ZN 0.000203112
3 la_data_out[11] wbs_dat_o[19] 0.000241965
*RES
-1 *11144:ZN la_data_out[11] 11.115
+1 *11184:ZN la_data_out[11] 11.115
*END
*D_NET *182 0.000807801
*CONN
*P la_data_out[12] O
-*I *11155:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11020:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[12] 0.0004039
-2 *11155:ZN 0.0004039
+2 *11020:ZN 0.0004039
*RES
-1 *11155:ZN la_data_out[12] 11.835
+1 *11020:ZN la_data_out[12] 11.835
*END
*D_NET *183 0.00124692
*CONN
*P la_data_out[13] O
-*I *10991:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11031:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[13] 0.000623462
-2 *10991:ZN 0.000623462
+2 *11031:ZN 0.000623462
*RES
-1 *10991:ZN la_data_out[13] 9.135
+1 *11031:ZN la_data_out[13] 9.135
*END
*D_NET *184 0.000688361
*CONN
*P la_data_out[14] O
-*I *11002:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11042:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[14] 0.000309386
-2 *11002:ZN 0.000309386
+2 *11042:ZN 0.000309386
3 io_oeb[37] la_data_out[14] 6.95892e-05
*RES
-1 *11002:ZN la_data_out[14] 11.655
+1 *11042:ZN la_data_out[14] 11.655
*END
*D_NET *185 0.000715875
*CONN
*P la_data_out[15] O
-*I *11013:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11053:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[15] 0.000357937
-2 *11013:ZN 0.000357937
+2 *11053:ZN 0.000357937
*RES
-1 *11013:ZN la_data_out[15] 11.475
+1 *11053:ZN la_data_out[15] 11.475
*END
*D_NET *186 0.000695583
*CONN
*P la_data_out[16] O
-*I *11024:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11064:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[16] 0.000347791
-2 *11024:ZN 0.000347791
+2 *11064:ZN 0.000347791
*RES
-1 *11024:ZN la_data_out[16] 11.655
+1 *11064:ZN la_data_out[16] 11.655
*END
*D_NET *187 0.0015227
*CONN
*P la_data_out[17] O
-*I *11035:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11075:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[17] 0.000761351
-2 *11035:ZN 0.000761351
+2 *11075:ZN 0.000761351
*RES
-1 *11035:ZN la_data_out[17] 10.215
+1 *11075:ZN la_data_out[17] 10.215
*END
*D_NET *188 0.000934645
*CONN
*P la_data_out[18] O
-*I *11046:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11086:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[18] 0.000467322
-2 *11046:ZN 0.000467322
+2 *11086:ZN 0.000467322
*RES
-1 *11046:ZN la_data_out[18] 12.195
+1 *11086:ZN la_data_out[18] 12.195
*END
*D_NET *189 0.00215887
*CONN
*P la_data_out[19] O
-*I *11057:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11097:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[19] 0.000553318
-2 *11057:ZN 0.000553318
+2 *11097:ZN 0.000553318
3 la_data_out[19] la_data_out[25] 0.00105223
*RES
-1 *11057:ZN la_data_out[19] 18.9607
+1 *11097:ZN la_data_out[19] 18.9607
*END
*D_NET *190 0.000948061
*CONN
*P la_data_out[1] O
-*I *11073:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11102:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[1] 0.000440536
-2 *11073:ZN 0.000440536
+2 *11102:ZN 0.000440536
3 la_data_out[1] la_data_out[30] 6.69886e-05
*RES
-1 *11073:ZN la_data_out[1] 12.375
+1 *11102:ZN la_data_out[1] 12.375
*END
*D_NET *191 0.000850885
*CONN
*P la_data_out[20] O
-*I *11068:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11107:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[20] 0.000425443
-2 *11068:ZN 0.000425443
+2 *11107:ZN 0.000425443
*RES
-1 *11068:ZN la_data_out[20] 12.015
+1 *11107:ZN la_data_out[20] 12.015
*END
*D_NET *192 0.000631701
*CONN
*P la_data_out[21] O
-*I *11076:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11108:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[21] 0.000288543
-2 *11076:ZN 0.000288543
+2 *11108:ZN 0.000288543
3 io_out[13] la_data_out[21] 5.46144e-05
*RES
-1 *11076:ZN la_data_out[21] 11.115
+1 *11108:ZN la_data_out[21] 11.115
*END
*D_NET *193 0.000485048
*CONN
*P la_data_out[22] O
-*I *11077:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11109:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[22] 0.000242524
-2 *11077:ZN 0.000242524
+2 *11109:ZN 0.000242524
*RES
-1 *11077:ZN la_data_out[22] 11.025
+1 *11109:ZN la_data_out[22] 11.025
*END
*D_NET *194 0.00125599
*CONN
*P la_data_out[23] O
-*I *11079:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11110:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[23] 0.000568856
-2 *11079:ZN 0.000568856
+2 *11110:ZN 0.000568856
3 io_oeb[16] la_data_out[23] 0.000118278
*RES
-1 *11079:ZN la_data_out[23] 9.135
+1 *11110:ZN la_data_out[23] 9.135
*END
*D_NET *195 0.000715875
*CONN
*P la_data_out[24] O
-*I *11080:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11111:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[24] 0.000357937
-2 *11080:ZN 0.000357937
+2 *11111:ZN 0.000357937
*RES
-1 *11080:ZN la_data_out[24] 11.475
+1 *11111:ZN la_data_out[24] 11.475
*END
*D_NET *196 0.00207557
*CONN
*P la_data_out[25] O
-*I *11081:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11112:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[25] 0.00051167
-2 *11081:ZN 0.00051167
+2 *11112:ZN 0.00051167
3 la_data_out[19] la_data_out[25] 0.00105223
*RES
-1 *11081:ZN la_data_out[25] 18.675
+1 *11112:ZN la_data_out[25] 18.675
*END
*D_NET *197 0.000899727
*CONN
*P la_data_out[26] O
-*I *11082:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11113:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[26] 0.000449863
-2 *11082:ZN 0.000449863
+2 *11113:ZN 0.000449863
*RES
-1 *11082:ZN la_data_out[26] 12.195
+1 *11113:ZN la_data_out[26] 12.195
*END
*D_NET *198 0.0015227
*CONN
*P la_data_out[27] O
-*I *11083:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11114:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[27] 0.000761351
-2 *11083:ZN 0.000761351
+2 *11114:ZN 0.000761351
*RES
-1 *11083:ZN la_data_out[27] 10.215
+1 *11114:ZN la_data_out[27] 10.215
*END
*D_NET *199 0.000942811
*CONN
*P la_data_out[28] O
-*I *11084:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11115:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[28] 0.000471406
-2 *11084:ZN 0.000471406
+2 *11115:ZN 0.000471406
*RES
-1 *11084:ZN la_data_out[28] 12.375
+1 *11115:ZN la_data_out[28] 12.375
*END
*D_NET *200 0.00124692
*CONN
*P la_data_out[29] O
-*I *11085:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11116:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[29] 0.000623462
-2 *11085:ZN 0.000623462
+2 *11116:ZN 0.000623462
*RES
-1 *11085:ZN la_data_out[29] 9.135
+1 *11116:ZN la_data_out[29] 9.135
*END
*D_NET *201 0.000715875
*CONN
*P la_data_out[2] O
-*I *11074:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11103:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[2] 0.000357937
-2 *11074:ZN 0.000357937
+2 *11103:ZN 0.000357937
*RES
-1 *11074:ZN la_data_out[2] 11.475
+1 *11103:ZN la_data_out[2] 11.475
*END
*D_NET *202 0.000764209
*CONN
*P la_data_out[30] O
-*I *11086:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11117:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[30] 0.00034861
-2 *11086:ZN 0.00034861
+2 *11117:ZN 0.00034861
3 la_data_out[1] la_data_out[30] 6.69886e-05
*RES
-1 *11086:ZN la_data_out[30] 11.655
+1 *11117:ZN la_data_out[30] 11.655
*END
*D_NET *203 0.000673155
*CONN
*P la_data_out[31] O
-*I *11087:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11118:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[31] 0.000336578
-2 *11087:ZN 0.000336578
+2 *11118:ZN 0.000336578
*RES
-1 *11087:ZN la_data_out[31] 11.295
+1 *11118:ZN la_data_out[31] 11.295
*END
*D_NET *204 0.00154457
*CONN
*P la_data_out[32] O
-*I *11088:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11119:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[32] 0.000772286
-2 *11088:ZN 0.000772286
+2 *11119:ZN 0.000772286
*RES
-1 *11088:ZN la_data_out[32] 10.215
+1 *11119:ZN la_data_out[32] 10.215
*END
*D_NET *205 0.000850885
*CONN
*P la_data_out[33] O
-*I *11090:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11120:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[33] 0.000425443
-2 *11090:ZN 0.000425443
+2 *11120:ZN 0.000425443
*RES
-1 *11090:ZN la_data_out[33] 12.015
+1 *11120:ZN la_data_out[33] 12.015
*END
*D_NET *206 0.00124692
*CONN
*P la_data_out[34] O
-*I *11091:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11121:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[34] 0.000623462
-2 *11091:ZN 0.000623462
+2 *11121:ZN 0.000623462
*RES
-1 *11091:ZN la_data_out[34] 9.135
+1 *11121:ZN la_data_out[34] 9.135
*END
*D_NET *207 0.0015227
*CONN
*P la_data_out[35] O
-*I *11092:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11122:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[35] 0.000761351
-2 *11092:ZN 0.000761351
+2 *11122:ZN 0.000761351
*RES
-1 *11092:ZN la_data_out[35] 10.215
+1 *11122:ZN la_data_out[35] 10.215
*END
*D_NET *208 0.000485048
*CONN
*P la_data_out[36] O
-*I *11093:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11123:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[36] 0.000242524
-2 *11093:ZN 0.000242524
+2 *11123:ZN 0.000242524
*RES
-1 *11093:ZN la_data_out[36] 11.025
+1 *11123:ZN la_data_out[36] 11.025
*END
*D_NET *209 0.000942811
*CONN
*P la_data_out[37] O
-*I *11094:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11124:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[37] 0.000471406
-2 *11094:ZN 0.000471406
+2 *11124:ZN 0.000471406
*RES
-1 *11094:ZN la_data_out[37] 12.375
+1 *11124:ZN la_data_out[37] 12.375
*END
*D_NET *210 0.000888682
*CONN
*P la_data_out[38] O
-*I *11095:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11125:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[38] 0.000444341
-2 *11095:ZN 0.000444341
+2 *11125:ZN 0.000444341
*RES
-1 *11095:ZN la_data_out[38] 12.015
+1 *11125:ZN la_data_out[38] 12.015
*END
*D_NET *211 0.000758959
*CONN
*P la_data_out[39] O
-*I *11096:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11126:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[39] 0.00037948
-2 *11096:ZN 0.00037948
+2 *11126:ZN 0.00037948
*RES
-1 *11096:ZN la_data_out[39] 11.655
+1 *11126:ZN la_data_out[39] 11.655
*END
*D_NET *212 0.000899727
*CONN
*P la_data_out[3] O
-*I *11075:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11104:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[3] 0.000449863
-2 *11075:ZN 0.000449863
+2 *11104:ZN 0.000449863
*RES
-1 *11075:ZN la_data_out[3] 12.195
+1 *11104:ZN la_data_out[3] 12.195
*END
*D_NET *213 0.000677894
*CONN
*P la_data_out[40] O
-*I *11097:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11127:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[40] 0.000294854
-2 *11097:ZN 0.000294854
+2 *11127:ZN 0.000294854
3 io_out[18] la_data_out[40] 8.81855e-05
*RES
-1 *11097:ZN la_data_out[40] 11.655
+1 *11127:ZN la_data_out[40] 11.655
*END
*D_NET *214 0.000673155
*CONN
*P la_data_out[41] O
-*I *11098:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11128:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[41] 0.000336578
-2 *11098:ZN 0.000336578
+2 *11128:ZN 0.000336578
*RES
-1 *11098:ZN la_data_out[41] 11.295
+1 *11128:ZN la_data_out[41] 11.295
*END
*D_NET *215 0.000485048
*CONN
*P la_data_out[42] O
-*I *11099:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11130:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[42] 0.000242524
-2 *11099:ZN 0.000242524
+2 *11130:ZN 0.000242524
*RES
-1 *11099:ZN la_data_out[42] 11.025
+1 *11130:ZN la_data_out[42] 11.025
*END
*D_NET *216 0.00125599
*CONN
*P la_data_out[43] O
-*I *11101:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11131:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[43] 0.000568856
-2 *11101:ZN 0.000568856
+2 *11131:ZN 0.000568856
3 io_out[1] la_data_out[43] 0.000118278
*RES
-1 *11101:ZN la_data_out[43] 9.135
+1 *11131:ZN la_data_out[43] 9.135
*END
*D_NET *217 0.00130195
*CONN
*P la_data_out[44] O
-*I *11102:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11132:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[44] 0.000591837
-2 *11102:ZN 0.000591837
+2 *11132:ZN 0.000591837
3 io_out[15] la_data_out[44] 0.000118278
*RES
-1 *11102:ZN la_data_out[44] 9.315
+1 *11132:ZN la_data_out[44] 9.315
*END
*D_NET *218 0.0015227
*CONN
*P la_data_out[45] O
-*I *11103:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11133:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[45] 0.000761351
-2 *11103:ZN 0.000761351
+2 *11133:ZN 0.000761351
*RES
-1 *11103:ZN la_data_out[45] 10.215
+1 *11133:ZN la_data_out[45] 10.215
*END
*D_NET *219 0.0015227
*CONN
*P la_data_out[46] O
-*I *11104:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11134:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[46] 0.000761351
-2 *11104:ZN 0.000761351
+2 *11134:ZN 0.000761351
*RES
-1 *11104:ZN la_data_out[46] 10.215
+1 *11134:ZN la_data_out[46] 10.215
*END
*D_NET *220 0.000715875
*CONN
*P la_data_out[47] O
-*I *11105:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11135:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[47] 0.000357937
-2 *11105:ZN 0.000357937
+2 *11135:ZN 0.000357937
*RES
-1 *11105:ZN la_data_out[47] 11.475
+1 *11135:ZN la_data_out[47] 11.475
*END
*D_NET *221 0.00125599
*CONN
*P la_data_out[48] O
-*I *11106:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11136:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[48] 0.000568856
-2 *11106:ZN 0.000568856
+2 *11136:ZN 0.000568856
3 io_out[36] la_data_out[48] 0.000118278
*RES
-1 *11106:ZN la_data_out[48] 9.135
+1 *11136:ZN la_data_out[48] 9.135
*END
*D_NET *222 0.00124692
*CONN
*P la_data_out[49] O
-*I *11107:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11137:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[49] 0.000623462
-2 *11107:ZN 0.000623462
+2 *11137:ZN 0.000623462
*RES
-1 *11107:ZN la_data_out[49] 9.135
+1 *11137:ZN la_data_out[49] 9.135
*END
*D_NET *223 0.0015227
*CONN
*P la_data_out[4] O
-*I *10990:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11105:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[4] 0.000761351
-2 *10990:ZN 0.000761351
+2 *11105:ZN 0.000761351
*RES
-1 *10990:ZN la_data_out[4] 10.215
+1 *11105:ZN la_data_out[4] 10.215
*END
*D_NET *224 0.00141943
*CONN
*P la_data_out[50] O
-*I *11108:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11138:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[50] 0.000634638
-2 *11108:ZN 0.000634638
+2 *11138:ZN 0.000634638
3 io_oeb[19] la_data_out[50] 0.000150157
*RES
-1 *11108:ZN la_data_out[50] 9.765
+1 *11138:ZN la_data_out[50] 9.765
*END
*D_NET *225 0.000843699
*CONN
*P la_data_out[51] O
-*I *11109:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11139:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[51] 0.000421849
-2 *11109:ZN 0.000421849
+2 *11139:ZN 0.000421849
*RES
-1 *11109:ZN la_data_out[51] 11.835
+1 *11139:ZN la_data_out[51] 11.835
*END
*D_NET *226 0.000942811
*CONN
*P la_data_out[52] O
-*I *11110:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11141:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[52] 0.000471406
-2 *11110:ZN 0.000471406
+2 *11141:ZN 0.000471406
*RES
-1 *11110:ZN la_data_out[52] 12.375
+1 *11141:ZN la_data_out[52] 12.375
*END
*D_NET *227 0.000652498
*CONN
*P la_data_out[53] O
-*I *11112:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11142:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[53] 0.000326249
-2 *11112:ZN 0.000326249
+2 *11142:ZN 0.000326249
*RES
-1 *11112:ZN la_data_out[53] 11.475
+1 *11142:ZN la_data_out[53] 11.475
*END
*D_NET *228 0.000758959
*CONN
*P la_data_out[54] O
-*I *11113:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11143:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[54] 0.00037948
-2 *11113:ZN 0.00037948
+2 *11143:ZN 0.00037948
*RES
-1 *11113:ZN la_data_out[54] 11.655
+1 *11143:ZN la_data_out[54] 11.655
*END
*D_NET *229 0.0015227
*CONN
*P la_data_out[55] O
-*I *11114:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11144:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[55] 0.000761351
-2 *11114:ZN 0.000761351
+2 *11144:ZN 0.000761351
*RES
-1 *11114:ZN la_data_out[55] 10.215
+1 *11144:ZN la_data_out[55] 10.215
*END
*D_NET *230 0.000888682
*CONN
*P la_data_out[56] O
-*I *11115:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11145:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[56] 0.000444341
-2 *11115:ZN 0.000444341
+2 *11145:ZN 0.000444341
*RES
-1 *11115:ZN la_data_out[56] 12.015
+1 *11145:ZN la_data_out[56] 12.015
*END
*D_NET *231 0.0015227
*CONN
*P la_data_out[57] O
-*I *11116:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11146:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[57] 0.000761351
-2 *11116:ZN 0.000761351
+2 *11146:ZN 0.000761351
*RES
-1 *11116:ZN la_data_out[57] 10.215
+1 *11146:ZN la_data_out[57] 10.215
*END
*D_NET *232 0.000850885
*CONN
*P la_data_out[58] O
-*I *11117:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11147:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[58] 0.000425443
-2 *11117:ZN 0.000425443
+2 *11147:ZN 0.000425443
*RES
-1 *11117:ZN la_data_out[58] 12.015
+1 *11147:ZN la_data_out[58] 12.015
*END
*D_NET *233 0.000899727
*CONN
*P la_data_out[59] O
-*I *11118:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11148:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[59] 0.000449863
-2 *11118:ZN 0.000449863
+2 *11148:ZN 0.000449863
+3 la_data_out[59] *11019:I 0
*RES
-1 *11118:ZN la_data_out[59] 12.195
+1 *11148:ZN la_data_out[59] 12.195
*END
*D_NET *234 0.000695583
*CONN
*P la_data_out[5] O
-*I *11078:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11106:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[5] 0.000347791
-2 *11078:ZN 0.000347791
+2 *11106:ZN 0.000347791
*RES
-1 *11078:ZN la_data_out[5] 11.655
+1 *11106:ZN la_data_out[5] 11.655
*END
-*D_NET *235 0.00165148
+*D_NET *235 0.00161994
*CONN
*P la_data_out[60] O
-*I *11119:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11149:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
-1 la_data_out[60] 0.000825739
-2 *11119:ZN 0.000825739
+1 la_data_out[60] 0.000809971
+2 *11149:ZN 0.000809971
*RES
-1 *11119:ZN la_data_out[60] 19.575
+1 *11149:ZN la_data_out[60] 10.665
*END
*D_NET *236 0.00124692
*CONN
*P la_data_out[61] O
-*I *11120:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11150:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[61] 0.000623462
-2 *11120:ZN 0.000623462
+2 *11150:ZN 0.000623462
*RES
-1 *11120:ZN la_data_out[61] 9.135
+1 *11150:ZN la_data_out[61] 9.135
*END
*D_NET *237 0.00156127
*CONN
*P la_data_out[62] O
-*I *11121:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11152:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[62] 0.000780633
-2 *11121:ZN 0.000780633
+2 *11152:ZN 0.000780633
3 io_out[24] la_data_out[62] 0
*RES
-1 *11121:ZN la_data_out[62] 19.1798
+1 *11152:ZN la_data_out[62] 19.1798
*END
*D_NET *238 0.000485048
*CONN
*P la_data_out[63] O
-*I *11123:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11153:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[63] 0.000242524
-2 *11123:ZN 0.000242524
+2 *11153:ZN 0.000242524
*RES
-1 *11123:ZN la_data_out[63] 11.025
+1 *11153:ZN la_data_out[63] 11.025
*END
*D_NET *239 0.000850885
*CONN
*P la_data_out[6] O
-*I *11089:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11129:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[6] 0.000425443
-2 *11089:ZN 0.000425443
+2 *11129:ZN 0.000425443
*RES
-1 *11089:ZN la_data_out[6] 12.015
+1 *11129:ZN la_data_out[6] 12.015
*END
*D_NET *240 0.00196319
*CONN
*P la_data_out[7] O
-*I *11100:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11140:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[7] 0.000981596
-2 *11100:ZN 0.000981596
+2 *11140:ZN 0.000981596
3 io_oeb[23] la_data_out[7] 0
*RES
-1 *11100:ZN la_data_out[7] 12.465
+1 *11140:ZN la_data_out[7] 12.465
*END
*D_NET *241 0.000807801
*CONN
*P la_data_out[8] O
-*I *11111:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11151:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[8] 0.0004039
-2 *11111:ZN 0.0004039
+2 *11151:ZN 0.0004039
*RES
-1 *11111:ZN la_data_out[8] 11.835
+1 *11151:ZN la_data_out[8] 11.835
*END
*D_NET *242 0.000485048
*CONN
*P la_data_out[9] O
-*I *11122:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11162:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 la_data_out[9] 0.000242524
-2 *11122:ZN 0.000242524
+2 *11162:ZN 0.000242524
*RES
-1 *11122:ZN la_data_out[9] 11.025
+1 *11162:ZN la_data_out[9] 11.025
*END
*D_NET *308 0.000850885
*CONN
*P user_irq[0] O
-*I *11032:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11061:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 user_irq[0] 0.000425443
-2 *11032:ZN 0.000425443
+2 *11061:ZN 0.000425443
*RES
-1 *11032:ZN user_irq[0] 12.015
+1 *11061:ZN user_irq[0] 12.015
*END
*D_NET *309 0.0015227
*CONN
*P user_irq[1] O
-*I *11033:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11062:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 user_irq[1] 0.000761351
-2 *11033:ZN 0.000761351
+2 *11062:ZN 0.000761351
*RES
-1 *11033:ZN user_irq[1] 10.215
+1 *11062:ZN user_irq[1] 10.215
*END
*D_NET *310 0.000812548
*CONN
*P user_irq[2] O
-*I *11034:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11063:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 user_irq[2] 0.000375874
-2 *11034:ZN 0.000375874
+2 *11063:ZN 0.000375874
3 user_irq[2] wbs_dat_o[30] 6.07998e-05
*RES
-1 *11034:ZN user_irq[2] 11.835
+1 *11063:ZN user_irq[2] 11.835
*END
*D_NET *315 0.000892669
*CONN
*P wbs_ack_o O
-*I *11036:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11065:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_ack_o 0.000416041
-2 *11036:ZN 0.000416041
+2 *11065:ZN 0.000416041
3 io_out[2] wbs_ack_o 6.05871e-05
*RES
-1 *11036:ZN wbs_ack_o 12.015
+1 *11065:ZN wbs_ack_o 12.015
*END
*D_NET *381 0.000899727
*CONN
*P wbs_dat_o[0] O
-*I *11037:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11066:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[0] 0.000449863
-2 *11037:ZN 0.000449863
+2 *11066:ZN 0.000449863
*RES
-1 *11037:ZN wbs_dat_o[0] 12.195
+1 *11066:ZN wbs_dat_o[0] 12.195
*END
*D_NET *382 0.000942811
*CONN
*P wbs_dat_o[10] O
-*I *11048:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11077:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[10] 0.000471406
-2 *11048:ZN 0.000471406
+2 *11077:ZN 0.000471406
*RES
-1 *11048:ZN wbs_dat_o[10] 12.375
+1 *11077:ZN wbs_dat_o[10] 12.375
*END
*D_NET *383 0.00124692
*CONN
*P wbs_dat_o[11] O
-*I *11049:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11078:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[11] 0.000623462
-2 *11049:ZN 0.000623462
+2 *11078:ZN 0.000623462
*RES
-1 *11049:ZN wbs_dat_o[11] 9.135
+1 *11078:ZN wbs_dat_o[11] 9.135
*END
*D_NET *384 0.000695583
*CONN
*P wbs_dat_o[12] O
-*I *11050:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11079:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[12] 0.000347791
-2 *11050:ZN 0.000347791
+2 *11079:ZN 0.000347791
*RES
-1 *11050:ZN wbs_dat_o[12] 11.655
+1 *11079:ZN wbs_dat_o[12] 11.655
*END
*D_NET *385 0.0015227
*CONN
*P wbs_dat_o[13] O
-*I *11051:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11080:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[13] 0.000761351
-2 *11051:ZN 0.000761351
+2 *11080:ZN 0.000761351
*RES
-1 *11051:ZN wbs_dat_o[13] 10.215
+1 *11080:ZN wbs_dat_o[13] 10.215
*END
*D_NET *386 0.000695583
*CONN
*P wbs_dat_o[14] O
-*I *11052:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11081:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[14] 0.000347791
-2 *11052:ZN 0.000347791
+2 *11081:ZN 0.000347791
*RES
-1 *11052:ZN wbs_dat_o[14] 11.655
+1 *11081:ZN wbs_dat_o[14] 11.655
*END
*D_NET *387 0.0015227
*CONN
*P wbs_dat_o[15] O
-*I *11053:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11082:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[15] 0.000761351
-2 *11053:ZN 0.000761351
+2 *11082:ZN 0.000761351
*RES
-1 *11053:ZN wbs_dat_o[15] 10.215
+1 *11082:ZN wbs_dat_o[15] 10.215
*END
*D_NET *388 0.000807801
*CONN
*P wbs_dat_o[16] O
-*I *11054:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11083:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[16] 0.0004039
-2 *11054:ZN 0.0004039
+2 *11083:ZN 0.0004039
*RES
-1 *11054:ZN wbs_dat_o[16] 11.835
+1 *11083:ZN wbs_dat_o[16] 11.835
*END
*D_NET *389 0.000807801
*CONN
*P wbs_dat_o[17] O
-*I *11055:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11084:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[17] 0.0004039
-2 *11055:ZN 0.0004039
+2 *11084:ZN 0.0004039
*RES
-1 *11055:ZN wbs_dat_o[17] 11.835
+1 *11084:ZN wbs_dat_o[17] 11.835
*END
*D_NET *390 0.00124692
*CONN
*P wbs_dat_o[18] O
-*I *11056:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11085:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[18] 0.000623462
-2 *11056:ZN 0.000623462
+2 *11085:ZN 0.000623462
*RES
-1 *11056:ZN wbs_dat_o[18] 9.135
+1 *11085:ZN wbs_dat_o[18] 9.135
*END
*D_NET *391 0.00234943
*CONN
*P wbs_dat_o[19] O
-*I *11058:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11087:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[19] 0.00105373
-2 *11058:ZN 0.00105373
+2 *11087:ZN 0.00105373
3 la_data_out[11] wbs_dat_o[19] 0.000241965
*RES
-1 *11058:ZN wbs_dat_o[19] 22.455
+1 *11087:ZN wbs_dat_o[19] 22.455
*END
*D_NET *392 0.00124692
*CONN
*P wbs_dat_o[1] O
-*I *11038:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11067:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[1] 0.000623462
-2 *11038:ZN 0.000623462
+2 *11067:ZN 0.000623462
*RES
-1 *11038:ZN wbs_dat_o[1] 9.135
+1 *11067:ZN wbs_dat_o[1] 9.135
*END
*D_NET *393 0.000628172
*CONN
*P wbs_dat_o[20] O
-*I *11059:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11088:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[20] 0.000314086
-2 *11059:ZN 0.000314086
+2 *11088:ZN 0.000314086
*RES
-1 *11059:ZN wbs_dat_o[20] 11.115
+1 *11088:ZN wbs_dat_o[20] 11.115
*END
*D_NET *394 0.000807801
*CONN
*P wbs_dat_o[21] O
-*I *11060:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11089:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[21] 0.0004039
-2 *11060:ZN 0.0004039
+2 *11089:ZN 0.0004039
*RES
-1 *11060:ZN wbs_dat_o[21] 11.835
+1 *11089:ZN wbs_dat_o[21] 11.835
*END
*D_NET *395 0.0015227
*CONN
*P wbs_dat_o[22] O
-*I *11061:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11090:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[22] 0.000761351
-2 *11061:ZN 0.000761351
+2 *11090:ZN 0.000761351
*RES
-1 *11061:ZN wbs_dat_o[22] 10.215
+1 *11090:ZN wbs_dat_o[22] 10.215
*END
*D_NET *396 0.000652498
*CONN
*P wbs_dat_o[23] O
-*I *11062:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11091:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[23] 0.000326249
-2 *11062:ZN 0.000326249
+2 *11091:ZN 0.000326249
*RES
-1 *11062:ZN wbs_dat_o[23] 11.475
+1 *11091:ZN wbs_dat_o[23] 11.475
*END
*D_NET *397 0.00124692
*CONN
*P wbs_dat_o[24] O
-*I *11063:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11092:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[24] 0.000623462
-2 *11063:ZN 0.000623462
+2 *11092:ZN 0.000623462
*RES
-1 *11063:ZN wbs_dat_o[24] 9.135
+1 *11092:ZN wbs_dat_o[24] 9.135
*END
*D_NET *398 0.00124692
*CONN
*P wbs_dat_o[25] O
-*I *11064:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11093:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[25] 0.000623462
-2 *11064:ZN 0.000623462
+2 *11093:ZN 0.000623462
*RES
-1 *11064:ZN wbs_dat_o[25] 9.135
+1 *11093:ZN wbs_dat_o[25] 9.135
*END
*D_NET *399 0.0015227
*CONN
*P wbs_dat_o[26] O
-*I *11065:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11094:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[26] 0.000761351
-2 *11065:ZN 0.000761351
+2 *11094:ZN 0.000761351
*RES
-1 *11065:ZN wbs_dat_o[26] 10.215
+1 *11094:ZN wbs_dat_o[26] 10.215
*END
*D_NET *400 0.0015227
*CONN
*P wbs_dat_o[27] O
-*I *11066:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11095:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[27] 0.000761351
-2 *11066:ZN 0.000761351
+2 *11095:ZN 0.000761351
*RES
-1 *11066:ZN wbs_dat_o[27] 10.215
+1 *11095:ZN wbs_dat_o[27] 10.215
*END
*D_NET *401 0.00124692
*CONN
*P wbs_dat_o[28] O
-*I *11067:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11096:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[28] 0.000623462
-2 *11067:ZN 0.000623462
+2 *11096:ZN 0.000623462
*RES
-1 *11067:ZN wbs_dat_o[28] 9.135
+1 *11096:ZN wbs_dat_o[28] 9.135
*END
*D_NET *402 0.0015227
*CONN
*P wbs_dat_o[29] O
-*I *11069:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11098:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[29] 0.000761351
-2 *11069:ZN 0.000761351
+2 *11098:ZN 0.000761351
*RES
-1 *11069:ZN wbs_dat_o[29] 10.215
+1 *11098:ZN wbs_dat_o[29] 10.215
*END
*D_NET *403 0.000758959
*CONN
*P wbs_dat_o[2] O
-*I *11039:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11068:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[2] 0.00037948
-2 *11039:ZN 0.00037948
+2 *11068:ZN 0.00037948
*RES
-1 *11039:ZN wbs_dat_o[2] 11.655
+1 *11068:ZN wbs_dat_o[2] 11.655
*END
*D_NET *404 0.000718252
*CONN
*P wbs_dat_o[30] O
-*I *11070:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11099:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[30] 0.000328726
-2 *11070:ZN 0.000328726
+2 *11099:ZN 0.000328726
3 user_irq[2] wbs_dat_o[30] 6.07998e-05
*RES
-1 *11070:ZN wbs_dat_o[30] 11.925
+1 *11099:ZN wbs_dat_o[30] 11.925
*END
*D_NET *405 0.000695583
*CONN
*P wbs_dat_o[31] O
-*I *11071:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11100:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[31] 0.000347791
-2 *11071:ZN 0.000347791
+2 *11100:ZN 0.000347791
*RES
-1 *11071:ZN wbs_dat_o[31] 11.655
+1 *11100:ZN wbs_dat_o[31] 11.655
*END
*D_NET *406 0.00120096
*CONN
*P wbs_dat_o[3] O
-*I *11040:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11069:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[3] 0.000600481
-2 *11040:ZN 0.000600481
+2 *11069:ZN 0.000600481
*RES
-1 *11040:ZN wbs_dat_o[3] 8.955
+1 *11069:ZN wbs_dat_o[3] 8.955
*END
*D_NET *407 0.00124692
*CONN
*P wbs_dat_o[4] O
-*I *11041:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11070:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[4] 0.000623462
-2 *11041:ZN 0.000623462
+2 *11070:ZN 0.000623462
*RES
-1 *11041:ZN wbs_dat_o[4] 9.135
+1 *11070:ZN wbs_dat_o[4] 9.135
*END
*D_NET *408 0.000715875
*CONN
*P wbs_dat_o[5] O
-*I *11042:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11071:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[5] 0.000357937
-2 *11042:ZN 0.000357937
+2 *11071:ZN 0.000357937
*RES
-1 *11042:ZN wbs_dat_o[5] 11.475
+1 *11071:ZN wbs_dat_o[5] 11.475
*END
*D_NET *409 0.000695583
*CONN
*P wbs_dat_o[6] O
-*I *11043:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11072:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[6] 0.000347791
-2 *11043:ZN 0.000347791
+2 *11072:ZN 0.000347791
*RES
-1 *11043:ZN wbs_dat_o[6] 11.655
+1 *11072:ZN wbs_dat_o[6] 11.655
*END
*D_NET *410 0.00124692
*CONN
*P wbs_dat_o[7] O
-*I *11044:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11073:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[7] 0.000623462
-2 *11044:ZN 0.000623462
+2 *11073:ZN 0.000623462
*RES
-1 *11044:ZN wbs_dat_o[7] 9.135
+1 *11073:ZN wbs_dat_o[7] 9.135
*END
*D_NET *411 0.00186673
*CONN
*P wbs_dat_o[8] O
-*I *11045:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11074:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[8] 0.000858284
-2 *11045:ZN 0.000858284
+2 *11074:ZN 0.000858284
3 wbs_dat_o[8] wbs_dat_o[9] 0.000150157
*RES
-1 *11045:ZN wbs_dat_o[8] 20.475
+1 *11074:ZN wbs_dat_o[8] 20.475
*END
*D_NET *412 0.00153434
*CONN
*P wbs_dat_o[9] O
-*I *11047:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
+*I *11076:ZN O *D gf180mcu_fd_sc_mcu7t5v0__tiel
*CAP
1 wbs_dat_o[9] 0.000692092
-2 *11047:ZN 0.000692092
+2 *11076:ZN 0.000692092
3 wbs_dat_o[8] wbs_dat_o[9] 0.000150157
*RES
-1 *11047:ZN wbs_dat_o[9] 10.215
+1 *11076:ZN wbs_dat_o[9] 10.215
+*END
+
+*D_NET *419 0.000464382
+*CONN
+*I *11016:I I *D gf180mcu_fd_sc_mcu7t5v0__clkbuf_1
+*I *11015:ZN O *D gf180mcu_fd_sc_mcu7t5v0__xnor2_1
+*CAP
+1 *11016:I 0.000210705
+2 *11015:ZN 0.000210705
+3 *11016:I *11015:A1 0
+4 *11016:I *11015:A2 3.22289e-05
+5 *11016:I *11019:I 1.0743e-05
+*RES
+1 *11015:ZN *11016:I 10.53
+*END
+
+*D_NET *420 0.0132007
+*CONN
+*I *423:I I *D gf180mcu_fd_sc_mcu7t5v0__antenna
+*I *11015:A1 I *D gf180mcu_fd_sc_mcu7t5v0__xnor2_1
+*I *11017:Z O *D gf180mcu_fd_sc_mcu7t5v0__dlyb_1
+*CAP
+1 *423:I 0
+2 *11015:A1 0.00019346
+3 *11017:Z 0.00640689
+4 *420:11 0.00660036
+5 *11015:A1 *11015:A2 0
+6 *420:11 *11015:A2 0
+7 *11016:I *11015:A1 0
+*RES
+1 *11017:Z *420:11 46.62
+2 *420:11 *11015:A1 14.94
+3 *420:11 *423:I 4.5
+*END
+
+*D_NET *421 0.000445537
+*CONN
+*I *11015:A2 I *D gf180mcu_fd_sc_mcu7t5v0__xnor2_1
+*I *11018:Z O *D gf180mcu_fd_sc_mcu7t5v0__dlyb_1
+*CAP
+1 *11015:A2 0.000206654
+2 *11018:Z 0.000206654
+3 *11015:A1 *11015:A2 0
+4 *11016:I *11015:A2 3.22289e-05
+5 *5:8 *11015:A2 0
+6 *420:11 *11015:A2 0
+*RES
+1 *11018:Z *11015:A2 10.44
+*END
+
+*D_NET *422 0.00162396
+*CONN
+*I *11019:I I *D gf180mcu_fd_sc_mcu7t5v0__clkbuf_3
+*I *11016:Z O *D gf180mcu_fd_sc_mcu7t5v0__clkbuf_1
+*CAP
+1 *11019:I 0.00080661
+2 *11016:Z 0.00080661
+3 la_data_out[59] *11019:I 0
+4 *11016:I *11019:I 1.0743e-05
+*RES
+1 *11016:Z *11019:I 14.31
*END
diff --git a/spi/lvs/tiny_user_project.spice b/spi/lvs/tiny_user_project.spice
index 0feda50..5174c8e 100644
--- a/spi/lvs/tiny_user_project.spice
+++ b/spi/lvs/tiny_user_project.spice
@@ -36,10 +36,30 @@
.subckt gf180mcu_fd_sc_mcu7t5v0__endcap VDD VSS
.ends
+* Black-box entry subcircuit for gf180mcu_fd_sc_mcu7t5v0__antenna abstract view
+.subckt gf180mcu_fd_sc_mcu7t5v0__antenna I VDD VSS
+.ends
+
+* Black-box entry subcircuit for gf180mcu_fd_sc_mcu7t5v0__clkbuf_1 abstract view
+.subckt gf180mcu_fd_sc_mcu7t5v0__clkbuf_1 I Z VDD VSS
+.ends
+
+* Black-box entry subcircuit for gf180mcu_fd_sc_mcu7t5v0__xnor2_1 abstract view
+.subckt gf180mcu_fd_sc_mcu7t5v0__xnor2_1 A1 A2 ZN VDD VSS
+.ends
+
* Black-box entry subcircuit for gf180mcu_fd_sc_mcu7t5v0__tiel abstract view
.subckt gf180mcu_fd_sc_mcu7t5v0__tiel ZN VDD VSS
.ends
+* Black-box entry subcircuit for gf180mcu_fd_sc_mcu7t5v0__dlyb_1 abstract view
+.subckt gf180mcu_fd_sc_mcu7t5v0__dlyb_1 I Z VDD VSS
+.ends
+
+* Black-box entry subcircuit for gf180mcu_fd_sc_mcu7t5v0__clkbuf_3 abstract view
+.subckt gf180mcu_fd_sc_mcu7t5v0__clkbuf_3 I Z VDD VSS
+.ends
+
.subckt tiny_user_project io_in[0] io_in[10] io_in[11] io_in[12] io_in[13] io_in[14]
+ io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21] io_in[22]
+ io_in[23] io_in[24] io_in[25] io_in[26] io_in[27] io_in[28] io_in[29] io_in[2] io_in[30]
@@ -333,9 +353,9 @@
XTAP_348 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_359 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_48_960 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_94_598 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_47_492 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_81_215 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-XFILLER_94_598 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_50_602 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_63_996 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_148_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -575,8 +595,8 @@
XTAP_508 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_61_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_78_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_47_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_94_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_47_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_19_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_74_460 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_93_279 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -738,6 +758,7 @@
XFILLER_68_886 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_43_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XTAP_1109 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XFILLER_63_19 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_149_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_10_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_23_499 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -905,12 +926,13 @@
XPHY_320 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_101_70 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_12_531 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_61_63 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
XFILLER_145_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_125_499 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_112_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XTAP_339 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
-XFILLER_39_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_94_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_39_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_19_141 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_66_247 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_35_634 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -1595,6 +1617,7 @@
XFILLER_113_279 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_86_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_110_953 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XANTENNA_input1_I io_in[12] vdd vss gf180mcu_fd_sc_mcu7t5v0__antenna
XFILLER_27_208 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_68_889 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_82_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -1647,7 +1670,7 @@
XFILLER_21_918 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_158_463 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_146_669 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_64_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
+XFILLER_64_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_160_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_142_886 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_87_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -1667,6 +1690,7 @@
XFILLER_101_783 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_46_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XTAP_2100 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XFILLER_64_21 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
XFILLER_73_144 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XTAP_2144 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2133 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -1772,7 +1796,6 @@
XFILLER_12_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_131_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_8_527 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_61_66 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_153_712 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_125_425 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_4_744 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -1837,7 +1860,7 @@
XFILLER_36_957 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XPHY_0 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_63_776 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_94_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
+XFILLER_94_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_148_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_164_807 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_30_172 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -1968,6 +1991,7 @@
XTAP_2134 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2123 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2112 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XFILLER_64_33 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_161_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XTAP_2167 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2156 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -2001,6 +2025,7 @@
XFILLER_52_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XTAP_2690 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_21_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XANTENNA__001__A1 net1 vdd vss gf180mcu_fd_sc_mcu7t5v0__antenna
XFILLER_158_250 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_146_456 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_115_854 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -2272,7 +2297,6 @@
XTAP_2113 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2102 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_27_563 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_64_34 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_74_669 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XTAP_2168 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2157 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -2542,6 +2566,7 @@
XFILLER_111_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_1_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_77_634 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_94_21 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
XFILLER_40_1043 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_27_70 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_73_851 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -2549,6 +2574,7 @@
XFILLER_60_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_159_989 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_9_421 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_64_5 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_160_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_126_385 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_142_889 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -2604,7 +2630,7 @@
XTAP_1980 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1991 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_118_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-XFILLER_62_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
+XFILLER_62_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_161_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_86_1043 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_141_141 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -2670,6 +2696,7 @@
XFILLER_80_960 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XPHY_326 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_52_673 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_61_47 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_125_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_152_247 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_4_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -2750,6 +2777,7 @@
XFILLER_16_673 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_90_598 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_43_492 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_94_5 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_157_851 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_144_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_116_247 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -2834,6 +2862,7 @@
XFILLER_103_283 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_76_101 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_92_605 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_94_33 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_17_212 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_58_882 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_64_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -2970,6 +2999,7 @@
XPHY_327 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_101_66 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_12_527 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_61_15 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_137_212 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_153_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_119_993 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -3039,6 +3069,7 @@
XPHY_168 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XPHY_179 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_122_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
+X_002_ _000_ net3 vdd vss gf180mcu_fd_sc_mcu7t5v0__clkbuf_1
XFILLER_138_598 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_125_215 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_21_73 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -3132,7 +3163,6 @@
XFILLER_135_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_151_847 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_89_496 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-XFILLER_94_34 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_76_179 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_18_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_17_279 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -3204,6 +3234,7 @@
XFILLER_158_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_9_286 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_127_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_62_4 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_154_460 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_6_960 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_115_847 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -3338,6 +3369,7 @@
XPHY_158 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_8_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XPHY_169 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
+X_001_ net1 net2 _000_ vdd vss gf180mcu_fd_sc_mcu7t5v0__xnor2_1
XFILLER_119_780 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_115_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_141_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -3436,7 +3468,6 @@
XFILLER_5_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_153_141 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_142_815 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-XFILLER_57_7 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_96_957 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_49_851 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_36_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -3855,6 +3886,7 @@
XFILLER_60_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_60_1039 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_68_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+Xinput1 io_in[12] net1 vdd vss gf180mcu_fd_sc_mcu7t5v0__dlyb_1
XFILLER_84_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_37_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_64_460 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -4038,6 +4070,7 @@
XTAP_2108 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2119 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_15_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_64_29 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_70_815 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XTAP_1407 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1418 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -4141,6 +4174,7 @@
XFILLER_57_918 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_110_385 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_28_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+Xinput2 io_in[13] net2 vdd vss gf180mcu_fd_sc_mcu7t5v0__dlyb_1
XFILLER_24_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XPHY_309 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_40_818 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -4368,7 +4402,6 @@
XFILLER_110_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_95_212 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
Xtiny_user_project_150 wbs_dat_o[9] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-XFILLER_95_70 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_23_1044 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_77_993 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
Xtiny_user_project_172 wbs_dat_o[31] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
@@ -4509,6 +4542,7 @@
XFILLER_90_527 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XPHY_9 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_43_421 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_62_30 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_31_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_8_889 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_156_389 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -4522,8 +4556,8 @@
XTAP_649 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_627 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
-XFILLER_39_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_94_811 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_39_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_121_993 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_93_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_35_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -4621,8 +4655,8 @@
XFILLER_98_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_63_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
XFILLER_67_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-XFILLER_39_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_94_460 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_39_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_55_847 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XTAP_1409 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_120_37 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -4796,7 +4830,6 @@
XFILLER_111_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_96_385 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_38_953 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_1 la_data_out[4] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_65_783 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_71_208 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_37_496 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -4895,6 +4928,7 @@
XFILLER_100_953 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XTAP_981 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_992 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XFILLER_94_29 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_17_208 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_58_889 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_72_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -5038,7 +5072,7 @@
XFILLER_96_534 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_68_247 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
Xtiny_user_project_91 io_out[30] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_80 io_out[19] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_80 io_out[18] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_37_634 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_92_740 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_80_957 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -5099,7 +5133,6 @@
XFILLER_69_567 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_99_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_64_250 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_2 la_data_out[5] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_52_456 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XPHY_109 vdd vss gf180mcu_fd_sc_mcu7t5v0__endcap
XFILLER_162_1031 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
@@ -5152,6 +5185,7 @@
XFILLER_161_350 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_164_78 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_88_673 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_57_65 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_28_250 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_16_456 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_43_286 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -5262,6 +5296,7 @@
XFILLER_95_215 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
Xtiny_user_project_131 io_oeb[32] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_95_73 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_95_51 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
Xtiny_user_project_142 wbs_dat_o[1] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_120 io_oeb[21] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_64_602 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -5331,10 +5366,10 @@
XFILLER_69_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_151_993 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_122_172 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+Xtiny_user_project_81 io_out[19] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_110_389 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
Xtiny_user_project_92 io_out[31] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_70 io_out[9] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_81 io_out[20] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_70 io_out[8] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_36_101 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_65_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_24_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -5397,7 +5432,6 @@
XFILLER_37_421 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_53_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_25_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_3 la_data_out[6] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_80_744 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_36_1024 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_162_1043 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
@@ -5418,6 +5452,7 @@
XFILLER_15_137 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_70_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_12_811 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_62_22 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
XFILLER_141_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_11_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_8_815 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -5518,8 +5553,8 @@
XFILLER_31_279 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_145_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_140_321 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-XFILLER_39_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_94_463 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_39_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_66_176 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_82_669 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_35_563 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -5639,9 +5674,9 @@
XFILLER_111_847 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_1_492 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
Xtiny_user_project_93 io_out[32] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_71 io_out[10] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_82 io_out[21] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_60 la_data_out[63] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_71 io_out[9] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_60 la_data_out[62] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_82 io_out[20] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_77_783 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_83_208 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_49_496 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -5697,9 +5732,9 @@
XFILLER_116_1024 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_57_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_110_176 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_4 la_data_out[7] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_24_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_37_499 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+Xtiny_user_project_4 la_data_out[6] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_123_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_118_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_134_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -5874,6 +5909,7 @@
Xtiny_user_project_144 wbs_dat_o[3] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_166 wbs_dat_o[25] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_155 wbs_dat_o[14] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_177 la_data_out[4] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_92_957 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_45_851 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_149_208 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -5934,10 +5970,10 @@
XFILLER_143_918 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_114_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_110_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_50 la_data_out[53] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_61 io_out[0] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_72 io_out[11] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_83 io_out[22] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_50 la_data_out[52] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_72 io_out[10] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_83 io_out[21] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_61 la_data_out[63] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_76_250 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
Xtiny_user_project_94 io_out[33] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_64_456 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -5998,7 +6034,7 @@
XFILLER_49_283 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_77_570 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_65_776 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_5 la_data_out[8] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_5 la_data_out[7] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_32_172 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_61_993 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_119_712 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -6183,6 +6219,7 @@
XFILLER_36_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_64_605 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
Xtiny_user_project_167 wbs_dat_o[26] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_178 la_data_out[5] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_63_137 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_60_811 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_157_286 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -6237,13 +6274,13 @@
XFILLER_135_492 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_151_996 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_96_527 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+Xtiny_user_project_40 la_data_out[42] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_7_1044 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_40 la_data_out[43] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_49_421 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_73 io_out[12] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_51 la_data_out[54] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_62 io_out[1] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_84 io_out[23] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_62 io_out[0] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_51 la_data_out[53] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_73 io_out[11] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_84 io_out[22] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_65_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
Xtiny_user_project_95 io_out[34] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_37_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -6314,7 +6351,7 @@
XFILLER_97_847 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_2_31 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_64_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_6 la_data_out[9] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_6 la_data_out[8] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_80_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_162_1024 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_33_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -6380,6 +6417,7 @@
XFILLER_161_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_103_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_0_559 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_57_69 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_28_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_44_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_19_1044 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -6492,7 +6530,6 @@
XFILLER_0_142 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_89_783 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
Xtiny_user_project_102 io_oeb[3] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-XFILLER_95_66 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
Xtiny_user_project_124 io_oeb[25] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_113 io_oeb[14] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_135 io_oeb[36] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
@@ -6511,6 +6548,7 @@
XFILLER_113_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_87_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_140_176 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XANTENNA_input2_I io_in[13] vdd vss gf180mcu_fd_sc_mcu7t5v0__antenna
XFILLER_54_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_67_499 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_36_886 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -6538,9 +6576,9 @@
XTAP_2458 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2447 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1724 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XTAP_1713 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_60_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XTAP_1702 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
-XTAP_1713 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1757 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1746 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1735 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -6552,13 +6590,13 @@
XFILLER_163_780 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_69_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_150_463 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+Xtiny_user_project_30 la_data_out[32] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_122_176 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_41 la_data_out[44] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_30 la_data_out[33] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_52 la_data_out[55] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_74 io_out[13] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_41 la_data_out[43] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_74 io_out[12] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_52 la_data_out[54] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_63 io_out[1] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_39_70 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_63 io_out[2] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_96 io_out[35] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_85 io_out[24] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_36_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -6628,9 +6666,9 @@
XFILLER_65_712 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_37_425 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_92_531 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_7 la_data_out[10] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_24_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_53_918 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+Xtiny_user_project_7 la_data_out[9] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_75_1044 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_20_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_36_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -6768,7 +6806,7 @@
XFILLER_63_854 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_35_567 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_90_673 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-XFILLER_95_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_95_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_30_250 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_163_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_143_141 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -6808,6 +6846,7 @@
Xtiny_user_project_103 io_oeb[4] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_125 io_oeb[26] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_147 wbs_dat_o[6] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+XFILLER_95_67 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
Xtiny_user_project_136 io_oeb[37] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_76_456 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
Xtiny_user_project_169 wbs_dat_o[28] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
@@ -6856,10 +6895,10 @@
XTAP_2448 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2437 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1725 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XTAP_1714 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_54_673 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_82_960 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XTAP_1703 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
-XTAP_1714 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1758 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1747 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1736 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -6874,14 +6913,14 @@
XFILLER_5_279 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_123_634 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_2_953 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_20 la_data_out[23] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_31 la_data_out[34] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_20 la_data_out[22] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_31 la_data_out[33] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_89_570 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_64 io_out[3] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_42 la_data_out[45] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_75 io_out[14] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_53 la_data_out[55] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_75 io_out[13] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_42 la_data_out[44] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_1_496 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_53 la_data_out[56] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_64 io_out[2] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_77_776 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
Xtiny_user_project_86 io_out[25] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_97 io_out[36] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
@@ -6949,7 +6988,7 @@
XFILLER_116_1039 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_116_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_49_286 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_8 la_data_out[11] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_8 la_data_out[10] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_46_960 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_18_673 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_92_598 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -7016,6 +7055,7 @@
XFILLER_114_250 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_88_602 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_102_456 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_57_49 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_68_392 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_113_66 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_43_215 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -7034,13 +7074,12 @@
XFILLER_26_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_26_1039 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_121_776 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_66_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_94_605 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_66_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_19_212 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_93_137 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_35_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_90_811 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_63_70 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_31_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XTAP_1160 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1171 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -7182,8 +7221,8 @@
XFILLER_26_321 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XTAP_2449 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_2438 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
-XTAP_1704 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1715 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XTAP_1704 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_121_66 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XTAP_1748 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1737 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -7197,18 +7236,18 @@
XFILLER_151_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_108_676 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_122_101 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_32 la_data_out[35] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_10 la_data_out[12] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_110_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_104_882 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_10 la_data_out[13] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_21 la_data_out[24] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_54 la_data_out[57] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_43 la_data_out[46] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_65 io_out[4] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_21 la_data_out[23] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_32 la_data_out[34] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_65 io_out[3] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_43 la_data_out[45] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_54 la_data_out[56] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_76_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+Xtiny_user_project_76 io_out[14] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_18_811 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
Xtiny_user_project_98 io_out[37] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_76 io_out[15] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_87 io_out[26] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_92_747 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_17_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -7280,7 +7319,7 @@
XFILLER_1_283 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_2_23 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
XFILLER_77_563 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_9 la_data_out[12] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_9 la_data_out[11] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_73_780 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_60_463 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_119_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -7346,6 +7385,7 @@
XFILLER_161_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_103_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_130_744 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_57_17 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_88_669 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_37_780 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_84_886 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -7510,8 +7550,8 @@
XTAP_1749 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1738 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1727 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
-XFILLER_42_815 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XTAP_1716 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XFILLER_42_815 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_139_279 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_136_953 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_5_215 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -7521,18 +7561,18 @@
XFILLER_151_989 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_1_421 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_122_179 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_22 la_data_out[25] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_11 la_data_out[14] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_11 la_data_out[13] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_22 la_data_out[24] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_77_712 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_66 io_out[5] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_33 la_data_out[36] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_55 la_data_out[58] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_44 la_data_out[47] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_55 la_data_out[57] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_33 la_data_out[35] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_44 la_data_out[46] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_66 io_out[4] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_39_73 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_49_425 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_77 io_out[16] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_99 io_oeb[0] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_88 io_out[27] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_77 io_out[15] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_36_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_65_918 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_18_889 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -7608,7 +7648,7 @@
XFILLER_162_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_158_385 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_12_1031 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
-XFILLER_63_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_63_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_133_208 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_127_783 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_99_144 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -7618,6 +7658,7 @@
XFILLER_95_350 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_29_918 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_83_567 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_62_18 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_12_818 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_23_144 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_125_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -7823,24 +7864,24 @@
XTAP_1706 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1739 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1728 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XTAP_1717 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_26_389 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_54_676 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-XTAP_1717 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_50_882 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_107_144 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_162_250 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_150_456 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_23 la_data_out[26] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_12 la_data_out[15] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_103_350 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+Xtiny_user_project_23 la_data_out[25] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_12 la_data_out[14] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_162_31 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_45 la_data_out[48] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_34 la_data_out[36] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_56 la_data_out[58] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_45 la_data_out[47] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_1_499 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_56 la_data_out[59] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_34 la_data_out[37] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
Xtiny_user_project_89 io_out[28] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_78 io_out[17] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_67 io_out[6] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_67 io_out[5] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_78 io_out[16] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_58_960 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_91_215 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_57_492 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -8008,6 +8049,7 @@
XFILLER_15_421 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XTAP_1130 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1141 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XFILLER_63_51 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
XFILLER_31_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XTAP_1152 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1163 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -8157,15 +8199,15 @@
XFILLER_151_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_123_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_2_957 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_13 la_data_out[16] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_13 la_data_out[15] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_89_563 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_57 la_data_out[60] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_24 la_data_out[27] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_35 la_data_out[38] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_24 la_data_out[26] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_7_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_16
-Xtiny_user_project_46 la_data_out[49] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_79 io_out[18] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_68 io_out[7] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_46 la_data_out[48] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_57 la_data_out[59] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_35 la_data_out[37] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_79 io_out[17] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_68 io_out[6] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_85_780 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_17_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_72_463 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -8454,15 +8496,15 @@
XFILLER_146_34 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_122_105 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_135_499 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_14 la_data_out[17] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_47 la_data_out[50] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_25 la_data_out[28] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_14 la_data_out[16] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_25 la_data_out[27] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_104_886 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_36 la_data_out[39] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_36 la_data_out[38] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_47 la_data_out[49] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_49_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_58 la_data_out[61] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_69 io_out[8] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_58 la_data_out[60] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_76_247 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+Xtiny_user_project_69 io_out[7] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_18_815 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_29_141 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_45_634 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -8592,7 +8634,7 @@
XTAP_1880 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_146_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_162_818 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-XFILLER_61_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_61_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_115_712 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_142_531 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_138_1044 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -8764,14 +8806,14 @@
XFILLER_1_425 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_118_1031 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
XFILLER_77_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+Xtiny_user_project_15 la_data_out[17] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_48 la_data_out[50] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_162_23 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
-Xtiny_user_project_48 la_data_out[51] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_15 la_data_out[18] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_26 la_data_out[29] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_37 la_data_out[40] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_26 la_data_out[28] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_37 la_data_out[39] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_39_66 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_130_172 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_59 la_data_out[62] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_59 la_data_out[61] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_73_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_44_101 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_60_605 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -9020,6 +9062,7 @@
XFILLER_163_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_135_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_130_321 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_95_19 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_0_139 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_97_780 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_29_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -9072,11 +9115,11 @@
XFILLER_162_243 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_104_811 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_131_641 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+Xtiny_user_project_16 la_data_out[18] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_103_354 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_16 la_data_out[19] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_38 la_data_out[41] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_27 la_data_out[30] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_49 la_data_out[52] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_27 la_data_out[29] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_38 la_data_out[40] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_49 la_data_out[51] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_58_953 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_91_208 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_57_496 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -9236,7 +9279,6 @@
XTAP_1134 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1145 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1156 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
-XFILLER_63_66 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_70_531 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XTAP_1167 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1178 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
@@ -9364,10 +9406,10 @@
XFILLER_146_37 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_122_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_118_1044 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-Xtiny_user_project_39 la_data_out[42] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_104_889 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_28 la_data_out[31] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_17 la_data_out[20] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_17 la_data_out[19] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_39 la_data_out[41] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_28 la_data_out[30] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_89_567 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_18_818 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_29_144 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -9523,6 +9565,7 @@
XTAP_1124 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1135 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XTAP_1146 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
+XFILLER_63_67 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_82_392 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_144_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_32
XFILLER_24_960 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -9663,8 +9706,8 @@
XFILLER_116_673 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_143_492 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_1_428 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-Xtiny_user_project_29 la_data_out[32] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
-Xtiny_user_project_18 la_data_out[21] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_29 la_data_out[31] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_18 la_data_out[20] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_162_37 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_57_421 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_73_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
@@ -9796,6 +9839,7 @@
XFILLER_146_318 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_9_144 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_115_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_61_6 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_2
XFILLER_5_350 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_111_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_69_847 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -9946,7 +9990,7 @@
XFILLER_148_744 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_50_889 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_118_1024 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-Xtiny_user_project_19 la_data_out[22] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
+Xtiny_user_project_19 la_data_out[21] vdd vss gf180mcu_fd_sc_mcu7t5v0__tiel
XFILLER_103_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_77_709 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_130_176 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -10013,6 +10057,7 @@
XFILLER_12_1039 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_12_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_135_780 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+Xoutput3 net3 io_out[23] vdd vss gf180mcu_fd_sc_mcu7t5v0__clkbuf_3
XFILLER_122_463 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_96_815 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_163_70 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -10329,6 +10374,7 @@
XFILLER_155_854 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_127_567 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_10_882 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
+XFILLER_61_8 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_6_886 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_138_1039 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_138_1028 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -10479,8 +10525,8 @@
XTAP_527 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_67_925 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_120_392 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
-XFILLER_39_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_94_744 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
+XFILLER_39_638 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_34_321 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_22_527 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_147_212 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
@@ -10512,7 +10558,6 @@
XFILLER_31_357 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_129_212 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_8_531 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
-XFILLER_61_70 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_145_705 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_141_922 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_99_847 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
@@ -10800,9 +10845,9 @@
XTAP_369 vdd vss gf180mcu_fd_sc_mcu7t5v0__filltie
XFILLER_39_425 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_67_712 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
+XFILLER_94_531 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_13_2 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_55_918 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
-XFILLER_94_531 vdd vss gf180mcu_fd_sc_mcu7t5v0__fill_1
XFILLER_26_108 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_64
XFILLER_22_314 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_4
XFILLER_124_1031 vdd vss gf180mcu_fd_sc_mcu7t5v0__fillcap_8
diff --git a/verilog/gl/tiny_user_project.nl.v b/verilog/gl/tiny_user_project.nl.v
index 79cdb35..73336b1 100644
--- a/verilog/gl/tiny_user_project.nl.v
+++ b/verilog/gl/tiny_user_project.nl.v
@@ -36,6 +36,7 @@
output [31:0] wbs_dat_o;
input [3:0] wbs_sel_i;
+ wire _000_;
wire net100;
wire net110;
wire net111;
@@ -74,8 +75,7 @@
wire net107;
wire net108;
wire net109;
- wire net62;
- wire net72;
+ wire net63;
wire net73;
wire net74;
wire net75;
@@ -85,8 +85,8 @@
wire net79;
wire net80;
wire net81;
- wire net63;
wire net82;
+ wire net64;
wire net83;
wire net84;
wire net85;
@@ -96,7 +96,7 @@
wire net89;
wire net90;
wire net91;
- wire net64;
+ wire net65;
wire net92;
wire net93;
wire net94;
@@ -105,15 +105,14 @@
wire net97;
wire net98;
wire net99;
- wire net65;
wire net66;
wire net67;
wire net68;
wire net69;
wire net70;
wire net71;
+ wire net72;
wire net174;
- wire net8;
wire net9;
wire net10;
wire net11;
@@ -123,8 +122,8 @@
wire net15;
wire net16;
wire net17;
- wire net175;
wire net18;
+ wire net175;
wire net19;
wire net20;
wire net21;
@@ -134,8 +133,8 @@
wire net25;
wire net26;
wire net27;
- wire net176;
wire net28;
+ wire net176;
wire net29;
wire net30;
wire net31;
@@ -146,6 +145,7 @@
wire net36;
wire net37;
wire net38;
+ wire net177;
wire net39;
wire net40;
wire net41;
@@ -155,8 +155,8 @@
wire net45;
wire net46;
wire net47;
- wire net2;
wire net48;
+ wire net178;
wire net49;
wire net50;
wire net51;
@@ -166,15 +166,15 @@
wire net55;
wire net56;
wire net57;
- wire net3;
wire net58;
wire net59;
wire net60;
wire net61;
- wire net4;
+ wire net62;
wire net5;
wire net6;
wire net7;
+ wire net8;
wire net138;
wire net139;
wire net140;
@@ -212,10 +212,15 @@
wire net150;
wire net151;
wire net1;
+ wire net2;
+ wire net3;
+ wire net4;
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_2 (.ZN(net2));
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_3 (.ZN(net3));
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_4 (.ZN(net4));
+ gf180mcu_fd_sc_mcu7t5v0__xnor2_1 _001_ (.A1(net1),
+ .A2(net2),
+ .ZN(_000_));
+ gf180mcu_fd_sc_mcu7t5v0__clkbuf_1 _002_ (.I(_000_),
+ .Z(net3));
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_5 (.ZN(net5));
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_6 (.ZN(net6));
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_7 (.ZN(net7));
@@ -388,7 +393,9 @@
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_174 (.ZN(net174));
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_175 (.ZN(net175));
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_176 (.ZN(net176));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_0_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_177 (.ZN(net177));
+ gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_178 (.ZN(net178));
+ gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA_input1_I (.I(io_in[12]));
gf180mcu_fd_sc_mcu7t5v0__endcap PHY_0 ();
gf180mcu_fd_sc_mcu7t5v0__endcap PHY_1 ();
gf180mcu_fd_sc_mcu7t5v0__endcap PHY_2 ();
@@ -3140,7 +3147,16 @@
gf180mcu_fd_sc_mcu7t5v0__filltie TAP_2748 ();
gf180mcu_fd_sc_mcu7t5v0__filltie TAP_2749 ();
gf180mcu_fd_sc_mcu7t5v0__filltie TAP_2750 ();
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_1 (.ZN(net1));
+ gf180mcu_fd_sc_mcu7t5v0__dlyb_1 input1 (.I(io_in[12]),
+ .Z(net1));
+ gf180mcu_fd_sc_mcu7t5v0__dlyb_1 input2 (.I(io_in[13]),
+ .Z(net2));
+ gf180mcu_fd_sc_mcu7t5v0__clkbuf_3 output3 (.I(net3),
+ .Z(io_out[23]));
+ gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_4 (.ZN(net4));
+ gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA_input2_I (.I(io_in[13]));
+ gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA__001__A1 (.I(net1));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_0_2 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_0_6 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_0_11 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_0_27 ();
@@ -5867,7 +5883,10 @@
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_56_1039 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_56_1044 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_57_2 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_57_7 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_57_17 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_57_49 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_57_65 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_57_69 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_57_73 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_57_137 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_57_141 ();
@@ -6048,9 +6067,12 @@
gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_60_1031 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_60_1039 ();
gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_60_1043 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_61_2 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_61_66 ();
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_70 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_61_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_61_6 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_8 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_61_15 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_61_47 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_61_63 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_61_73 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_61_137 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_141 ();
@@ -6093,7 +6115,11 @@
gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_61_996 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_61_1028 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_1044 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_62_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_62_4 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_18 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_62_22 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_62_30 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_62_34 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_62_37 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_62_101 ();
@@ -6140,9 +6166,10 @@
gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_62_1031 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_62_1039 ();
gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_1043 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_63_2 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_66 ();
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_70 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_63_19 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_63_51 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_67 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_63_73 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_137 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_141 ();
@@ -6186,8 +6213,11 @@
gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_63_1028 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_1036 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_1044 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_64_2 ();
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_64_34 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_64_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_64_5 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_64_21 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_64_29 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_64_33 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_64_37 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_64_101 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_64_105 ();
@@ -7575,8 +7605,11 @@
gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_93_996 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_93_1028 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_93_1044 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_94_2 ();
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_34 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_94_5 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_94_21 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_94_29 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_94_33 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_94_37 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_94_101 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_105 ();
@@ -7622,9 +7655,10 @@
gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_94_1031 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_1039 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_1044 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_95_2 ();
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_95_66 ();
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_95_70 ();
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_95_2 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_95_19 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_95_51 ();
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_95_67 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_95_73 ();
gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_95_137 ();
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_95_141 ();
@@ -10998,29 +11032,28 @@
assign io_oeb[7] = net106;
assign io_oeb[8] = net107;
assign io_oeb[9] = net108;
- assign io_out[0] = net61;
- assign io_out[10] = net71;
- assign io_out[11] = net72;
- assign io_out[12] = net73;
- assign io_out[13] = net74;
- assign io_out[14] = net75;
- assign io_out[15] = net76;
- assign io_out[16] = net77;
- assign io_out[17] = net78;
- assign io_out[18] = net79;
- assign io_out[19] = net80;
- assign io_out[1] = net62;
- assign io_out[20] = net81;
- assign io_out[21] = net82;
- assign io_out[22] = net83;
- assign io_out[23] = net84;
+ assign io_out[0] = net62;
+ assign io_out[10] = net72;
+ assign io_out[11] = net73;
+ assign io_out[12] = net74;
+ assign io_out[13] = net75;
+ assign io_out[14] = net76;
+ assign io_out[15] = net77;
+ assign io_out[16] = net78;
+ assign io_out[17] = net79;
+ assign io_out[18] = net80;
+ assign io_out[19] = net81;
+ assign io_out[1] = net63;
+ assign io_out[20] = net82;
+ assign io_out[21] = net83;
+ assign io_out[22] = net84;
assign io_out[24] = net85;
assign io_out[25] = net86;
assign io_out[26] = net87;
assign io_out[27] = net88;
assign io_out[28] = net89;
assign io_out[29] = net90;
- assign io_out[2] = net63;
+ assign io_out[2] = net64;
assign io_out[30] = net91;
assign io_out[31] = net92;
assign io_out[32] = net93;
@@ -11029,77 +11062,77 @@
assign io_out[35] = net96;
assign io_out[36] = net97;
assign io_out[37] = net98;
- assign io_out[3] = net64;
- assign io_out[4] = net65;
- assign io_out[5] = net66;
- assign io_out[6] = net67;
- assign io_out[7] = net68;
- assign io_out[8] = net69;
- assign io_out[9] = net70;
+ assign io_out[3] = net65;
+ assign io_out[4] = net66;
+ assign io_out[5] = net67;
+ assign io_out[6] = net68;
+ assign io_out[7] = net69;
+ assign io_out[8] = net70;
+ assign io_out[9] = net71;
assign la_data_out[0] = net173;
- assign la_data_out[10] = net7;
- assign la_data_out[11] = net8;
- assign la_data_out[12] = net9;
- assign la_data_out[13] = net10;
- assign la_data_out[14] = net11;
- assign la_data_out[15] = net12;
- assign la_data_out[16] = net13;
- assign la_data_out[17] = net14;
- assign la_data_out[18] = net15;
- assign la_data_out[19] = net16;
+ assign la_data_out[10] = net8;
+ assign la_data_out[11] = net9;
+ assign la_data_out[12] = net10;
+ assign la_data_out[13] = net11;
+ assign la_data_out[14] = net12;
+ assign la_data_out[15] = net13;
+ assign la_data_out[16] = net14;
+ assign la_data_out[17] = net15;
+ assign la_data_out[18] = net16;
+ assign la_data_out[19] = net17;
assign la_data_out[1] = net174;
- assign la_data_out[20] = net17;
- assign la_data_out[21] = net18;
- assign la_data_out[22] = net19;
- assign la_data_out[23] = net20;
- assign la_data_out[24] = net21;
- assign la_data_out[25] = net22;
- assign la_data_out[26] = net23;
- assign la_data_out[27] = net24;
- assign la_data_out[28] = net25;
- assign la_data_out[29] = net26;
+ assign la_data_out[20] = net18;
+ assign la_data_out[21] = net19;
+ assign la_data_out[22] = net20;
+ assign la_data_out[23] = net21;
+ assign la_data_out[24] = net22;
+ assign la_data_out[25] = net23;
+ assign la_data_out[26] = net24;
+ assign la_data_out[27] = net25;
+ assign la_data_out[28] = net26;
+ assign la_data_out[29] = net27;
assign la_data_out[2] = net175;
- assign la_data_out[30] = net27;
- assign la_data_out[31] = net28;
- assign la_data_out[32] = net29;
- assign la_data_out[33] = net30;
- assign la_data_out[34] = net31;
- assign la_data_out[35] = net32;
- assign la_data_out[36] = net33;
- assign la_data_out[37] = net34;
- assign la_data_out[38] = net35;
- assign la_data_out[39] = net36;
+ assign la_data_out[30] = net28;
+ assign la_data_out[31] = net29;
+ assign la_data_out[32] = net30;
+ assign la_data_out[33] = net31;
+ assign la_data_out[34] = net32;
+ assign la_data_out[35] = net33;
+ assign la_data_out[36] = net34;
+ assign la_data_out[37] = net35;
+ assign la_data_out[38] = net36;
+ assign la_data_out[39] = net37;
assign la_data_out[3] = net176;
- assign la_data_out[40] = net37;
- assign la_data_out[41] = net38;
- assign la_data_out[42] = net39;
- assign la_data_out[43] = net40;
- assign la_data_out[44] = net41;
- assign la_data_out[45] = net42;
- assign la_data_out[46] = net43;
- assign la_data_out[47] = net44;
- assign la_data_out[48] = net45;
- assign la_data_out[49] = net46;
- assign la_data_out[4] = net1;
- assign la_data_out[50] = net47;
- assign la_data_out[51] = net48;
- assign la_data_out[52] = net49;
- assign la_data_out[53] = net50;
- assign la_data_out[54] = net51;
- assign la_data_out[55] = net52;
- assign la_data_out[56] = net53;
- assign la_data_out[57] = net54;
- assign la_data_out[58] = net55;
- assign la_data_out[59] = net56;
- assign la_data_out[5] = net2;
- assign la_data_out[60] = net57;
- assign la_data_out[61] = net58;
- assign la_data_out[62] = net59;
- assign la_data_out[63] = net60;
- assign la_data_out[6] = net3;
- assign la_data_out[7] = net4;
- assign la_data_out[8] = net5;
- assign la_data_out[9] = net6;
+ assign la_data_out[40] = net38;
+ assign la_data_out[41] = net39;
+ assign la_data_out[42] = net40;
+ assign la_data_out[43] = net41;
+ assign la_data_out[44] = net42;
+ assign la_data_out[45] = net43;
+ assign la_data_out[46] = net44;
+ assign la_data_out[47] = net45;
+ assign la_data_out[48] = net46;
+ assign la_data_out[49] = net47;
+ assign la_data_out[4] = net177;
+ assign la_data_out[50] = net48;
+ assign la_data_out[51] = net49;
+ assign la_data_out[52] = net50;
+ assign la_data_out[53] = net51;
+ assign la_data_out[54] = net52;
+ assign la_data_out[55] = net53;
+ assign la_data_out[56] = net54;
+ assign la_data_out[57] = net55;
+ assign la_data_out[58] = net56;
+ assign la_data_out[59] = net57;
+ assign la_data_out[5] = net178;
+ assign la_data_out[60] = net58;
+ assign la_data_out[61] = net59;
+ assign la_data_out[62] = net60;
+ assign la_data_out[63] = net61;
+ assign la_data_out[6] = net4;
+ assign la_data_out[7] = net5;
+ assign la_data_out[8] = net6;
+ assign la_data_out[9] = net7;
assign user_irq[0] = net137;
assign user_irq[1] = net138;
assign user_irq[2] = net139;
diff --git a/verilog/gl/tiny_user_project.v b/verilog/gl/tiny_user_project.v
index 95c39b3..ee0cbbd 100644
--- a/verilog/gl/tiny_user_project.v
+++ b/verilog/gl/tiny_user_project.v
@@ -39,6 +39,7 @@
output [31:0] wbs_dat_o;
input [3:0] wbs_sel_i;
+ wire _000_;
wire net100;
wire net110;
wire net111;
@@ -77,8 +78,7 @@
wire net107;
wire net108;
wire net109;
- wire net62;
- wire net72;
+ wire net63;
wire net73;
wire net74;
wire net75;
@@ -88,8 +88,8 @@
wire net79;
wire net80;
wire net81;
- wire net63;
wire net82;
+ wire net64;
wire net83;
wire net84;
wire net85;
@@ -99,7 +99,7 @@
wire net89;
wire net90;
wire net91;
- wire net64;
+ wire net65;
wire net92;
wire net93;
wire net94;
@@ -108,15 +108,14 @@
wire net97;
wire net98;
wire net99;
- wire net65;
wire net66;
wire net67;
wire net68;
wire net69;
wire net70;
wire net71;
+ wire net72;
wire net174;
- wire net8;
wire net9;
wire net10;
wire net11;
@@ -126,8 +125,8 @@
wire net15;
wire net16;
wire net17;
- wire net175;
wire net18;
+ wire net175;
wire net19;
wire net20;
wire net21;
@@ -137,8 +136,8 @@
wire net25;
wire net26;
wire net27;
- wire net176;
wire net28;
+ wire net176;
wire net29;
wire net30;
wire net31;
@@ -149,6 +148,7 @@
wire net36;
wire net37;
wire net38;
+ wire net177;
wire net39;
wire net40;
wire net41;
@@ -158,8 +158,8 @@
wire net45;
wire net46;
wire net47;
- wire net2;
wire net48;
+ wire net178;
wire net49;
wire net50;
wire net51;
@@ -169,15 +169,15 @@
wire net55;
wire net56;
wire net57;
- wire net3;
wire net58;
wire net59;
wire net60;
wire net61;
- wire net4;
+ wire net62;
wire net5;
wire net6;
wire net7;
+ wire net8;
wire net138;
wire net139;
wire net140;
@@ -215,14 +215,17 @@
wire net150;
wire net151;
wire net1;
+ wire net2;
+ wire net3;
+ wire net4;
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_2 (.ZN(net2),
+ gf180mcu_fd_sc_mcu7t5v0__xnor2_1 _001_ (.A1(net1),
+ .A2(net2),
+ .ZN(_000_),
.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_3 (.ZN(net3),
- .VDD(vdd),
- .VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_4 (.ZN(net4),
+ gf180mcu_fd_sc_mcu7t5v0__clkbuf_1 _002_ (.I(_000_),
+ .Z(net3),
.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_5 (.ZN(net5),
@@ -741,7 +744,14 @@
gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_176 (.ZN(net176),
.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_0_2 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_177 (.ZN(net177),
+ .VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_178 (.ZN(net178),
+ .VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA_input1_I (.I(io_in[12]),
+ .VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__endcap PHY_0 (.VDD(vdd),
.VSS(vss));
@@ -6245,9 +6255,29 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__filltie TAP_2750 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_1 (.ZN(net1),
+ gf180mcu_fd_sc_mcu7t5v0__dlyb_1 input1 (.I(io_in[12]),
+ .Z(net1),
.VDD(vdd),
.VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__dlyb_1 input2 (.I(io_in[13]),
+ .Z(net2),
+ .VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__clkbuf_3 output3 (.I(net3),
+ .Z(io_out[23]),
+ .VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__tiel tiny_user_project_4 (.ZN(net4),
+ .VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA_input2_I (.I(io_in[13]),
+ .VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__antenna ANTENNA__001__A1 (.I(net1),
+ .VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_0_2 (.VDD(vdd),
+ .VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_0_6 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_0_11 (.VDD(vdd),
@@ -11700,7 +11730,13 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_57_2 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_57_7 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_57_17 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_57_49 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_57_65 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_57_69 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_57_73 (.VDD(vdd),
.VSS(vss));
@@ -12062,11 +12098,17 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_60_1043 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_61_2 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_61_2 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_61_66 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_61_6 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_70 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_8 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_61_15 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_61_47 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_61_63 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_61_73 (.VDD(vdd),
.VSS(vss));
@@ -12152,7 +12194,15 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_61_1044 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_62_2 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_2 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_62_4 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_18 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_62_22 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_62_30 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_62_34 (.VDD(vdd),
.VSS(vss));
@@ -12246,11 +12296,13 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_62_1043 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_63_2 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_2 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_66 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_63_19 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_70 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_63_51 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_63_67 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_63_73 (.VDD(vdd),
.VSS(vss));
@@ -12338,9 +12390,15 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_63_1044 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_64_2 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_64_2 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_64_34 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_64_5 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_64_21 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_64_29 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_64_33 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_64_37 (.VDD(vdd),
.VSS(vss));
@@ -15116,9 +15174,15 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_93_1044 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_94_2 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_2 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_34 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_94_5 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_8 FILLER_94_21 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_94_29 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fill_2 FILLER_94_33 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_94_37 (.VDD(vdd),
.VSS(vss));
@@ -15210,11 +15274,13 @@
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_94_1044 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_95_2 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_95_2 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_95_66 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_32 FILLER_95_19 (.VDD(vdd),
.VSS(vss));
- gf180mcu_fd_sc_mcu7t5v0__fill_1 FILLER_95_70 (.VDD(vdd),
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_16 FILLER_95_51 (.VDD(vdd),
+ .VSS(vss));
+ gf180mcu_fd_sc_mcu7t5v0__fillcap_4 FILLER_95_67 (.VDD(vdd),
.VSS(vss));
gf180mcu_fd_sc_mcu7t5v0__fillcap_64 FILLER_95_73 (.VDD(vdd),
.VSS(vss));
@@ -21924,29 +21990,28 @@
assign io_oeb[7] = net106;
assign io_oeb[8] = net107;
assign io_oeb[9] = net108;
- assign io_out[0] = net61;
- assign io_out[10] = net71;
- assign io_out[11] = net72;
- assign io_out[12] = net73;
- assign io_out[13] = net74;
- assign io_out[14] = net75;
- assign io_out[15] = net76;
- assign io_out[16] = net77;
- assign io_out[17] = net78;
- assign io_out[18] = net79;
- assign io_out[19] = net80;
- assign io_out[1] = net62;
- assign io_out[20] = net81;
- assign io_out[21] = net82;
- assign io_out[22] = net83;
- assign io_out[23] = net84;
+ assign io_out[0] = net62;
+ assign io_out[10] = net72;
+ assign io_out[11] = net73;
+ assign io_out[12] = net74;
+ assign io_out[13] = net75;
+ assign io_out[14] = net76;
+ assign io_out[15] = net77;
+ assign io_out[16] = net78;
+ assign io_out[17] = net79;
+ assign io_out[18] = net80;
+ assign io_out[19] = net81;
+ assign io_out[1] = net63;
+ assign io_out[20] = net82;
+ assign io_out[21] = net83;
+ assign io_out[22] = net84;
assign io_out[24] = net85;
assign io_out[25] = net86;
assign io_out[26] = net87;
assign io_out[27] = net88;
assign io_out[28] = net89;
assign io_out[29] = net90;
- assign io_out[2] = net63;
+ assign io_out[2] = net64;
assign io_out[30] = net91;
assign io_out[31] = net92;
assign io_out[32] = net93;
@@ -21955,77 +22020,77 @@
assign io_out[35] = net96;
assign io_out[36] = net97;
assign io_out[37] = net98;
- assign io_out[3] = net64;
- assign io_out[4] = net65;
- assign io_out[5] = net66;
- assign io_out[6] = net67;
- assign io_out[7] = net68;
- assign io_out[8] = net69;
- assign io_out[9] = net70;
+ assign io_out[3] = net65;
+ assign io_out[4] = net66;
+ assign io_out[5] = net67;
+ assign io_out[6] = net68;
+ assign io_out[7] = net69;
+ assign io_out[8] = net70;
+ assign io_out[9] = net71;
assign la_data_out[0] = net173;
- assign la_data_out[10] = net7;
- assign la_data_out[11] = net8;
- assign la_data_out[12] = net9;
- assign la_data_out[13] = net10;
- assign la_data_out[14] = net11;
- assign la_data_out[15] = net12;
- assign la_data_out[16] = net13;
- assign la_data_out[17] = net14;
- assign la_data_out[18] = net15;
- assign la_data_out[19] = net16;
+ assign la_data_out[10] = net8;
+ assign la_data_out[11] = net9;
+ assign la_data_out[12] = net10;
+ assign la_data_out[13] = net11;
+ assign la_data_out[14] = net12;
+ assign la_data_out[15] = net13;
+ assign la_data_out[16] = net14;
+ assign la_data_out[17] = net15;
+ assign la_data_out[18] = net16;
+ assign la_data_out[19] = net17;
assign la_data_out[1] = net174;
- assign la_data_out[20] = net17;
- assign la_data_out[21] = net18;
- assign la_data_out[22] = net19;
- assign la_data_out[23] = net20;
- assign la_data_out[24] = net21;
- assign la_data_out[25] = net22;
- assign la_data_out[26] = net23;
- assign la_data_out[27] = net24;
- assign la_data_out[28] = net25;
- assign la_data_out[29] = net26;
+ assign la_data_out[20] = net18;
+ assign la_data_out[21] = net19;
+ assign la_data_out[22] = net20;
+ assign la_data_out[23] = net21;
+ assign la_data_out[24] = net22;
+ assign la_data_out[25] = net23;
+ assign la_data_out[26] = net24;
+ assign la_data_out[27] = net25;
+ assign la_data_out[28] = net26;
+ assign la_data_out[29] = net27;
assign la_data_out[2] = net175;
- assign la_data_out[30] = net27;
- assign la_data_out[31] = net28;
- assign la_data_out[32] = net29;
- assign la_data_out[33] = net30;
- assign la_data_out[34] = net31;
- assign la_data_out[35] = net32;
- assign la_data_out[36] = net33;
- assign la_data_out[37] = net34;
- assign la_data_out[38] = net35;
- assign la_data_out[39] = net36;
+ assign la_data_out[30] = net28;
+ assign la_data_out[31] = net29;
+ assign la_data_out[32] = net30;
+ assign la_data_out[33] = net31;
+ assign la_data_out[34] = net32;
+ assign la_data_out[35] = net33;
+ assign la_data_out[36] = net34;
+ assign la_data_out[37] = net35;
+ assign la_data_out[38] = net36;
+ assign la_data_out[39] = net37;
assign la_data_out[3] = net176;
- assign la_data_out[40] = net37;
- assign la_data_out[41] = net38;
- assign la_data_out[42] = net39;
- assign la_data_out[43] = net40;
- assign la_data_out[44] = net41;
- assign la_data_out[45] = net42;
- assign la_data_out[46] = net43;
- assign la_data_out[47] = net44;
- assign la_data_out[48] = net45;
- assign la_data_out[49] = net46;
- assign la_data_out[4] = net1;
- assign la_data_out[50] = net47;
- assign la_data_out[51] = net48;
- assign la_data_out[52] = net49;
- assign la_data_out[53] = net50;
- assign la_data_out[54] = net51;
- assign la_data_out[55] = net52;
- assign la_data_out[56] = net53;
- assign la_data_out[57] = net54;
- assign la_data_out[58] = net55;
- assign la_data_out[59] = net56;
- assign la_data_out[5] = net2;
- assign la_data_out[60] = net57;
- assign la_data_out[61] = net58;
- assign la_data_out[62] = net59;
- assign la_data_out[63] = net60;
- assign la_data_out[6] = net3;
- assign la_data_out[7] = net4;
- assign la_data_out[8] = net5;
- assign la_data_out[9] = net6;
+ assign la_data_out[40] = net38;
+ assign la_data_out[41] = net39;
+ assign la_data_out[42] = net40;
+ assign la_data_out[43] = net41;
+ assign la_data_out[44] = net42;
+ assign la_data_out[45] = net43;
+ assign la_data_out[46] = net44;
+ assign la_data_out[47] = net45;
+ assign la_data_out[48] = net46;
+ assign la_data_out[49] = net47;
+ assign la_data_out[4] = net177;
+ assign la_data_out[50] = net48;
+ assign la_data_out[51] = net49;
+ assign la_data_out[52] = net50;
+ assign la_data_out[53] = net51;
+ assign la_data_out[54] = net52;
+ assign la_data_out[55] = net53;
+ assign la_data_out[56] = net54;
+ assign la_data_out[57] = net55;
+ assign la_data_out[58] = net56;
+ assign la_data_out[59] = net57;
+ assign la_data_out[5] = net178;
+ assign la_data_out[60] = net58;
+ assign la_data_out[61] = net59;
+ assign la_data_out[62] = net60;
+ assign la_data_out[63] = net61;
+ assign la_data_out[6] = net4;
+ assign la_data_out[7] = net5;
+ assign la_data_out[8] = net6;
+ assign la_data_out[9] = net7;
assign user_irq[0] = net137;
assign user_irq[1] = net138;
assign user_irq[2] = net139;
diff --git a/verilog/rtl/tiny_user_project.v b/verilog/rtl/tiny_user_project.v
index b16a4ad..5280379 100644
--- a/verilog/rtl/tiny_user_project.v
+++ b/verilog/rtl/tiny_user_project.v
@@ -40,7 +40,7 @@
);
// pass input and output pins defined in user_defines.v
-user_module_334445762078310996 mod (
+rolfmobile99_top mod (
io_in[15:8],
io_out[23:16]
);
