commit	606d476886e6a7e13ad44c95f2b94149fa894345	[log] [tgz]
author	Jeff DiCorpo <jeffdi@efabless.com>	Wed Dec 14 22:30:14 2022 -0800
committer	Jeff DiCorpo <jeffdi@efabless.com>	Wed Dec 14 22:30:14 2022 -0800
tree	10f0b285c2a8919bbf9ca7b2267a229a17aa0729
parent	7d060836fbe244cba13105c841c30b4f749ecc82 [diff]

final gds oasis

gds/caravel_18001e9a.gds.gz[Added - diff]
gds/user_project_wrapper.gds[Deleted - diff]
gds/user_project_wrapper.gds.gz[Added - diff]
gds/wrapped_wb_hyperram.gds[Deleted - diff]
gds/wrapped_wb_hyperram.gds.gz[Added - diff]
mpw_precheck/logs/gds.info[Added - diff]
mpw_precheck/logs/git.info[Added - diff]
mpw_precheck/logs/klayout_beol_check.log[Added - diff]
mpw_precheck/logs/klayout_beol_check.total[Added - diff]
mpw_precheck/logs/klayout_feol_check.log[Added - diff]
mpw_precheck/logs/klayout_feol_check.total[Added - diff]
mpw_precheck/logs/klayout_met_min_ca_density_check.log[Added - diff]
mpw_precheck/logs/klayout_met_min_ca_density_check.total[Added - diff]
mpw_precheck/logs/klayout_offgrid_check.log[Added - diff]
mpw_precheck/logs/klayout_offgrid_check.total[Added - diff]
mpw_precheck/logs/pdks.info[Added - diff]
mpw_precheck/logs/precheck.log[Added - diff]
mpw_precheck/logs/spdx_compliance_report.log[Added - diff]
mpw_precheck/logs/tools.info[Added - diff]
mpw_precheck/logs/xor_check.log[Added - diff]
mpw_precheck/logs/xor_check.total[Added - diff]
mpw_precheck/outputs/reports/gpio_defines.report[Added - diff]
mpw_precheck/outputs/reports/klayout_beol_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_feol_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_offgrid_check.xml[Added - diff]
mpw_precheck/outputs/user_project_wrapper.xor.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_empty_erased.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_erased.gds[Added - diff]
signoff/.gitignore[Added - diff]
signoff/assigned_slot[Added - diff]
signoff/build/__gpio_defaults.out[Added - diff]
signoff/build/gpio_defaults.out[Added - diff]
signoff/build/make_ship.out[Added - diff]
signoff/build/set_user_id.out[Added - diff]
signoff/cdrc.log[Added - diff]
tapeout/logs/gds.info[Added - diff]
tapeout/logs/gen_gpio_defaults.log[Added - diff]
tapeout/logs/git.info[Added - diff]
tapeout/logs/git_clone.log[Added - diff]
tapeout/logs/klayout_gds2oas.log[Added - diff]
tapeout/logs/oasis.info[Added - diff]
tapeout/logs/pdks.info[Added - diff]
tapeout/logs/set_user_id.log[Added - diff]
tapeout/logs/ship_truck.log[Added - diff]
tapeout/logs/tools.info[Added - diff]
tapeout/logs/uncompress.log[Added - diff]
tapeout/outputs/gds/caravel_18001e9a.gds[Added - diff]
tapeout/outputs/gf180mcuC.magicrc[Added - diff]
tapeout/outputs/mag/caravel_core.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_007.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_008.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_009.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_00a.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_00b.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_087.mag[Added - diff]
tapeout/outputs/mag/user_id_prog_zero.mag[Added - diff]
tapeout/outputs/mag/user_id_programming.mag[Added - diff]
tapeout/outputs/mag/user_id_textblock.mag[Added - diff]
tapeout/outputs/oas/caravel_18001e9a.oas[Added - diff]
tapeout/outputs/verilog/gl/caravel_core.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_007.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_008.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_009.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_00a.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_00b.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_087.v[Added - diff]
tapeout/outputs/verilog/gl/user_id_programming.v[Added - diff]
tapeout/outputs/verilog/rtl/caravel_core.v[Added - diff]

69 files changed

tree: 10f0b285c2a8919bbf9ca7b2267a229a17aa0729

README.md

Wishbone connected HyperRAM controller for GF180

Wishbone HyperRAM controller RTL: https://github.com/embelon/wb_hyperram

PCB: https://github.com/embelon/hyperram_asic_pcb