blob: 20bf745a88fe7be0f39c86702a2095f0851bff89 [file] [log] [blame]
Project Chip ID is: 402671402
Setting Project Chip ID to: 1800472a
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!