blob: bf69bb80654cb6af2d519189cb9e7939ad2e6a0d [file] [log] [blame]
/root/reversible_programmable_logic_ic/configure.py
/root/reversible_programmable_logic_ic/openlane/tiny_user_project/config.json
/root/reversible_programmable_logic_ic/sdc/tiny_user_project.sdc
/root/reversible_programmable_logic_ic/sdc/user_module.sdc
/root/reversible_programmable_logic_ic/sdc/user_project_wrapper.sdc
/root/reversible_programmable_logic_ic/sdf/tiny_user_project.sdf
/root/reversible_programmable_logic_ic/sdf/user_module.sdf
/root/reversible_programmable_logic_ic/sdf/user_project_wrapper.sdf
/root/reversible_programmable_logic_ic/sdf/multicorner/nom/user_project_wrapper.ff.sdf
/root/reversible_programmable_logic_ic/sdf/multicorner/nom/user_project_wrapper.ss.sdf
/root/reversible_programmable_logic_ic/sdf/multicorner/nom/user_project_wrapper.tt.sdf
/root/reversible_programmable_logic_ic/spef/tiny_user_project.spef
/root/reversible_programmable_logic_ic/spef/user_module.spef
/root/reversible_programmable_logic_ic/spef/user_project_wrapper.spef
/root/reversible_programmable_logic_ic/spef/multicorner/user_project_wrapper.nom.spef
/root/reversible_programmable_logic_ic/verilog/includes/includes.gl+sdf.caravel_user_project
/root/reversible_programmable_logic_ic/verilog/includes/includes.gl.caravel_user_project
/root/reversible_programmable_logic_ic/verilog/includes/includes.rtl.caravel_user_project
/root/reversible_programmable_logic_ic/verilog/rtl/cells.v
/root/reversible_programmable_logic_ic/verilog/rtl/tiny_user_project.v
/root/reversible_programmable_logic_ic/verilog/rtl/tiny_user_project.v.jinja2
/root/reversible_programmable_logic_ic/verilog/rtl/user_module.v
/root/reversible_programmable_logic_ic/verilog/rtl/wokwi_diagram.json