Update README.md
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This is a simple design with five 4-bit up-counters. The ports of each counter are `clock`, `reset`, `io_out`.
-The FiveGuys design (gdsii file) is located at [here](https://github.com/AyaseErii/gf180-FiveGuys/tree/main/openlane/cntr_example/runs/cntr_example/results/final/gds) and the wrappered counter (gdsii file) is located at [here](https://github.com/AyaseErii/gf180-demo-sequential_counter/tree/main/openlane/user_project_wrapper/runs/user_project_wrapper/results/final/gds).
+The FiveGuys design (gdsii file) is located at [here](https://github.com/AyaseErii/gf180-FiveGuys/tree/main/openlane/cntr_example/runs/cntr_example/results/final/gds) and the wrappered counter (gdsii file) is located at [here](https://github.com/AyaseErii/gf180-FiveGuys/tree/main/openlane/user_project_wrapper/runs/user_project_wrapper/results/final/gds).
-### Step 1: Create the Digital Counter Design
+### Step 1: Create the Design with Five counters
Before running the design flow, please make sure the gf180 PDK was installed correctly. For the information about switching PDK from `sky130` to `gf180mcuC`, you may refer to [this video](https://www.youtube.com/watch?v=4-kISttsPbY). (Great thanks to Matt)
-Once you have done with PDK setups, you can simply follow the commands below after you changed the corresponding [cntr_example.v](https://github.com/AyaseErii/gf180-demo-sequential_counter/blob/main/verilog/rtl/cntr_example.v), [config.tcl](https://github.com/AyaseErii/gf180-demo-sequential_counter/blob/main/openlane/cntr_example/config.tcl) file, all files in the [includes](https://github.com/AyaseErii/gf180-demo-sequential_counter/tree/main/verilog/includes) directory, and the [user_netlist.v](https://github.com/AyaseErii/gf180-demo-sequential_counter/blob/main/verilog/rtl/uprj_netlists.v) of the counter:
+Once you have done with PDK setups, you can simply follow the commands below after you changed the corresponding [cntr_example.v](https://github.com/AyaseErii/gf180-FiveGuys/blob/main/verilog/rtl/cntr_example.v), [config.tcl](https://github.com/AyaseErii/gf180-FiveGuys/blob/main/openlane/cntr_example/config.tcl) file, all files in the [includes](https://github.com/AyaseErii/gf180-FiveGuys/tree/main/verilog/includes) directory, and the [uprj_netlist.v](https://github.com/AyaseErii/gf180-FiveGuys/blob/main/verilog/rtl/uprj_netlists.v) of the counter:
```
git clone https://github.com/AyaseErii/gf180-demo-binary_counter.git
cd gf180-demo-binary_counter
