blob: 5f9feaae69667f2c6f4798f2fdc5480de55b2a8e [file] [log] [blame]
Project Chip ID is: 402678022
Setting Project Chip ID to: 18006106
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!