| - status: 0 - openlane design prep |
| runtime_s: 2.3 |
| runtime_ts: 0h0m2s302ms |
| - status: 1 - synthesis - yosys |
| runtime_s: 2.43 |
| runtime_ts: 0h0m2s431ms |
| - status: 2 - sta - openroad |
| runtime_s: 0.95 |
| runtime_ts: 0h0m0s953ms |
| - status: 3 - floorplan initialization - openroad |
| runtime_s: 1.66 |
| runtime_ts: 0h0m1s656ms |
| - status: 4 - ioplace - openroad |
| runtime_s: 0.77 |
| runtime_ts: 0h0m0s768ms |
| - status: 5 - tap/decap insertion - openroad |
| runtime_s: 0.86 |
| runtime_ts: 0h0m0s863ms |
| - status: 6 - pdn generation - openroad |
| runtime_s: 2.0 |
| runtime_ts: 0h0m2s1ms |
| - status: 7 - global placement - openroad |
| runtime_s: 17.13 |
| runtime_ts: 0h0m17s129ms |
| - status: 8 - resizer design optimizations - openroad |
| runtime_s: 1.44 |
| runtime_ts: 0h0m1s437ms |
| - status: 9 - detailed placement - openroad |
| runtime_s: 1.14 |
| runtime_ts: 0h0m1s137ms |
| - status: 10 - cts - openroad |
| runtime_s: 33.01 |
| runtime_ts: 0h0m33s14ms |
| - status: 11 - resizer timing optimizations - openroad |
| runtime_s: 1.39 |
| runtime_ts: 0h0m1s387ms |
| - status: 12 - resizer timing optimizations - openroad |
| runtime_s: 1.43 |
| runtime_ts: 0h0m1s433ms |
| - status: 14 - detailed placement - openroad |
| runtime_s: 1.01 |
| runtime_ts: 0h0m1s12ms |
| - status: 14 - diode insertion - openlane |
| runtime_s: 1.1 |
| runtime_ts: 0h0m1s102ms |
| - status: 15 - fill insertion - openroad |
| runtime_s: 1.5 |
| runtime_ts: 0h0m1s496ms |
| - status: 17 - write verilog - openroad |
| runtime_s: 1.1 |
| runtime_ts: 0h0m1s102ms |
| - status: 17 - global routing - openroad |
| runtime_s: 1.21 |
| runtime_ts: 0h0m1s205ms |
| - status: 18 - detailed_routing - openroad |
| runtime_s: 39.6 |
| runtime_ts: 0h0m39s595ms |
| - status: 19 - wire lengths - openlane |
| runtime_s: 0.77 |
| runtime_ts: 0h0m0s767ms |
| - status: 20 - parasitics extraction - openroad |
| runtime_s: 1.31 |
| runtime_ts: 0h0m1s312ms |
| - status: 21 - sta - openroad |
| runtime_s: 3.05 |
| runtime_ts: 0h0m3s48ms |
| - status: 22 - sta - openroad |
| runtime_s: 1.29 |
| runtime_ts: 0h0m1s294ms |
| - status: 23 - gdsii - magic |
| runtime_s: 9.45 |
| runtime_ts: 0h0m9s451ms |
| - status: 24 - spice extraction - magic |
| runtime_s: 15.95 |
| runtime_ts: 0h0m15s948ms |
| - status: 26 - write verilog - openroad |
| runtime_s: 1.04 |
| runtime_ts: 0h0m1s44ms |
| - status: 26 - write powered verilog - openlane |
| runtime_s: 1.19 |
| runtime_ts: 0h0m1s185ms |
| - status: 27 - lvs - netgen |
| runtime_s: 1.14 |
| runtime_ts: 0h0m1s140ms |
| - status: 28 - drc - magic |
| runtime_s: 167.5 |
| runtime_ts: 0h2m47s497ms |
| - status: 29 - antenna check - openroad |
| runtime_s: 1.0 |
| runtime_ts: 0h0m1s0ms |
| --- |
| - status: routed |
| runtime_s: 115.0 |
| runtime_ts: 0h1m55s0ms |
| - status: flow completed |
| runtime_s: 319.0 |
| runtime_ts: 0h5m19s0ms |
