| |
| =========================================================================== |
| report_checks -unconstrained |
| ============================================================================ |
| Startpoint: wb_rst_i (input port clocked by wb_clk_i) |
| Endpoint: _119_ (rising edge-triggered flip-flop clocked by wb_clk_i) |
| Path Group: wb_clk_i |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock wb_clk_i (rise edge) |
| 0.00 0.00 clock network delay (propagated) |
| 13.00 13.00 ^ input external delay |
| 0.16 0.07 13.07 ^ wb_rst_i (in) |
| 2 0.01 wb_rst_i (net) |
| 0.16 0.00 13.07 ^ input1/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_2) |
| 2.68 1.73 14.80 ^ input1/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_2) |
| 4 0.34 net1 (net) |
| 2.72 0.20 15.00 ^ _057_/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 0.62 0.72 15.72 ^ _057_/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 8 0.03 _021_ (net) |
| 0.62 0.00 15.72 ^ _058_/I (gf180mcu_fd_sc_mcu7t5v0__clkinv_1) |
| 0.47 0.42 16.14 v _058_/ZN (gf180mcu_fd_sc_mcu7t5v0__clkinv_1) |
| 4 0.02 _022_ (net) |
| 0.47 0.00 16.14 v _069_/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 0.40 0.49 16.63 v _069_/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_1) |
| 4 0.02 _030_ (net) |
| 0.40 0.00 16.63 v _081_/A1 (gf180mcu_fd_sc_mcu7t5v0__nor2_1) |
| 10.13 6.14 22.77 ^ _081_/ZN (gf180mcu_fd_sc_mcu7t5v0__nor2_1) |
| 2 0.35 _007_ (net) |
| 10.13 0.15 22.92 ^ _119_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| 22.92 data arrival time |
| |
| 65.00 65.00 clock wb_clk_i (rise edge) |
| 0.00 65.00 clock source latency |
| 0.15 0.07 65.07 ^ wb_clk_i (in) |
| 2 0.03 wb_clk_i (net) |
| 0.15 0.00 65.07 ^ clkbuf_0_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16) |
| 0.11 0.24 65.31 ^ clkbuf_0_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16) |
| 2 0.05 clknet_0_wb_clk_i (net) |
| 0.11 0.00 65.31 ^ clkbuf_1_0__f_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16) |
| 0.11 0.23 65.54 ^ clkbuf_1_0__f_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16) |
| 11 0.04 clknet_1_0__leaf_wb_clk_i (net) |
| 0.11 0.00 65.54 ^ _119_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1) |
| -0.25 65.29 clock uncertainty |
| 0.00 65.29 clock reconvergence pessimism |
| 0.70 65.99 library setup time |
| 65.99 data required time |
| ----------------------------------------------------------------------------- |
| 65.99 data required time |
| -22.92 data arrival time |
| ----------------------------------------------------------------------------- |
| 43.07 slack (MET) |
| |
| |
| |
| =========================================================================== |
| report_checks --slack_max -0.01 |
| ============================================================================ |
| No paths found. |
