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foss-eda-tools / third_party / shuttle / gf180mcu / mpw-000 / slot-020 / 1d3409ba822566404d008bc08cdc60c11a44da62 / . / openlane / cntr_example / runs / cntr_example / reports / routing / 16-grt_sta.max.rpt
blob: 96ee6215dcf291c3c7614080940e189559af08f7 [file] [log] [blame]
===========================================================================
report_checks -path_delay max (Setup)
============================================================================
Startpoint: _117_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Endpoint: io_out[1] (output port clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock source latency
0.13 0.06 0.06 ^ wb_clk_i (in)
2 0.02 wb_clk_i (net)
0.13 0.00 0.06 ^ clkbuf_0_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.26 0.32 ^ clkbuf_0_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
2 0.05 clknet_0_wb_clk_i (net)
0.11 0.00 0.33 ^ clkbuf_1_1__f_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.25 0.58 ^ clkbuf_1_1__f_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
18 0.04 clknet_1_1__leaf_wb_clk_i (net)
0.11 0.00 0.58 ^ _117_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
0.44 0.96 1.54 ^ _117_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
4 0.02 net13 (net)
0.44 0.01 1.54 ^ fanout25/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.60 0.55 2.10 ^ fanout25/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
8 0.03 net25 (net)
0.60 0.00 2.10 ^ output13/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
0.34 0.53 2.62 ^ output13/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
1 0.07 io_out[1] (net)
0.34 0.00 2.63 ^ io_out[1] (out)
2.63 data arrival time
65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (propagated)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
-13.00 51.75 output external delay
51.75 data required time
-----------------------------------------------------------------------------
51.75 data required time
-2.63 data arrival time
-----------------------------------------------------------------------------
49.12 slack (MET)
Startpoint: _121_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Endpoint: io_out[5] (output port clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock source latency
0.13 0.06 0.06 ^ wb_clk_i (in)
2 0.02 wb_clk_i (net)
0.13 0.00 0.06 ^ clkbuf_0_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.26 0.32 ^ clkbuf_0_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
2 0.05 clknet_0_wb_clk_i (net)
0.11 0.00 0.33 ^ clkbuf_1_1__f_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.25 0.58 ^ clkbuf_1_1__f_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
18 0.04 clknet_1_1__leaf_wb_clk_i (net)
0.11 0.00 0.58 ^ _121_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
0.44 0.96 1.53 ^ _121_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
4 0.02 net17 (net)
0.44 0.01 1.54 ^ fanout24/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.57 0.54 2.08 ^ fanout24/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
8 0.03 net24 (net)
0.57 0.00 2.08 ^ output17/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
0.34 0.52 2.60 ^ output17/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
1 0.07 io_out[5] (net)
0.34 0.00 2.60 ^ io_out[5] (out)
2.60 data arrival time
65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (propagated)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
-13.00 51.75 output external delay
51.75 data required time
-----------------------------------------------------------------------------
51.75 data required time
-2.60 data arrival time
-----------------------------------------------------------------------------
49.15 slack (MET)
Startpoint: _114_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Endpoint: io_out[18] (output port clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock source latency
0.13 0.06 0.06 ^ wb_clk_i (in)
2 0.02 wb_clk_i (net)
0.13 0.00 0.06 ^ clkbuf_0_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.26 0.32 ^ clkbuf_0_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
2 0.05 clknet_0_wb_clk_i (net)
0.11 0.00 0.33 ^ clkbuf_1_0__f_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.10 0.25 0.57 ^ clkbuf_1_0__f_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
11 0.04 clknet_1_0__leaf_wb_clk_i (net)
0.10 0.00 0.58 ^ _114_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
0.64 1.07 1.65 ^ _114_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
6 0.04 net11 (net)
0.64 0.02 1.66 ^ output11/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
0.34 0.53 2.20 ^ output11/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
1 0.07 io_out[18] (net)
0.34 0.00 2.20 ^ io_out[18] (out)
2.20 data arrival time
65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (propagated)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
-13.00 51.75 output external delay
51.75 data required time
-----------------------------------------------------------------------------
51.75 data required time
-2.20 data arrival time
-----------------------------------------------------------------------------
49.55 slack (MET)
Startpoint: _118_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Endpoint: io_out[2] (output port clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock source latency
0.13 0.06 0.06 ^ wb_clk_i (in)
2 0.02 wb_clk_i (net)
0.13 0.00 0.06 ^ clkbuf_0_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.26 0.32 ^ clkbuf_0_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
2 0.05 clknet_0_wb_clk_i (net)
0.11 0.00 0.33 ^ clkbuf_1_1__f_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.25 0.58 ^ clkbuf_1_1__f_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
18 0.04 clknet_1_1__leaf_wb_clk_i (net)
0.11 0.00 0.58 ^ _118_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
0.62 1.06 1.64 ^ _118_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
6 0.04 net14 (net)
0.63 0.01 1.66 ^ output14/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
0.34 0.53 2.19 ^ output14/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
1 0.07 io_out[2] (net)
0.34 0.00 2.19 ^ io_out[2] (out)
2.19 data arrival time
65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (propagated)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
-13.00 51.75 output external delay
51.75 data required time
-----------------------------------------------------------------------------
51.75 data required time
-2.19 data arrival time
-----------------------------------------------------------------------------
49.56 slack (MET)
Startpoint: _116_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Endpoint: io_out[0] (output port clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock source latency
0.13 0.06 0.06 ^ wb_clk_i (in)
2 0.02 wb_clk_i (net)
0.13 0.00 0.06 ^ clkbuf_0_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.11 0.26 0.32 ^ clkbuf_0_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
2 0.05 clknet_0_wb_clk_i (net)
0.11 0.00 0.33 ^ clkbuf_1_0__f_wb_clk_i/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
0.10 0.25 0.57 ^ clkbuf_1_0__f_wb_clk_i/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_16)
11 0.04 clknet_1_0__leaf_wb_clk_i (net)
0.10 0.00 0.58 ^ _116_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
0.62 1.06 1.64 ^ _116_/Q (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
6 0.04 net2 (net)
0.62 0.01 1.65 ^ output2/I (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
0.34 0.53 2.18 ^ output2/Z (gf180mcu_fd_sc_mcu7t5v0__clkbuf_3)
1 0.07 io_out[0] (net)
0.34 0.00 2.18 ^ io_out[0] (out)
2.18 data arrival time
65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (propagated)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
-13.00 51.75 output external delay
51.75 data required time
-----------------------------------------------------------------------------
51.75 data required time
-2.18 data arrival time
-----------------------------------------------------------------------------
49.57 slack (MET)