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foss-eda-tools / third_party / shuttle / gf180mcu / mpw-000 / slot-020 / 1d3409ba822566404d008bc08cdc60c11a44da62 / . / openlane / cntr_example / runs / cntr_example / reports / placement / 7-gpl_sta.max.rpt
blob: 65d1f153786719b9eeb8030b38403ff148812d41 [file] [log] [blame]
===========================================================================
report_checks -path_delay max (Setup)
============================================================================
Startpoint: wb_rst_i (input port clocked by wb_clk_i)
Endpoint: _116_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.15 0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock network delay (ideal)
13.00 13.00 ^ input external delay
0.51 0.30 13.30 ^ wb_rst_i (in)
2 0.03 wb_rst_i (net)
0.51 0.00 13.30 ^ _057_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.34 0.40 13.69 ^ _057_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _021_ (net)
0.34 0.00 13.69 ^ _058_/I (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
0.30 0.27 13.96 v _058_/ZN (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
4 0.02 _022_ (net)
0.30 0.00 13.96 v _059_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.23 0.41 14.37 v _059_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _023_ (net)
0.23 0.00 14.37 v _073_/A2 (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
0.62 0.44 14.81 ^ _073_/ZN (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
1 0.02 _004_ (net)
0.62 0.00 14.82 ^ _116_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
14.82 data arrival time
0.15 65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (ideal)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
64.75 ^ _116_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
-0.25 64.50 library setup time
64.50 data required time
-----------------------------------------------------------------------------
64.50 data required time
-14.82 data arrival time
-----------------------------------------------------------------------------
49.68 slack (MET)
Startpoint: wb_rst_i (input port clocked by wb_clk_i)
Endpoint: _120_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.15 0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock network delay (ideal)
13.00 13.00 ^ input external delay
0.51 0.30 13.30 ^ wb_rst_i (in)
2 0.03 wb_rst_i (net)
0.51 0.00 13.30 ^ _057_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.34 0.40 13.69 ^ _057_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _021_ (net)
0.34 0.00 13.69 ^ _058_/I (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
0.30 0.27 13.96 v _058_/ZN (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
4 0.02 _022_ (net)
0.30 0.00 13.96 v _059_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.23 0.41 14.37 v _059_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _023_ (net)
0.23 0.00 14.37 v _083_/A2 (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
0.62 0.44 14.81 ^ _083_/ZN (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
1 0.02 _008_ (net)
0.62 0.00 14.82 ^ _120_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
14.82 data arrival time
0.15 65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (ideal)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
64.75 ^ _120_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
-0.25 64.50 library setup time
64.50 data required time
-----------------------------------------------------------------------------
64.50 data required time
-14.82 data arrival time
-----------------------------------------------------------------------------
49.68 slack (MET)
Startpoint: wb_rst_i (input port clocked by wb_clk_i)
Endpoint: _128_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.15 0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock network delay (ideal)
13.00 13.00 ^ input external delay
0.51 0.30 13.30 ^ wb_rst_i (in)
2 0.03 wb_rst_i (net)
0.51 0.00 13.30 ^ _057_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.34 0.40 13.69 ^ _057_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _021_ (net)
0.34 0.00 13.69 ^ _058_/I (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
0.30 0.27 13.96 v _058_/ZN (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
4 0.02 _022_ (net)
0.30 0.00 13.96 v _069_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.24 0.42 14.37 v _069_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _030_ (net)
0.24 0.00 14.37 v _103_/A2 (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
0.61 0.44 14.81 ^ _103_/ZN (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
1 0.02 _016_ (net)
0.61 0.00 14.82 ^ _128_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
14.82 data arrival time
0.15 65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (ideal)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
64.75 ^ _128_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
-0.25 64.50 library setup time
64.50 data required time
-----------------------------------------------------------------------------
64.50 data required time
-14.82 data arrival time
-----------------------------------------------------------------------------
49.68 slack (MET)
Startpoint: wb_rst_i (input port clocked by wb_clk_i)
Endpoint: _124_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.15 0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock network delay (ideal)
13.00 13.00 ^ input external delay
0.51 0.30 13.30 ^ wb_rst_i (in)
2 0.03 wb_rst_i (net)
0.51 0.00 13.30 ^ _057_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.34 0.40 13.69 ^ _057_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _021_ (net)
0.34 0.00 13.69 ^ _058_/I (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
0.30 0.27 13.96 v _058_/ZN (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
4 0.02 _022_ (net)
0.30 0.00 13.96 v _059_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.23 0.41 14.37 v _059_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _023_ (net)
0.23 0.00 14.37 v _093_/A2 (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
0.61 0.44 14.81 ^ _093_/ZN (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
1 0.02 _012_ (net)
0.61 0.00 14.81 ^ _124_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
14.81 data arrival time
0.15 65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (ideal)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
64.75 ^ _124_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
-0.25 64.50 library setup time
64.50 data required time
-----------------------------------------------------------------------------
64.50 data required time
-14.81 data arrival time
-----------------------------------------------------------------------------
49.69 slack (MET)
Startpoint: wb_rst_i (input port clocked by wb_clk_i)
Endpoint: _119_ (rising edge-triggered flip-flop clocked by wb_clk_i)
Path Group: wb_clk_i
Path Type: max
Fanout Cap Slew Delay Time Description
-----------------------------------------------------------------------------
0.15 0.00 0.00 clock wb_clk_i (rise edge)
0.00 0.00 clock network delay (ideal)
13.00 13.00 ^ input external delay
0.51 0.30 13.30 ^ wb_rst_i (in)
2 0.03 wb_rst_i (net)
0.51 0.00 13.30 ^ _057_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.34 0.40 13.69 ^ _057_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _021_ (net)
0.34 0.00 13.69 ^ _058_/I (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
0.30 0.27 13.96 v _058_/ZN (gf180mcu_fd_sc_mcu7t5v0__clkinv_1)
4 0.02 _022_ (net)
0.30 0.00 13.96 v _069_/I (gf180mcu_fd_sc_mcu7t5v0__buf_1)
0.24 0.42 14.37 v _069_/Z (gf180mcu_fd_sc_mcu7t5v0__buf_1)
4 0.02 _030_ (net)
0.24 0.00 14.38 v _081_/A1 (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
0.62 0.43 14.80 ^ _081_/ZN (gf180mcu_fd_sc_mcu7t5v0__nor2_1)
1 0.02 _007_ (net)
0.62 0.00 14.81 ^ _119_/D (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
14.81 data arrival time
0.15 65.00 65.00 clock wb_clk_i (rise edge)
0.00 65.00 clock network delay (ideal)
-0.25 64.75 clock uncertainty
0.00 64.75 clock reconvergence pessimism
64.75 ^ _119_/CLK (gf180mcu_fd_sc_mcu7t5v0__dffq_1)
-0.25 64.50 library setup time
64.50 data required time
-----------------------------------------------------------------------------
64.50 data required time
-14.81 data arrival time
-----------------------------------------------------------------------------
49.69 slack (MET)