blob: 6a1aef8036cb099ea995585a4b614a4e4d090de3 [file] [log] [blame]
Project Chip ID is: 402704761
Setting Project Chip ID to: 1800c979
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!