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mpw-000
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slot-012
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31bab4aa7728e047df5da2a51e30ae40666dc197
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.
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verilog
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includes
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includes.rtl.caravel_user_project
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# Caravel user project includes
-
v $
(
USER_PROJECT_VERILOG
)/
rtl
/
user_project_wrapper
.
v
-
v $
(
USER_PROJECT_VERILOG
)/
rtl
/
user_module
.
v
