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gf180mcu
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mpw-000
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slot-011
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174858ebc48008d3ea46d78b217bf0c5774c9c0c
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.gitmodules
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[
submodule
"verilog/rtl/verispell"
]
path
=
verilog
/
rtl
/
verispell
url
=
https
:
//github.com/wokwi/verispell