blob: 0dc917ed2e4014c47d9b191071b7d997877512f5 [file] [log] [blame]
Step 1: Create new cells for new GPIO default vectors.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_009.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_009.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_009.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_009.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_007.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_007.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_087.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_087.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_007.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_007.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Layout file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/mag/gpio_defaults_block_008.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/gfmpw-0/u6289_gatecat/onehot_fabulous_fpga_on_gf180/verilog/gl/gpio_defaults_block_008.v already exists and does not need to be generated.
Step 2: Modify top-level layouts to use the specified defaults.
Done.