blob: 06ae113a1c533ac36ea0edb86fca70a1177798d6 [file] [log] [blame]
Project Chip ID is: 402715864
Setting Project Chip ID to: 1800f4d8
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!