commit	07b4d7e86ede2bbe21e9c81c18e221e99684985d	[log] [tgz]
author	tinybot <bot@tinytapeout.com>	Sun Dec 04 14:46:02 2022 +0000
committer	tinybot <bot@tinytapeout.com>	Sun Dec 04 14:46:02 2022 +0000
tree	b79349bc991e86a18c6fba0f04c92ce6238201c1
parent	42b7c844d22f52b97b4c6c62b501acef09739dc0 [diff]

harden project [skip ci]

def/serv_2.def[Added - diff]
def/user_project_wrapper.def[diff]
gds/serv_0.gds[diff]
gds/serv_1.gds[diff]
gds/serv_2.gds[Added - diff]
gds/user_project_wrapper.gds[diff]
lef/serv_2.lef[Added - diff]
lef/user_project_wrapper.lef[diff]
mag/serv_0.mag[diff]
mag/serv_1.mag[diff]
mag/serv_2.mag[Added - diff]
mag/user_project_wrapper.mag[diff]
maglef/serv_0.mag[diff]
maglef/serv_1.mag[diff]
maglef/serv_2.mag[Added - diff]
maglef/user_project_wrapper.mag[diff]
sdc/serv_0.sdc[diff]
sdc/serv_1.sdc[diff]
sdc/serv_2.sdc[Added - diff]
sdc/user_project_wrapper.sdc[diff]
sdf/multicorner/nom/user_project_wrapper.ff.sdf[diff]
sdf/multicorner/nom/user_project_wrapper.ss.sdf[diff]
sdf/multicorner/nom/user_project_wrapper.tt.sdf[diff]
sdf/serv_0.sdf[diff]
sdf/serv_1.sdf[diff]
sdf/serv_2.sdf[Added - diff]
sdf/user_project_wrapper.sdf[diff]
signoff/serv_0/metrics.csv[diff]
signoff/serv_1/metrics.csv[diff]
signoff/serv_2/OPENLANE_VERSION[Added - diff]
signoff/serv_2/PDK_SOURCES[Added - diff]
signoff/serv_2/metrics.csv[Added - diff]
signoff/user_project_wrapper/metrics.csv[diff]
spef/multicorner/user_project_wrapper.nom.spef[diff]
spef/serv_2.spef[Added - diff]
spef/user_project_wrapper.spef[diff]
spi/lvs/serv_2.spice[Added - diff]
spi/lvs/user_project_wrapper.spice[diff]
verilog/gl/serv_2.nl.v[Added - diff]
verilog/gl/serv_2.v[Added - diff]
verilog/gl/user_project_wrapper.nl.v[diff]
verilog/gl/user_project_wrapper.v[diff]

42 files changed

tree: b79349bc991e86a18c6fba0f04c92ce6238201c1

README.md

GF180 MPW0 Serv

An award winning CPU design fit into the GF180 MPW0 Shuttle.

To keep the design simple this project places a Serv CPU with a scan-chain around it connecting it's wishbone bus which is a combination of data and instructions out via I/O pins.

Another I/O pin is responsible for handling clock and reset. Operation will run as follows:

Using an external controller, load in default values for the wishbone bus, bring serv out of reset and clock it.
Latch in and scan out the wishbone bus values. Handle any requests.
Scan in data from the request and clock serv.
Goto 2.

In this manner we should be able to implement external peripherals like UARTs, timers, and GPIOs. The external controller can be a microcontroller, FPGA, or the caravel harness SoC.