commit f6e269f48d542b306e08e8f5a3577ec244aa44aa
author Tim Edwards <tim@opencircuitdesign.com> Thu Sep 29 16:36:27 2022 -0400
committer Tim Edwards <tim@opencircuitdesign.com> Thu Sep 29 16:36:27 2022 -0400
tree 94739f59e07de2d375a78172439ad3e2a8757258
parent 44c772975fe442b0acf374efb7cf9e222735dc80

Made a few corrections to the existing netgen setup file for
GF180MCU, and added support for the OSU standard cells (ignore
fill-type cells).

gf180mcu/netgen/gf180mcu_setup.tcl

diff --git a/gf180mcu/netgen/gf180mcu_setup.tcl b/gf180mcu/netgen/gf180mcu_setup.tcl
index 5de5581..8e95ca2 100644
--- a/gf180mcu/netgen/gf180mcu_setup.tcl
+++ b/gf180mcu/netgen/gf180mcu_setup.tcl
@@ -213,35 +213,49 @@
 # Digital cells (ignore decap, fill, and tap cells)
 # Make a separate list for each supported library
 #---------------------------------------------------------------
-# e.g., ignore class "-circuit2 gf180mcu_fd_sc_mcu7t5v0__endcap"
+# e.g., ignore class "-circuit2 gf180mcu_fd_sc_7t5v0__endcap"
 #---------------------------------------------------------------
 
 foreach cell $cells1 {
-#   if {[regexp {gf180mcu_fd_sc_mcu[^_]__fillcap_[[:digit:]]+} $cell match]} {
+#   if {[regexp {gf180mcu_fd_sc_[^_]+__fillcap_[[:digit:]]+} $cell match]} {
 #       ignore class "-circuit1 $cell"
 #   }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__endcap} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__endcap} $cell match]} {
         ignore class "-circuit1 $cell"
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__fill_[[:digit:]]+} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
         ignore class "-circuit1 $cell"
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__filltie} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__filltie} $cell match]} {
         ignore class "-circuit1 $cell"
     }
 }
 
 foreach cell $cells2 {
-#   if {[regexp {gf180mcu_fd_sc_mcu[^_]__fillcap_[[:digit:]]+} $cell match]} {
+#   if {[regexp {gf180mcu_fd_sc_[^_]+__fillcap_[[:digit:]]+} $cell match]} {
 #       ignore class "-circuit2 $cell"
 #   }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__endcap} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__endcap} $cell match]} {
         ignore class "-circuit2 $cell"
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__fill_[[:digit:]]+} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
         ignore class "-circuit2 $cell"
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__filltie} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__filltie} $cell match]} {
+        ignore class "-circuit2 $cell"
+    }
+}
+
+# Do the same for the OSU standard cell libraries
+
+foreach cell $cells1 {
+    if {[regexp {gf180mcu_osu_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
+        ignore class "-circuit1 $cell"
+    }
+}
+
+foreach cell $cells2 {
+    if {[regexp {gf180mcu_osu_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
         ignore class "-circuit2 $cell"
     }
 }
@@ -251,37 +265,51 @@
 #---------------------------------------------------------------
 
 foreach cell $cells1 {
-    if {[regexp {gr180mcu_fd_sc_mcu[^_]+__fillcap_[[:digit:]]+} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__fillcap_[[:digit:]]+} $cell match]} {
         property "-circuit1 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__endcap} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__endcap} $cell match]} {
         property "-circuit1 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__fill_[[:digit:]]+} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
         property "-circuit1 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__filltie} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__filltie} $cell match]} {
         property "-circuit1 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__antenna} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__antenna} $cell match]} {
         property "-circuit1 $cell" parallel enable
     }
 }
 
 foreach cell $cells2 {
-    if {[regexp {gr180mcu_fd_sc_mcu[^_]+__fillcap_[[:digit:]]+} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__fillcap_[[:digit:]]+} $cell match]} {
         property "-circuit2 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__endcap} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__endcap} $cell match]} {
         property "-circuit2 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__fill_[[:digit:]]+} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
         property "-circuit2 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__filltie} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__filltie} $cell match]} {
         property "-circuit2 $cell" parallel enable
     }
-    if {[regexp {gf180mcu_fd_sc_mcu[^_]__antenna} $cell match]} {
+    if {[regexp {gf180mcu_fd_sc_[^_]+__antenna} $cell match]} {
+        property "-circuit2 $cell" parallel enable
+    }
+}
+
+# Do the same for the OSU 3.3V standard cell library
+
+foreach cell $cells1 {
+    if {[regexp {gf180mcu_osu_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
+        property "-circuit1 $cell" parallel enable
+    }
+}
+
+foreach cell $cells2 {
+    if {[regexp {gf180mcu_osu_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
         property "-circuit2 $cell" parallel enable
     }
 }