| { |
| #define DESCRIPTION Skywater 0.13um CMOS, local interconnect + high-resistance poly |
| #ifdef METAL5 |
| #define OPTION1 + 5 metal layer backend stack |
| #else |
| #define OPTION1 |
| #endif (METAL5) |
| #ifdef MIM |
| #define OPTION2 + MiM caps |
| #else |
| #define OPTION2 |
| #endif (MIM) |
| #ifdef REDISTRIBUTION |
| #define OPTION3 + redistribution layer |
| #else |
| #define OPTION3 |
| #endif (REDISTRIBUTION) |
| #ifdef RERAM |
| #define OPTION4 + ReRAM |
| #else |
| #define OPTION4 |
| #endif (RERAM) |
| "foundry": "SW", |
| "foundry-name": "SkyWater", |
| "node": "TECHNAME", |
| "feature-size": "130nm", |
| "status": "active", |
| "description": "DESCRIPTION OPTION1 OPTION2 OPTION3 OPTION4", |
| "options": [ |
| #ifdef METAL5 |
| #undef METAL5 |
| #ifdef MIM || REDISTRIBUTION |
| "METAL5", |
| #else (!(MIM || REDISTRIBUTION)) |
| "METAL5" |
| #endif (!(MIM || REDISTRIBUTION)) |
| #endif (METAL5) |
| #ifdef MIM |
| #undef MIM |
| #ifdef (REDISTRIBUTION || RERAM) |
| "MIM", |
| #else |
| "MIM" |
| #endif (REDISTRIBUTION || RERAM) |
| #endif (MIM) |
| #ifdef RERAM |
| #undef RERAM |
| #ifdef (REDISTRIBUTION) |
| "RERAM", |
| #else |
| "RERAM" |
| #endif (REDISTRIBUTION) |
| #endif (RERAM) |
| #ifdef REDISTRIBUTION |
| #undef REDISTRIBUTION |
| "REDISTRIBUTION" |
| #endif (REDISTRIBUTION) |
| ], |
| "stdcells": { |
| "sky130_fd_sc_hd": "FD_SC_HD_COMMIT", |
| "sky130_fd_sc_hdll": "FD_SC_HDLL_COMMIT", |
| "sky130_fd_sc_hs": "FD_SC_HS_COMMIT", |
| "sky130_fd_sc_hvl": "FD_SC_HVL_COMMIT", |
| "sky130_fd_sc_lp": "FD_SC_LP_COMMIT", |
| "sky130_fd_sc_ls": "FD_SC_LS_COMMIT", |
| "sky130_fd_sc_ms": "FD_SC_MS_COMMIT", |
| "sky130_osu_sc_t12": "OSU_T12_COMMIT", |
| "sky130_osu_sc_t15": "OSU_T15_COMMIT", |
| "sky130_osu_sc_t18": "OSU_T18_COMMIT" |
| }, |
| "iocells": { |
| "sky130_fd_io": "FD_IO_COMMIT" |
| }, |
| "primitive": { |
| "sky130_fd_pr": "FD_PR_COMMIT", |
| "sky130_fd_pr_reram": "RERAM_COMMIT" |
| }, |
| "memory": { |
| "sky130_sram_macros": "SRAM_COMMIT", |
| "sky130_fd_bd_sram": "SRAM_BUILD_COMMIT" |
| }, |
| "other": { |
| "sky130_ml_xx_hd": "ALPHA_COMMIT", |
| "xschem_sky130": "XSCHEM_COMMIT", |
| "klayout_sky130": "KLAYOUT_COMMIT", |
| "precheck_sky130": "PRECHECK_COMMIT" |
| }, |
| "build": { |
| "open_pdks": "OPEN_PDKS_VERSION", |
| "magic": "MAGIC_VERSION" |
| }, |
| "commit": { |
| "open_pdks": "OPEN_PDKS_COMMIT", |
| "magic": "MAGIC_COMMIT" |
| }, |
| "reference": { |
| "open_pdks": "c10a581884a4373c1a48b18ea3fc02c19d8d5c88", |
| "magic": "4445663cb1b2de1eb9818cfe89f60ed7659335f3", |
| "sky130_fd_pr": "1232782c1b9fab3aacda74d67ce7c92bf7da8105", |
| "sky130_fd_io": "b9c10d039816c4026f9a10cf8a200b9b5caa1b63", |
| "sky130_fd_sc_hs": "9a855e97aa75f8a14be7eadc365c28d50045d5fc", |
| "sky130_fd_sc_ms": "26d0047c0e2dbe28fe4950f171411f6e8b3d0564", |
| "sky130_fd_sc_ls": "8e7040bfc58a17386e3d900c0e3b9c9163545c4a", |
| "sky130_fd_sc_lp": "b93a1a75fa1b864872ebb0b078f6a2dd6e318d7c", |
| "sky130_fd_sc_hd": "5a42fd01a0eeb2338340438443c7062e198d97a4", |
| "sky130_fd_sc_hdll": "d48faa83ef2d8573d85384c4eb019ab78295db0b", |
| "sky130_fd_sc_hvl": "5f544a6d5b9385ac563811e7a455b050eea5fb70", |
| "sky130_osu_sc_t12": "ac90ef0c622a9377a16b5218d9da3ac4169eeaaf", |
| "sky130_osu_sc_t15": "95d1c19abb47e1b2945847acb4e817b1b8417c43", |
| "sky130_osu_sc_t18": "aa2b509f3c8f32ea94fdb55ac9768754667c1658", |
| "sky130_sram_macros": "ebfbf5775c8cd433ad38a4d825e46c2275231511", |
| "sky130_fd_bd_sram": "be33adbcf188fdeab5c061699847d9d440f7a084", |
| "sky130_fd_pr_reram": "d6d2a3c6960aac0a0b12fc21221c31777bbf284d", |
| "sky130_ml_xx_hd": "6eb3b0718552b034f1bf1870285ff135e3fb2dcb", |
| "xschem_sky130": "0597d6cd26ad460d3f4d689f9e6a11f33dc262ff", |
| "klayout_sky130": "68b8aa87c129191f642da662d348e9ca6930581b", |
| "precheck_sky130": "0941bdc1b62b5c3f99c8683bd11199d330af2ef3" |
| } |
| } |