Added code to fix_digital_lef.py to correct the LEF class of the
diode antenna cells to "CLASS CORE ANTENNACELL", for all digital
standard cell libraries.
diff --git a/gf180mcu/gf180mcu.json b/gf180mcu/gf180mcu.json
index 9b5a2a8..c385026 100644
--- a/gf180mcu/gf180mcu.json
+++ b/gf180mcu/gf180mcu.json
@@ -84,12 +84,12 @@
"magic": "MAGIC_COMMIT"
}
"reference": {
- "open_pdks": "fb6f374beff316f9a8e0b5585facfc18008c0f2d",
+ "open_pdks": "cc0029b45c68137aa21323912f50d2fc17eeea13",
"magic": "43d5cc280413b0fd947b555bf1e8d79ea8681450",
- "gf180mcu_fd_pr": "92ec4b2e5eb193a0c5c2754413d44981c8e17e16",
- "gf180mcu_fd_io": "5cc533968c9d03972f92a461af0edc80118b1e9c",
- "gf180mcu_fd_sc_mcu7t5v0": "1f37f62c329b62710f4331d68272beeae20140e5",
- "gf180mcu_fd_sc_mcu9t5v0": "1f37f62c329b62710f4331d68272beeae20140e5",
- "gf180mcu_fd_ip_sram": "343ab45497682f3f3f808ee4c79a8f92c5010636"
+ "gf180mcu_fd_pr": "cc0029b45c68137aa21323912f50d2fc17eeea13",
+ "gf180mcu_fd_io": "cc0029b45c68137aa21323912f50d2fc17eeea13",
+ "gf180mcu_fd_sc_mcu7t5v0": "cc0029b45c68137aa21323912f50d2fc17eeea13",
+ "gf180mcu_fd_sc_mcu9t5v0": "cc0029b45c68137aa21323912f50d2fc17eeea13",
+ "gf180mcu_fd_ip_sram": "cc0029b45c68137aa21323912f50d2fc17eeea13"
}
}
diff --git a/sky130/custom/scripts/fix_digital_lef.py b/sky130/custom/scripts/fix_digital_lef.py
index 417a949..d0d13e0 100755
--- a/sky130/custom/scripts/fix_digital_lef.py
+++ b/sky130/custom/scripts/fix_digital_lef.py
@@ -7,6 +7,10 @@
# magic do not have VNB and VPB pins. This script adds the annotation
# for port use and port direction.
#
+# (Added 8/11/2022) The script also reclassifies the antenna diode cell
+# as core sub-type ANTENNACELL, which the original standard cell LEF
+# views fail to do.
+#
# This script is a filter to be run by setting the name of this script as
# the value to "filter=" for the model install in the sky130 Makefile.
@@ -31,8 +35,24 @@
modified = False
endrex = re.compile('[ \t]*END[ \t]+VGND')
+ macrorex = re.compile('^MACRO[ \t]+([^ \t\n]+)')
+ classrex = re.compile('^[ \t]*CLASS')
+ macroname = None
for line in llines:
+
+ # Check for MACRO line and record the macro name
+ mmatch = macrorex.match(line)
+ if mmatch:
+ macroname = mmatch.group(1)
+
+ # Check for "CLASS" related to "DIODE"
+ cmatch = classrex.match(line)
+ if cmatch and macroname:
+ if '__diode_' in macroname:
+ line = ' CLASS CORE ANTENNACELL ;'
+ modified = True
+
fixedlines.append(line)
# Check for end of VGND pin in file
@@ -51,6 +71,7 @@
fixedlines.append(' END')
fixedlines.append(' END VPB')
modified = True
+ macroname = None
# Write output
if outname == None:
diff --git a/sky130/sky130.json b/sky130/sky130.json
index 6dc1a66..081668e 100644
--- a/sky130/sky130.json
+++ b/sky130/sky130.json
@@ -92,7 +92,7 @@
"magic": "MAGIC_COMMIT"
},
"reference": {
- "open_pdks": "fb6f374beff316f9a8e0b5585facfc18008c0f2d",
+ "open_pdks": "cc0029b45c68137aa21323912f50d2fc17eeea13",
"magic": "43d5cc280413b0fd947b555bf1e8d79ea8681450",
"skywater_pdk": "f70d8ca46961ff92719d8870a18a076370b85f6c",
"sky130_osu_sc_t12": "ac90ef0c622a9377a16b5218d9da3ac4169eeaaf",