Merge branch 'master' of opencircuitdesign.com:/home/tim/gitsrc/open_pdks/
diff --git a/VERSION b/VERSION index 238d6e8..bb83058 100644 --- a/VERSION +++ b/VERSION
@@ -1 +1 @@ -1.0.7 +1.0.12
diff --git a/common/foundry_install.py b/common/foundry_install.py index 2067663..149c21f 100755 --- a/common/foundry_install.py +++ b/common/foundry_install.py
@@ -613,7 +613,8 @@ # Could properly make space for the cell here. . . print('box move e 200', file=ofile) - print('puts stdout "Writing GDS file ' + destlib + '"', file=ofile) + print('puts stdout "Writing GDS library ' + destlib + '"', file=ofile) + print('gds library', file=ofile) print('gds write ' + destlib, file=ofile) print('puts stdout "Done."', file=ofile) print('quit -noprompt', file=ofile)
diff --git a/common/soc_floorplanner.py b/common/soc_floorplanner.py index 959a623..31c6b8f 100755 --- a/common/soc_floorplanner.py +++ b/common/soc_floorplanner.py
@@ -260,7 +260,7 @@ self.vlogimport() self.readplacement(precheck=True) self.resolve() - self.generate(0) + self.generate() # Local routines for handling printing to the text console @@ -525,7 +525,7 @@ # position; corners are fixed by definition. if padrow == self.NEpad or padrow == self.SEpad or padrow == self.SWpad or padrow == self.NWpad: # Easier to run generate() than to put the pad back. . . - self.generate(0) + self.generate() return # Find the original center point of the pad being moved @@ -656,7 +656,7 @@ rowbefore.insert(idx, pad) # Re-run padring - self.generate(0) + self.generate() def on_scrollwheel(self, event): if event.num == 4: @@ -1923,7 +1923,7 @@ # Generate a new padframe by writing the configuration file, running # padring, reading back the DEF file, and (re)poplulating the workspace - def generate(self, level): + def generate(self, level=0): self.print('Generate legal padframe using padring') # Write out the configuration file
diff --git a/common/staging_install.py b/common/staging_install.py index 3e13cb0..2994ac0 100755 --- a/common/staging_install.py +++ b/common/staging_install.py
@@ -317,9 +317,9 @@ # absolute pathname. stagingdir = os.path.abspath(stagingdir) - # If link_from is the same as localdir, then set link_from to None - if link_from == localdir: - link_from = None + # If link_from is the same as localdir, then set link_from to None + if link_from == localdir: + link_from = None # checkdir is the DIST target directory for the PDK pointed # to by link_name. Files must be found there before creating @@ -411,7 +411,7 @@ # match (Note: This is done only for ngspice model files; other tool files are # generally small and deemed unnecessary to make symbolic links). - if link_from != 'source': + if link_from and link_from != 'source': thispdk = os.path.split(targetdir)[1] # Only create links for PDKs other than the one we are making links to. @@ -472,7 +472,7 @@ # file "sources.txt" with the name of the source directories for each # install directory. - if link_from == 'source': + if link_from and link_from == 'source': print('Replacing files with symbolic links to source where possible.') for refdir in refdirs: if ef_format:
diff --git a/sky130/Makefile b/sky130/Makefile index adcaa9a..186ff6b 100644 --- a/sky130/Makefile +++ b/sky130/Makefile
@@ -335,11 +335,11 @@ -techlef %l/latest/tech/*.tlef \ -spice %l/latest/cells/*/*.spice compile-only \ -cdl %l/latest/cells/*/*.cdl ignore=topography compile-only \ - -lef %l/latest/cells/*/*.lef compile-only \ + -lef %l/latest/cells/*/*.lef exclude=*.*.v compile-only \ -doc %l/latest/cells/*/*.pdf \ -lib %l/latest/timing/*.lib \ -gds %l/latest/cells/*/*.gds compile-only \ - -verilog %l/latest/cells/*/*.v exclude=*.*.v compile-only \ + -verilog %l/latest/cells/*/*.v compile-only \ -library digital sky130_fd_sc_hd \ -library digital sky130_fd_sc_hdll \ -library digital sky130_fd_sc_hvl \
diff --git a/sky130/custom/scripts/vpb_vnb_convert.py b/sky130/custom/scripts/vpb_vnb_convert.py new file mode 100755 index 0000000..db781e3 --- /dev/null +++ b/sky130/custom/scripts/vpb_vnb_convert.py
@@ -0,0 +1,64 @@ +#!/usr/bin/env python3 +# +# Convert VNB and VPB layers in a LEF file from "li1" or "met1" to +# "pwell" and "nwell" masterslice layers, as they should be. +# + +import os +import sys +import re + +if len(sys.argv) < 3: + print("Usage: vpb_vnb_convert.py <lef_file_in> <lef_file_out>") + sys.exit(1) + +lef_file_in = sys.argv[1] +lef_file_out = sys.argv[2] + +print("Input: " + lef_file_in) +print("Output: " + lef_file_out) + +with open(lef_file_in, 'r') as ifile: + leflines = ifile.read().splitlines() + +layrex = re.compile('[ \t]*LAYER[ \t]+([^ \t]+)[ \t]+;') +pinrex = re.compile('[ \t]*PIN[ \t]+([^ \t\n]+)') +endrex = re.compile('[ \t]*END[ \t]+([^ \t\n]+)') +subrex = re.compile('([ \t]*LAYER[ \t]+)([^ \t]+)([ \t]+;)') + +vpbpin = False +vnbpin = False + +linesout = [] + +for line in leflines: + lineout = line + + lmatch = layrex.match(line) + pmatch = pinrex.match(line) + ematch = endrex.match(line) + + if pmatch: + pinname = pmatch.group(1) + + if pinname == 'VNB': + vnbpin = True + elif pinname == 'VPB': + vpbpin = True + + elif ematch: + pinname = '' + vnbpin = False + vpbpin = False + + elif lmatch: + if vpbpin: + lineout = subrex.sub(r'\1nwell\3', line) + elif vnbpin: + lineout = subrex.sub(r'\1pwell\3', line) + + linesout.append(lineout) + +with open(lef_file_out, 'w') as ofile: + for line in linesout: + print(line, file=ofile)
diff --git a/sky130/magic/sky130.tech b/sky130/magic/sky130.tech index 4da410e..7f23296 100644 --- a/sky130/magic/sky130.tech +++ b/sky130/magic/sky130.tech
@@ -3446,6 +3446,9 @@ lef + masterslice pwell pwell PWELL substrate + masterslice nwell nwell NWELL + routing li li1 LI1 LI li routing m1 met1 MET1 m1