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foss-eda-tools/third_party/opencircuitdesign.com/open_pdks/414a6116a64918c99fd8426ac4a8f4098f640960^!/.
commit
414a6116a64918c99fd8426ac4a8f4098f640960
[log]
author
Leo Moser <leomoser99@gmail.com>
Tue Apr 21 15:42:22 2026 +0200
committer
R. Timothy Edwards <tim@opencircuitdesign.com>
Mon Apr 27 13:31:20 2026 -0400
tree
a3258180daf037423523be1ee4e6a8665e385ea9
parent
1f787d97d9bdaaec031d46f85ee08a32e294c117 [diff]
sky130: add io config, update scl configs

Signed-off-by: Leo Moser <leomoser99@gmail.com>

diff --git a/sky130/Makefile.in b/sky130/Makefile.in
index ac7515d..3c28456 100644
--- a/sky130/Makefile.in
+++ b/sky130/Makefile.in

@@ -1247,7 +1247,7 @@
 		fi ; \
 	fi
 
-librelane-%: librelane/config.tcl librelane/sky130_fd_sc_hd/config.tcl librelane/sky130_fd_sc_hs/config.tcl librelane/sky130_fd_sc_ms/config.tcl librelane/sky130_fd_sc_ls/config.tcl librelane/sky130_fd_sc_hdll/config.tcl librelane/sky130_osu_sc_t18/config.tcl
+librelane-%: librelane/config.tcl librelane/sky130_fd_sc_hd/config.tcl librelane/sky130_fd_sc_hs/config.tcl librelane/sky130_fd_sc_ms/config.tcl librelane/sky130_fd_sc_ls/config.tcl librelane/sky130_fd_sc_hdll/config.tcl librelane/sky130_osu_sc_t18/config.tcl librelane/sky130_ef_io/config.tcl
 	mkdir -p ${LIBRELANETOP_STAGING_$*}
 	mkdir -p ${LIBRELANE_STAGING_$*}
 	rm -rf ${LIBRELANE_STAGING_$*}/custom_cells/*
@@ -1258,6 +1258,7 @@
 	mkdir -p ${LIBRELANE_STAGING_$*}/sky130_fd_sc_hdll
 	mkdir -p ${LIBRELANE_STAGING_$*}/sky130_fd_sc_hvl
 	mkdir -p ${LIBRELANE_STAGING_$*}/sky130_osu_sc_t18
+	mkdir -p ${LIBRELANE_STAGING_$*}/sky130_ef_io
 	rm -f ${LIBRELANE_STAGING_$*}/common_pdn.info
 	rm -f ${LIBRELANE_STAGING_$*}/config.tcl
 	for file in ${LIBRELANE_COMMON} ; do \
@@ -1281,6 +1282,9 @@
 	for file in ${LIBRELANE_COMMON} ; do \
 	    rm -f ${LIBRELANE_STAGING_$*}/sky130_osu_sc_t18/$$file ; \
 	done
+	for file in ${LIBRELANE_COMMON} ; do \
+	    rm -f ${LIBRELANE_STAGING_$*}/sky130_ef_io/$$file ; \
+	done
 
 	rm -f ${LIBRELANE_STAGING_$*}/rules.openrcx.sky130$*.min.magic
 	rm -f ${LIBRELANE_STAGING_$*}/rules.openrcx.sky130$*.nom.magic
@@ -1356,6 +1360,9 @@
 	${CPP} -quiet ${SKY130$*_DEFS} librelane/sky130_osu_sc_t18/tracks.info \
 		${LIBRELANE_STAGING_$*}/sky130_osu_sc_t18/tracks.info
 
+	${CPP} -quiet ${SKY130$*_DEFS} librelane/sky130_ef_io/config.tcl \
+		${LIBRELANE_STAGING_$*}/sky130_ef_io/config.tcl
+
 # NOTE: ReRAM is not in variant A so there is no reram-build-A.
 vendor-A: primitive-build-A io-build-A sram-build-A sram-space-build-A digital-hd-build-A digital-hvl-build-A digital-hdll-build-A digital-lp-build-A digital-hs-build-A digital-ms-build-A digital-ls-build-A alpha-build-A osu-t12-build-A osu-t15-build-A osu-t18-build-A
 

diff --git a/sky130/librelane/config.tcl b/sky130/librelane/config.tcl
index a18f5c0..0d3973c 100755
--- a/sky130/librelane/config.tcl
+++ b/sky130/librelane/config.tcl

@@ -5,8 +5,9 @@
 if { ![info exist ::env(STD_CELL_LIBRARY)] } {
 	set ::env(STD_CELL_LIBRARY) sky130_fd_sc_hd
 }
-if { ![info exist ::env(STD_CELL_LIBRARY_OPT)] } {
-	set ::env(STD_CELL_LIBRARY_OPT) sky130_fd_sc_hd
+
+if { ![info exist ::env(PAD_CELL_LIBRARY)] } {
+	set ::env(PAD_CELL_LIBRARY) sky130_ef_io
 }
 
 # Placement site for core cells
@@ -20,43 +21,59 @@
 set ::env(STD_CELL_POWER_PINS) "VPWR VPB"
 set ::env(STD_CELL_GROUND_PINS) "VGND VNB"
 
+
 # Technology LEF
-set ::env(TECH_LEF) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/techlef/$::env(STD_CELL_LIBRARY)__nom.tlef"
-set ::env(TECH_LEF_MIN) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/techlef/$::env(STD_CELL_LIBRARY)__min.tlef"
-set ::env(TECH_LEF_MAX) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/techlef/$::env(STD_CELL_LIBRARY)__max.tlef"
-set ::env(CELLS_LEF) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lef/*.lef"]
-set ::env(GDS_FILES) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/gds/*.gds"]
-set ::env(STD_CELL_LIBRARY_CDL)	"$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/cdl/$::env(STD_CELL_LIBRARY).cdl"
+set ::env(TECH_LEFS) [dict create]
+dict set ::env(TECH_LEFS) "nom_*" [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/techlef/$::env(STD_CELL_LIBRARY)__nom.tlef"]
+dict set ::env(TECH_LEFS) "min_*" [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/techlef/$::env(STD_CELL_LIBRARY)__min.tlef"]
+dict set ::env(TECH_LEFS) "max_*" [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/techlef/$::env(STD_CELL_LIBRARY)__max.tlef"]
 
-set ::env(GPIO_PADS_LEF) "\
-	$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lef/sky130_fd_io.lef\
-	$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/lef/sky130_ef_io.lef\
-"
-# sky130_fd_io.v is not parsable by yosys, so it cannot be included it here just yet...
-set ::env(GPIO_PADS_VERILOG) "\
-	$::env(PDK_ROOT)/$::env(PDK)/libs.ref/sky130_fd_io/verilog/sky130_ef_io.v
+# Corners
+set ::env(STA_CORNERS) "\
+    nom_tt_025C_1v80 \
+    nom_ss_100C_1v60 \
+    nom_ff_n40C_1v95 \
+    min_tt_025C_1v80 \
+    min_ss_100C_1v60 \
+    min_ff_n40C_1v95 \
+    max_tt_025C_1v80 \
+    max_ss_100C_1v60 \
+    max_ff_n40C_1v95 \
 "
 
-set ::env(GPIO_PADS_PREFIX) "sky130_fd_io sky130_ef_io"
+set ::env(DEFAULT_CORNER) "nom_tt_025C_1v80"
 
-# Optimization library
-set ::env(TECH_LEF_OPT) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY_OPT)/techlef/$::env(STD_CELL_LIBRARY_OPT)__nom.tlef"
-set ::env(CELLS_LEF_OPT) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY_OPT)/lef/*.lef"]
-set ::env(GDS_FILES_OPT) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY_OPT)/gds/*.gds"]
-set ::env(STD_CELL_LIBRARY_OPT_CDL)	"$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY_OPT)/cdl/$::env(STD_CELL_LIBRARY_OPT).cdl"
+# Check all timing corners
+set ::env(TIMING_VIOLATION_CORNERS) "*"
 
-# Optimization library slowest corner
-set tmp $::env(STD_CELL_LIBRARY)
-set ::env(STD_CELL_LIBRARY) $::env(STD_CELL_LIBRARY_OPT)
-source "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY_OPT)/config.tcl"
-set ::env(LIB_SLOWEST_OPT) $::env(LIB_SLOWEST)
-set ::env(STD_CELL_LIBRARY) $tmp
-source "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/config.tcl"
-
-set ::env(GPIO_PADS_LEF_CORE_SIDE) "\
-	$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/custom_cells/lef/sky130_fd_io_core.lef\
-	$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/custom_cells/lef/sky130_ef_io_core.lef\
+# Technology lib
+set ::env(CELL_LIBS) [dict create]
+dict set ::env(CELL_LIBS) "*_tt_025C_1v80" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)__tt_025C_1v80.lib\
 "
+dict set ::env(CELL_LIBS) "*_ff_n40C_1v95" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)__ff_n40C_1v95.lib\
+"
+dict set ::env(CELL_LIBS) "*_ss_100C_1v60" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)__ss_100C_1v60.lib\
+"
+
+# Standard cells
+set ::env(CELL_LEFS) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lef/*.lef"]
+set ::env(CELL_GDS) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/gds/*.gds"]
+set ::env(CELL_VERILOG_MODELS) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/verilog/$::env(STD_CELL_LIBRARY).v"
+set ::env(CELL_SPICE_MODELS) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/spice/*.spice"]
+set ::env(CELL_CDLS) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/cdl/$::env(STD_CELL_LIBRARY).cdl"
+
+# Pad cells
+set ::env(PAD_LEFS) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/lef/*.lef"]
+set ::env(PAD_GDS) "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/gds/sky130_fd_io.gds \
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/gds/sky130_ef_io.gds \
+"
+set ::env(PAD_VERILOG_MODELS) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/verilog/$::env(PAD_CELL_LIBRARY)__blackbox_pp.v"
+set ::env(PAD_SPICE_MODELS) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/spice/$::env(PAD_CELL_LIBRARY).spice"
+set ::env(PAD_CDLS) [glob "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/cdl/*.cdl"]
 
 # magic setup
 set ::env(MAGIC_MAGICRC) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/magic/TECHNAME.magicrc"
@@ -101,9 +118,6 @@
 # Default DRC Exclude List
 set ::env(DRC_EXCLUDE_CELL_LIST) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/drc_exclude.cells"
 
-# DRC Exclude List for Optimization library
-set ::env(DRC_EXCLUDE_CELL_LIST_OPT) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY_OPT)/drc_exclude.cells"
-
 # Open-RCX Rules File
 set ::env(RCX_RULES) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/rules.openrcx.$::env(PDK).nom.spef_extractor"
 set ::env(RCX_RULES_MIN) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/rules.openrcx.$::env(PDK).min.spef_extractor"

diff --git a/sky130/librelane/sky130_ef_io/config.tcl b/sky130/librelane/sky130_ef_io/config.tcl
new file mode 100644
index 0000000..0a214a1
--- /dev/null
+++ b/sky130/librelane/sky130_ef_io/config.tcl

@@ -0,0 +1,58 @@
+set current_folder [file dirname [file normalize [info script]]]
+
+# Pad IO sites
+set ::env(PAD_SITE_NAME) "sky130_io"
+set ::env(PAD_CORNER_SITE_NAME) "sky130_io_corner"
+
+set ::env(PAD_FAKE_SITES) [dict create]
+dict set ::env(PAD_FAKE_SITES) "sky130_io" "1.0, 200"
+dict set ::env(PAD_FAKE_SITES) "sky130_io_corner" "200.0, 204.0"
+
+set ::env(PAD_ROTATION_HORIZONTAL) "R180"
+set ::env(PAD_ROTATION_VERTICAL) "R180"
+set ::env(PAD_ROTATION_CORNER) "R180"
+
+# Set IO pad information
+set ::env(PAD_CELLS) [dict create]
+dict set ::env(PAD_CELLS) "sky130_io*" "80, 200"
+set ::env(PAD_CORNER) "sky130_ef_io__corner_pad"
+set ::env(PAD_FILLERS) "\
+    sky130_ef_io__com_bus_slice_20um\
+    sky130_ef_io__com_bus_slice_10um\
+    sky130_ef_io__com_bus_slice_5um\
+    sky130_ef_io__com_bus_slice_1um\
+"
+
+# Technology lib
+set ::env(PAD_LIBS) [dict create]
+dict set ::env(PAD_LIBS) "*_tt_025C_1v80" "\
+    [glob $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/lib/$::env(PAD_CELL_LIBRARY)__*_tt_025C_1v80_3v30*.lib] \
+"
+dict set ::env(PAD_LIBS) "*_ff_n40C_1v95" "\
+    [glob $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/lib/$::env(PAD_CELL_LIBRARY)__*_ff_n40C_1v95_5v50*.lib] \
+"
+dict set ::env(PAD_LIBS) "*_ss_100C_1v60" "\
+    [glob $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(PAD_CELL_LIBRARY)/lib/$::env(PAD_CELL_LIBRARY)__*_ss_100C_1v60_3v00*.lib] \
+"
+
+# Pad bondpad information (if needed)
+#set ::env(PAD_BONDPAD_NAME) "bondpad_70x70"
+#set ::env(PAD_BONDPAD_WIDTH) "70"
+#set ::env(PAD_BONDPAD_HEIGHT) "70"
+#set ::env(PAD_BONDPAD_OFFSETS) [dict create]
+#dict set ::env(PAD_BONDPAD_OFFSETS) "sg13g2_IOPad*" "5.0, -70.0"
+
+# Pad io terminals (if needed)
+set ::env(PAD_PLACE_IO_TERMINALS) "\
+    sky130_fd_io__top_gpiov2/PAD\
+    sky130_ef_io__gpiov2_pad/PAD\
+    sky130_ef_io__vccd_lvc_pad/VCCD_PAD\
+    sky130_ef_io__vssd_lvc_pad/VSSD_PAD\
+    sky130_ef_io__vddio_lvc_pad/VDDIO_PAD\
+    sky130_ef_io__vssio_lvc_pad/VSSIO_PAD\
+"
+
+# Sealring is added afterwards
+set ::env(PAD_EDGE_SPACING) "0"
+
+#set ::env(KLAYOUT_SEALRING_SCRIPT) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/klayout/tech/scripts/sealring.py"

diff --git a/sky130/librelane/sky130_fd_sc_hd/config.tcl b/sky130/librelane/sky130_fd_sc_hd/config.tcl
index 37c4402..edf96fa 100755
--- a/sky130/librelane/sky130_fd_sc_hd/config.tcl
+++ b/sky130/librelane/sky130_fd_sc_hd/config.tcl

@@ -1,12 +1,6 @@
 set current_folder [file dirname [file normalize [info script]]]
 # Technology lib
 
-set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hd__tt_025C_1v80.lib"
-set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hd__ff_n40C_1v95.lib"
-set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hd__ss_100C_1v60.lib"
-
-set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)
-
 # MUX4 mapping
 set ::env(SYNTH_MUX4_MAP) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/mux4_map.v"
 

diff --git a/sky130/librelane/sky130_fd_sc_hdll/config.tcl b/sky130/librelane/sky130_fd_sc_hdll/config.tcl
index 8ff1459..3bd0830 100755
--- a/sky130/librelane/sky130_fd_sc_hdll/config.tcl
+++ b/sky130/librelane/sky130_fd_sc_hdll/config.tcl

@@ -1,12 +1,6 @@
 set current_folder [file dirname [file normalize [info script]]]
 # Technology lib
 
-set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hdll__tt_025C_1v80.lib"
-set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hdll__ff_n40C_1v95.lib"
-set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hdll__ss_100C_1v60.lib"
-
-set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)
-
 # MUX2 mapping
 set ::env(SYNTH_MUX_MAP) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/mux2_map.v"
 

diff --git a/sky130/librelane/sky130_fd_sc_hs/config.tcl b/sky130/librelane/sky130_fd_sc_hs/config.tcl
index 8c7322d..467fc6f 100755
--- a/sky130/librelane/sky130_fd_sc_hs/config.tcl
+++ b/sky130/librelane/sky130_fd_sc_hs/config.tcl

@@ -1,12 +1,6 @@
 set current_folder [file dirname [file normalize [info script]]]
 # Technology lib
 
-set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hs__tt_025C_1v80.lib"
-set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hs__ff_n40C_1v95.lib"
-set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hs__ss_100C_1v60.lib"
-
-set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)
-
 # MUX4 mapping
 set ::env(SYNTH_MUX4_MAP) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/mux4_map.v"
 

diff --git a/sky130/librelane/sky130_fd_sc_hvl/config.tcl b/sky130/librelane/sky130_fd_sc_hvl/config.tcl
index 4550f89..753090e 100644
--- a/sky130/librelane/sky130_fd_sc_hvl/config.tcl
+++ b/sky130/librelane/sky130_fd_sc_hvl/config.tcl

@@ -1,15 +1,36 @@
 set current_folder [file dirname [file normalize [info script]]]
 # Technology lib
 
-set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__tt_025C_3v30.lib"
-set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__ff_n40C_5v50.lib"
-set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_hvl__ss_150C_1v65.lib"
-
-set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)
-
 set ::env(VDD_PIN_VOLTAGE) "3.30"
 set ::env(GND_PIN_VOLTAGE) "0.00"
 
+# Corners
+set ::env(STA_CORNERS) "\
+    nom_tt_025C_3v30 \
+    nom_ss_150C_1v65 \
+    nom_ff_n40C_5v50 \
+    min_tt_025C_3v30 \
+    min_ss_150C_1v65 \
+    min_ff_n40C_5v50 \
+    max_tt_025C_3v30 \
+    max_ss_150C_1v65 \
+    max_ff_n40C_5v50 \
+"
+
+set ::env(DEFAULT_CORNER) "nom_tt_025C_3v30"
+
+# Technology lib
+set ::env(CELL_LIBS) [dict create]
+dict set ::env(CELL_LIBS) "*_tt_025C_3v30" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)__tt_025C_3v30.lib\
+"
+dict set ::env(CELL_LIBS) "*_ff_n40C_5v50" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)__ff_n40C_5v50.lib\
+"
+dict set ::env(CELL_LIBS) "*_ss_150C_1v65" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)__ss_150C_1v65.lib\
+"
+
 # MUX4 mapping
 set ::env(SYNTH_MUX4_MAP) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/mux4_map.v"
 

diff --git a/sky130/librelane/sky130_fd_sc_ls/config.tcl b/sky130/librelane/sky130_fd_sc_ls/config.tcl
index c344d3b..57baf56 100755
--- a/sky130/librelane/sky130_fd_sc_ls/config.tcl
+++ b/sky130/librelane/sky130_fd_sc_ls/config.tcl

@@ -1,12 +1,6 @@
 set current_folder [file dirname [file normalize [info script]]]
 # Technology lib
 
-set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_ls__tt_025C_1v80.lib"
-set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_ls__ff_n40C_1v95.lib"
-set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_ls__ss_100C_1v60.lib"
-
-set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)
-
 # MUX4 mapping
 set ::env(SYNTH_MUX4_MAP) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/mux4_map.v"
 

diff --git a/sky130/librelane/sky130_fd_sc_ms/config.tcl b/sky130/librelane/sky130_fd_sc_ms/config.tcl
index 15b0fd7..dd28eda 100755
--- a/sky130/librelane/sky130_fd_sc_ms/config.tcl
+++ b/sky130/librelane/sky130_fd_sc_ms/config.tcl

@@ -1,12 +1,6 @@
 set current_folder [file dirname [file normalize [info script]]]
 # Technology lib
 
-set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_ms__tt_025C_1v80.lib"
-set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_ms__ff_n40C_1v95.lib"
-set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_fd_sc_ms__ss_100C_1v60.lib"
-
-set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)
-
 # MUX4 mapping
 set ::env(SYNTH_MUX4_MAP) "$::env(PDK_ROOT)/$::env(PDK)/libs.tech/librelane/$::env(STD_CELL_LIBRARY)/mux4_map.v"
 

diff --git a/sky130/librelane/sky130_osu_sc_t18/config.tcl b/sky130/librelane/sky130_osu_sc_t18/config.tcl
index 6109dd8..2d94031 100755
--- a/sky130/librelane/sky130_osu_sc_t18/config.tcl
+++ b/sky130/librelane/sky130_osu_sc_t18/config.tcl

@@ -1,11 +1,32 @@
 set current_folder [file dirname [file normalize [info script]]]
 # Technology lib
 
-set ::env(LIB_SYNTH) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_osu_sc_TT_1P8_25C.lib"
-set ::env(LIB_FASTEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_osu_sc_FF_1P8_25C.lib"
-set ::env(LIB_SLOWEST) "$::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/sky130_osu_sc_SS_1P8_25C.lib"
+# Corners
+set ::env(STA_CORNERS) "\
+    nom_TT_1P8_25C \
+    nom_FF_1P8_25C \
+    nom_SS_1P8_25C \
+    min_TT_1P8_25C \
+    min_FF_1P8_25C \
+    min_SS_1P8_25C \
+    max_TT_1P8_25C \
+    max_FF_1P8_25C \
+    max_SS_1P8_25C \
+"
 
-set ::env(LIB_TYPICAL) $::env(LIB_SYNTH)
+set ::env(DEFAULT_CORNER) "nom_TT_1P8_25C"
+
+# Technology lib
+set ::env(CELL_LIBS) [dict create]
+dict set ::env(CELL_LIBS) "*_TT_1P8_25C" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)_TT_1P8_25C.lib\
+"
+dict set ::env(CELL_LIBS) "*_FF_1P8_25C" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)_FF_1P8_25C.lib\
+"
+dict set ::env(CELL_LIBS) "*_SS_1P8_25C" "\
+    $::env(PDK_ROOT)/$::env(PDK)/libs.ref/$::env(STD_CELL_LIBRARY)/lib/$::env(STD_CELL_LIBRARY)_SS_1P8_25C.lib\
+"
 
 # Placement site for core cells
 # This can be found in the technology lef (SITE)