Revised the code that generates MiM caps in the PDK Tcl scripts,
because the DRC rules specifically prevent cap2m overlapping via3; so
to make an actual stacked capacitor, the contacts for the lower cap
cannot be directly under the first. So the options have been enhanced
to allow the contact to the MiM caps to only partially cover the
capacitor plate area. Also decreased the spacing from cap plate to
contact to the minimum required, and added code to increase that
distance as necessary to enforce the minimum metal spacing rule on
the capacitor top. Also updated the extraction rule for the
diffusion resistor types to match the added subcircuit definitions
for both.
diff --git a/sky130/Makefile.in b/sky130/Makefile.in
index a90cc87..f07db8f 100644
--- a/sky130/Makefile.in
+++ b/sky130/Makefile.in
@@ -302,7 +302,7 @@
openlane-a: openlane/common_pdn.tcl openlane/config.tcl openlane/sky130_fd_sc_hd/config.tcl openlane/sky130_fd_sc_hs/config.tcl openlane/sky130_fd_sc_ms/config.tcl openlane/sky130_fd_sc_ls/config.tcl openlane/sky130_fd_sc_hdll/config.tcl openlane/sky130_osu_sc_t18/config.tcl
mkdir -p ${OPENLANETOP_STAGING_A}
mkdir -p ${OPENLANE_STAGING_A}
- rm -f ${OPENLANE_STAGING_A}/custom_cells/*
+ rm -rf ${OPENLANE_STAGING_A}/custom_cells/*
mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_hd
mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_hs
mkdir -p ${OPENLANE_STAGING_A}/sky130_fd_sc_ls
