| # Makefile for Efabless design kits for gf180mcu: |
| # |
| # This file supports all the process options including 2 to 6 metals, |
| # and multiple thicknesses of the top metal. The three PDKs generated by |
| # the Makefile represent the three backend options for which the I/O library |
| # has layout, which are, namely, 3-, 4-, and 5- metal options. |
| # |
| # Important note about the process: GF180MCU uses the same base process as |
| # other GF180 processes. However, instead of a thin oxide gate, the base |
| # oxide is a thick oxide, and the thick oxide mask defines a thicker oxide. |
| # The process DRC rules then follow the rule sets for thick oxide devices, |
| # so the minimum length transistor is 280nm, making this much more like a |
| # 0.28um process than a 0.18um process. |
| # |
| # Notes about definitions: |
| # METALSN means N layers of metal, where N can be 2 to 6. |
| # THICKMET3P0 means that the top metal is 3.0um thick |
| # THICKMET1P1 means that the top metal is 1.1um thick |
| # THICKMET0P9 means that the top metal is 0.9um thick |
| # Otherwise, the top metal is 0.6um thick |
| # Always use exactly one "METALSN" option (N = 4 to 6). |
| # |
| # NOTE: Using "METALSN" instead of "METALN" because "METALN" are the preferred |
| # layer names in the technology LEF file. |
| # |
| # MIM means that the MiM cap is defined between top metal and the one below. |
| # The process defines a "MIM OPT A" with the MiM cap between metals 3 and 2. |
| # Because this option is only available with METALS4 (For METALS3 options A |
| # and B are the same), it is not being implemented. |
| # |
| # MIM caps are mutually-exclusive-selectable 1fF, 1.5fF, or 2fF per um^2. |
| # For simplicity, this file assumes the 2fF per um^2 value. |
| # |
| # HRPOLY1K defines the 1K high sheet rho poly resistor. |
| # |
| # Not all combinations of options are valid. Global Foundries defines the |
| # following combinations as valid (adjusting for the decision not to |
| # implement MIM OPT A): |
| # |
| # METALS2 + THICKMET3P0 |
| # |
| # METALS3 + MIM |
| # METALS3 + MIM + THICKMET0P9 |
| # METALS3 + MIM + THICKMET1P1 |
| # METALS3 + MIM + THICKMET3P0 |
| # |
| # METALS4 + MIM + THICKMET0P9 |
| # METALS4 + MIM + THICKMET1P1 |
| # METALS4 + MIM + THICKMET3P0 |
| # |
| # METALS5 + MIM + THICKMET0P9 |
| # METALS5 + MIM + THICKMET1P1 |
| # |
| # METALS6 + MIM + THICKMET0P9 |
| # |
| #------------------------------------------------------------------------------ |
| # |
| # The defined options per PDK in this file are: |
| # |
| # gf180mcuA = METALS3 | MIM | THICKMET3P0 | HRPOLY1K |
| # gf180mcuB = METALS4 | MIM | THICKMET1P1 | HRPOLY1K |
| # gf180mcuC = METALS5 | MIM | THICKMET0P9 | HRPOLY1K |
| # gf180mcuD = METALS5 | MIM | THICKMET1P1 | HRPOLY1K |
| # |
| # Written by Tim Edwards April 2022 |
| # Efabless, Inc. |
| # |
| #-------------------------------------------------------------------- |
| # This Makefile contains bash-isms |
| SHELL := /bin/bash |
| export SHELL |
| # We use pipes to save output to files, without pipefail they will always be |
| # seen by make as having succeeded. |
| SHELLOPTS := pipefail |
| export SHELLOPTS |
| MV = mv |
| PATCH = patch |
| SED = @SED@ |
| |
| prefix = @prefix@ |
| datarootdir = @datarootdir@ |
| datadir = @datadir@ |
| |
| # Path to open_pdks root directory (may need changing if it is a symbolic link) |
| SCRIPTSDIR ?= .. |
| |
| # Use git revision if this is a cloned repo; otherwise get the revision |
| # from the VERSION file in the directory above. |
| GITREV = $(shell git describe --long) |
| ifeq (${GITREV},) |
| REVISION = $(shell cat ${SCRIPTSDIR}/VERSION) |
| else |
| REVISION = ${GITREV} |
| endif |
| TECH = gf180mcu |
| |
| # The run-time environment uses PDKPATH to override the PDK location, |
| # so prevent that from happening during PDK install. This will also |
| # happen with PDK_ROOT, so avoid that as well. |
| unexport PDKPATH |
| unexport PDK_ROOT |
| |
| # If EF_STYLE is set to 1, then efabless naming conventions are |
| # used, otherwise the generic naming conventions are used. |
| # Mainly this has to do with where the technology LEF files are |
| # put (libs.tech/lef/ vs. libs.ref/techLEF). |
| |
| # EF_STYLE = 0 | 1 |
| EF_STYLE = @EF_STYLE@ |
| |
| # Normally it's fine to keep the staging path in a local directory, |
| # although /tmp or a dedicated staging area are also fine, as long |
| # as the install process can write to the path. |
| |
| STAGING_PATH = $(shell pwd) |
| |
| SHARED_PDKS_PATH ?= $(datadir)/pdk |
| |
| # If LINK_TARGETS is set to "none", then files are copied |
| # from the SkyWater sources to the target. If set to "source", |
| # symbolic links are made in the target directories pointing |
| # back to the SkyWater sources. If set to the name of another |
| # PDK (e.g, "sky130A"), then symbolic links are made to the |
| # same files in that PDK, where they exist, and are copied |
| # from source, where they don't. |
| # |
| # Behavior is to let the link targets for variant A follow the |
| # configuration option. Link targets for variant B will always |
| # be the files of variant A (which may end up being symbolic |
| # links to symbolic links if "source" was chosen for link-targets |
| # in the configuration). |
| |
| # LINK_TARGETS = source | none | gf180mcuA |
| LINK_TARGETS_A = @GF180MCU_LINK_TARGETS@ |
| LINK_TARGETS_B = gf180mcuA |
| LINK_TARGETS_C = gf180mcuA |
| LINK_TARGETS_D = gf180mcuA |
| |
| # ENABLED_VARIANTS = all | A | B | C | D |
| ENABLED_VARIANTS = @GF180MCU_ENABLED_VARIANTS@ |
| ifeq (${ENABLED_VARIANTS},) |
| VARIANTS += A B C D |
| else |
| ifeq (${ENABLED_VARIANTS}, all) |
| VARIANTS += A B C D |
| else |
| VARIANTS += ${ENABLED_VARIANTS} |
| endif |
| endif |
| |
| # Paths: |
| |
| # Path to GF180MCU open PDK sources. If this is specified, then all |
| # library repositories must be subdirectories of this path. |
| GF180MCU_PR_PATH = @GF180MCU_FD_PR_PATH@ |
| GF180MCU_PV_PATH = @GF180MCU_FD_PV_PATH@ |
| GF180MCU_IO_PATH = @GF180MCU_FD_IO_PATH@ |
| GF180MCU_SC_7T5V0_PATH = @GF180MCU_FD_SC_MCU7T5V0_PATH@ |
| GF180MCU_SC_9T5V0_PATH = @GF180MCU_FD_SC_MCU9T5V0_PATH@ |
| GF180MCU_SRAM_PATH = @GF180MCU_FD_IP_SRAM_PATH@ |
| GF180MCU_OSU_SC_PATH = @GF180MCU_OSU_SC_PATH@ |
| |
| USE_REFERENCE = @USE_REFERENCE@ |
| |
| ifeq (${USE_REFERENCE}, 1) |
| REFERENCE_JSON = ${TECH}.json |
| else |
| REFERENCE_JSON = |
| endif |
| |
| # Path to GF180MCU library sources |
| PDK_URL = https://github.com/google |
| OSU_URL = https://github.com/stineje |
| EF_URL = https://github.com/efabless |
| |
| # Names of library repositories |
| # NOTE: Switching PDK_LIB_PR and PDK_LIB_SC_7T5V0 to Efabless versions |
| # having "quick fixes" under development. |
| PDK_LIB_PR = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_pr |
| PDK_LIB_PV = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_pv |
| PDK_LIB_IO = ${PDK_URL}/globalfoundries-pdk-libs-gf180mcu_fd_io |
| PDK_LIB_SC_7T5V0 = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0 |
| PDK_LIB_SC_9T5V0 = ${EF_URL}/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0 |
| PDK_LIB_SRAM = ${PDK_URL}/globalfoundries-pdk-ip-gf180mcu_fd_ip_sram |
| PDK_LIB_OSU_SC = ${OSU_URL}/globalfoundries-pdk-libs-gf180mcu_osu_sc |
| |
| # NOTE: Install destination is the git repository of the technology platform. |
| # Once updated in git, the git project can be distributed to all hosts. |
| # |
| ifeq (${EF_STYLE}, 1) |
| CONFIG_DIR = .ef-config |
| REV_DIR = ${REVISION} |
| else |
| CONFIG_DIR = .config |
| REV_DIR = . |
| endif |
| |
| # Process nodes created from the master sources |
| GF180MCUA = gf180mcuA |
| GF180MCUB = gf180mcuB |
| GF180MCUC = gf180mcuC |
| GF180MCUD = gf180mcuD |
| |
| DIST_LINK_TARGETS_A = ${LINK_TARGETS_A} |
| DIST_LINK_TARGETS_B = ${SHARED_PDKS_PATH}/${LINK_TARGETS_B} |
| DIST_LINK_TARGETS_C = ${SHARED_PDKS_PATH}/${LINK_TARGETS_C} |
| DIST_LINK_TARGETS_D = ${SHARED_PDKS_PATH}/${LINK_TARGETS_D} |
| |
| # Basic definitions for each process node |
| GF180MCUA_DEFS = -DTECHNAME=gf180mcuA -DREVISION=${REVISION} |
| GF180MCUB_DEFS = -DTECHNAME=gf180mcuB -DREVISION=${REVISION} |
| GF180MCUC_DEFS = -DTECHNAME=gf180mcuC -DREVISION=${REVISION} |
| GF180MCUD_DEFS = -DTECHNAME=gf180mcuD -DREVISION=${REVISION} |
| |
| # Module definitions for each process node (see top) |
| GF180MCUA_DEFS += -DMETALS3 -DMIM -DTHICKMET3P0 -DHRPOLY1K |
| GF180MCUB_DEFS += -DMETALS4 -DMIM -DTHICKMET1P1 -DHRPOLY1K |
| GF180MCUC_DEFS += -DMETALS5 -DMIM -DTHICKMET0P9 -DHRPOLY1K |
| GF180MCUD_DEFS += -DMETALS5 -DMIM -DTHICKMET1P1 -DHRPOLY1K |
| |
| # Add staging path |
| GF180MCUA_DEFS += -DSTAGING_PATH=${STAGING_PATH} |
| GF180MCUB_DEFS += -DSTAGING_PATH=${STAGING_PATH} |
| GF180MCUC_DEFS += -DSTAGING_PATH=${STAGING_PATH} |
| GF180MCUD_DEFS += -DSTAGING_PATH=${STAGING_PATH} |
| |
| # Get the timestamp of the open_pdks commit to use for stamping layouts. |
| OPEN_PDKS_TIMESTAMP = $(shell git log -1 --format="%ad" --date=raw | cut -d' ' -f1) |
| TIMESTAMP_OPT = -timestamp ${OPEN_PDKS_TIMESTAMP} |
| |
| # Record commit numbers for the nodeinfo.json file |
| OPEN_PDKS_COMMIT = $(shell git rev-parse HEAD) |
| ifeq (${OPEN_PDKS_COMMIT},) |
| COMMIT_DEFS = -DOPEN_PDKS_COMMIT=${REVISION} |
| else |
| COMMIT_DEFS = -DOPEN_PDKS_COMMIT=${OPEN_PDKS_COMMIT} |
| endif |
| |
| ifeq (${GF180MCU_SC_9T5V0_PATH},) |
| COMMIT_DEFS += -DFD_SC_MCU9T5V0_COMMIT="unknown" |
| else |
| COMMIT_DEFS += -DFD_SC_MCU9T5V0_COMMIT=$(shell cd ${GF180MCU_SC_9T5V0_PATH} ; git rev-parse HEAD) |
| endif |
| ifeq (${GF180MCU_SC_7T5V0_PATH},) |
| COMMIT_DEFS += -DFD_SC_MCU7T5V0_COMMIT="unknown" |
| else |
| COMMIT_DEFS += -DFD_SC_MCU7T5V0_COMMIT=$(shell cd ${GF180MCU_SC_7T5V0_PATH} ; git rev-parse HEAD) |
| endif |
| ifeq (${GF180MCU_PR_PATH},) |
| COMMIT_DEFS += -DFD_PR_COMMIT="unknown" |
| else |
| COMMIT_DEFS += -DFD_PR_COMMIT=$(shell cd ${GF180MCU_PR_PATH} ; git rev-parse HEAD) |
| endif |
| ifeq (${GF180MCU_PV_PATH},) |
| COMMIT_DEFS += -DFD_PV_COMMIT="unknown" |
| else |
| COMMIT_DEFS += -DFD_PV_COMMIT=$(shell cd ${GF180MCU_PV_PATH} ; git rev-parse HEAD) |
| endif |
| ifeq (${GF180MCU_IO_PATH},) |
| COMMIT_DEFS += -DFD_IO_COMMIT="unknown" |
| else |
| COMMIT_DEFS += -DFD_IO_COMMIT=$(shell cd ${GF180MCU_IO_PATH} ; git rev-parse HEAD) |
| endif |
| ifeq (${GF180MCU_SRAM_PATH},) |
| COMMIT_DEFS += -DFD_IP_SRAM_COMMIT="unknown" |
| else |
| COMMIT_DEFS += -DFD_IP_SRAM_COMMIT=$(shell cd ${GF180MCU_SRAM_PATH} ; git rev-parse HEAD) |
| endif |
| ifeq (${GF180MCU_OSU_SC_PATH},) |
| COMMIT_DEFS += -DOSU_SC_COMMIT="unknown" |
| else |
| COMMIT_DEFS += -DOSU_SC_COMMIT=$(shell cd ${GF180MCU_OSU_SC_PATH} ; git rev-parse HEAD) |
| endif |
| |
| COMMIT_DEFS += -DMAGIC_COMMIT=$(shell magic -dnull -noconsole --commit) |
| COMMIT_DEFS += -DMAGIC_VERSION=$(shell magic -dnull -noconsole --version) |
| COMMIT_DEFS += -DOPEN_PDKS_VERSION=$(shell cat ${SCRIPTSDIR}/VERSION) |
| |
| ifeq (${EF_STYLE}, 1) |
| EF_FORMAT = -ef_format |
| GF180MCUA_DEFS += -DEF_FORMAT |
| GF180MCUB_DEFS += -DEF_FORMAT |
| GF180MCUC_DEFS += -DEF_FORMAT |
| GF180MCUD_DEFS += -DEF_FORMAT |
| else |
| EF_FORMAT = -std_format |
| endif |
| |
| MAGICTOP = libs.tech/magic |
| NETGENTOP = libs.tech/netgen |
| QFLOWTOP = libs.tech/qflow |
| IRSIMTOP = libs.tech/irsim |
| KLAYOUTTOP = libs.tech/klayout |
| OPENLANETOP = libs.tech/openlane |
| XSCHEMTOP = libs.tech/xschem |
| XCIRCUITTOP = libs.tech/xcircuit |
| NGSPICETOP = libs.tech/ngspice |
| |
| ifeq (${EF_STYLE}, 1) |
| MAGICPATH = ${MAGICTOP}/${REVISION} |
| MAGIC_CURRENT = ${MAGICTOP}/current |
| else |
| MAGICPATH = ${MAGICTOP} |
| MAGIC_CURRENT = ${MAGICTOP} |
| endif |
| |
| NETGENPATH = ${NETGENTOP} |
| IRSIMPATH = ${IRSIMTOP} |
| QFLOWPATH = ${QFLOWTOP} |
| KLAYOUTPATH = ${KLAYOUTTOP} |
| OPENLANEPATH = ${OPENLANETOP} |
| XSCHEMPATH = ${XSCHEMTOP} |
| XCIRCUITPATH = ${XCIRCUITTOP} |
| NGSPICEPATH = ${NGSPICETOP} |
| |
| MAGICTOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${MAGICTOP} |
| NETGENTOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${NETGENTOP} |
| IRSIMTOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${IRSIMTOP} |
| QFLOWTOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${QFLOWTOP} |
| KLAYOUTTOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${KLAYOUTTOP} |
| OPENLANETOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${OPENLANETOP} |
| XSCHEMTOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${XSCHEMTOP} |
| XCIRCUITTOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${XCIRCUITTOP} |
| NGSPICETOP_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${NGSPICETOP} |
| |
| MAGIC_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${MAGICPATH} |
| NETGEN_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${NETGENPATH} |
| IRSIM_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${IRSIMPATH} |
| QFLOW_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${QFLOWPATH} |
| KLAYOUT_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${KLAYOUTPATH} |
| OPENLANE_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${OPENLANEPATH} |
| XSCHEM_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${XSCHEMPATH} |
| XCIRCUIT_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${XCIRCUITPATH} |
| NGSPICE_STAGING_A = ${STAGING_PATH}/${GF180MCUA}/${NGSPICEPATH} |
| |
| MAGICTOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${MAGICTOP} |
| NETGENTOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${NETGENTOP} |
| IRSIMTOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${IRSIMTOP} |
| QFLOWTOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${QFLOWTOP} |
| KLAYOUTTOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${KLAYOUTTOP} |
| OPENLANETOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${OPENLANETOP} |
| XSCHEMTOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${XSCHEMTOP} |
| XCIRCUITTOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${XCIRCUITTOP} |
| NGSPICETOP_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${NGSPICETOP} |
| |
| MAGIC_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${MAGICPATH} |
| NETGEN_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${NETGENPATH} |
| IRSIM_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${IRSIMPATH} |
| QFLOW_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${QFLOWPATH} |
| KLAYOUT_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${KLAYOUTPATH} |
| OPENLANE_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${OPENLANEPATH} |
| XSCHEM_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${XSCHEMPATH} |
| XCIRCUIT_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${XCIRCUITPATH} |
| NGSPICE_STAGING_B = ${STAGING_PATH}/${GF180MCUB}/${NGSPICEPATH} |
| |
| MAGICTOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${MAGICTOP} |
| NETGENTOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${NETGENTOP} |
| IRSIMTOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${IRSIMTOP} |
| QFLOWTOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${QFLOWTOP} |
| KLAYOUTTOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${KLAYOUTTOP} |
| OPENLANETOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${OPENLANETOP} |
| XSCHEMTOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${XSCHEMTOP} |
| XCIRCUITTOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${XCIRCUITTOP} |
| NGSPICETOP_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${NGSPICETOP} |
| |
| MAGIC_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${MAGICPATH} |
| NETGEN_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${NETGENPATH} |
| IRSIM_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${IRSIMPATH} |
| QFLOW_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${QFLOWPATH} |
| KLAYOUT_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${KLAYOUTPATH} |
| OPENLANE_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${OPENLANEPATH} |
| XSCHEM_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${XSCHEMPATH} |
| XCIRCUIT_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${XCIRCUITPATH} |
| NGSPICE_STAGING_C = ${STAGING_PATH}/${GF180MCUC}/${NGSPICEPATH} |
| |
| MAGICTOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${MAGICTOP} |
| NETGENTOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${NETGENTOP} |
| IRSIMTOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${IRSIMTOP} |
| QFLOWTOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${QFLOWTOP} |
| KLAYOUTTOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${KLAYOUTTOP} |
| OPENLANETOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${OPENLANETOP} |
| XSCHEMTOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${XSCHEMTOP} |
| XCIRCUITTOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${XCIRCUITTOP} |
| NGSPICETOP_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${NGSPICETOP} |
| |
| MAGIC_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${MAGICPATH} |
| NETGEN_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${NETGENPATH} |
| IRSIM_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${IRSIMPATH} |
| QFLOW_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${QFLOWPATH} |
| KLAYOUT_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${KLAYOUTPATH} |
| OPENLANE_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${OPENLANEPATH} |
| XSCHEM_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${XSCHEMPATH} |
| XCIRCUIT_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${XCIRCUITPATH} |
| NGSPICE_STAGING_D = ${STAGING_PATH}/${GF180MCUD}/${NGSPICEPATH} |
| |
| GF180MCUA_DEFS += -DMAGIC_CURRENT=${MAGIC_CURRENT} |
| GF180MCUB_DEFS += -DMAGIC_CURRENT=${MAGIC_CURRENT} |
| GF180MCUC_DEFS += -DMAGIC_CURRENT=${MAGIC_CURRENT} |
| GF180MCUD_DEFS += -DMAGIC_CURRENT=${MAGIC_CURRENT} |
| |
| # These definitions are used by the build recipes |
| A_STACK = 3lm |
| B_STACK = 4lm |
| C_STACK = 5lm |
| D_STACK = 5lm |
| |
| # These definitions are used by the build recipes for the tech LEF |
| A_FULLSTACK = 3LM_1TM_30K |
| B_FULLSTACK = 4LM_1TM_11K |
| C_FULLSTACK = 5LM_1TM_9K |
| D_FULLSTACK = 5LM_1TM_11K |
| |
| # Openlane has a number of files that are common to all digital |
| # standard cell libraries, so these are collected in one definition |
| # here: |
| OPENLANE_COMMON = config.tcl tracks.info no_synth.cells drc_exclude.cells |
| |
| # Where cpp syntax is followed, this is equivalent to cpp, but it does not |
| # mangle non-C source files under the belief that they are actually C code. |
| CPP = ${SCRIPTSDIR}/common/preproc.py |
| |
| # The following script in the ${SCRIPTSDIR}/common directory does most of the work of |
| # copying or linking the foundry vendor files to the target directory. |
| STAGE = set -f ; ${SCRIPTSDIR}/common/foundry_install.py ${EF_FORMAT} ${TIMESTAMP_OPT} |
| ifneq ($(DESTDIR), ) |
| INSTALL = ${SCRIPTSDIR}/common/staging_install.py -writeto $(DESTDIR) ${EF_FORMAT} |
| else |
| INSTALL = ${SCRIPTSDIR}/common/staging_install.py ${EF_FORMAT} |
| endif |
| |
| # The script(s) below are used for custom changes to the vendor PDK files |
| PORTORDER = ../common/port_order.py ${EF_FORMAT} |
| ADDPROP = ../common/insert_property.py ${EF_FORMAT} |
| ADDLAYER = ../common/insert_layer.py ${EF_FORMAT} |
| REMOVELAB = ../common/remove_label.py ${EF_FORMAT} |
| |
| # List the EDA tools to install local setup files for |
| TOOLS = |
| |
| # KLAYOUT_DISABLED = 0 | 1 |
| KLAYOUT_DISABLED = @KLAYOUT_DISABLED@ |
| ifneq (${KLAYOUT_DISABLED}, 1) |
| TOOLS += klayout |
| endif |
| |
| # OPENLANE_DISABLED = 0 | 1 |
| OPENLANE_DISABLED = @OPENLANE_DISABLED@ |
| ifneq (${OPENLANE_DISABLED}, 1) |
| TOOLS += openlane |
| endif |
| |
| # QFLOW_DISABLED = 0 | 1 |
| QFLOW_DISABLED = @QFLOW_DISABLED@ |
| ifneq (${QFLOW_DISABLED}, 1) |
| TOOLS += qflow |
| endif |
| |
| # MAGIC_DISABLED = 0 | 1 |
| MAGIC_DISABLED = @MAGIC_DISABLED@ |
| ifneq (${MAGIC_DISABLED}, 1) |
| TOOLS += magic |
| endif |
| |
| # NETGEN_DISABLED = 0 | 1 |
| NETGEN_DISABLED = @NETGEN_DISABLED@ |
| ifneq (${NETGEN_DISABLED}, 1) |
| TOOLS += netgen |
| endif |
| |
| # IRSIM_DISABLED = 0 | 1 |
| IRSIM_DISABLED = @IRSIM_DISABLED@ |
| ifneq (${IRSIM_DISABLED}, 1) |
| TOOLS += irsim |
| endif |
| |
| # XSCHEM_DISABLED = 0 | 1 |
| XSCHEM_DISABLED = @XSCHEM_DISABLED@ |
| ifneq (${XSCHEM_DISABLED}, 1) |
| TOOLS += xschem |
| endif |
| |
| # XCIRCUIT_DISABLED = 0 | 1 |
| XCIRCUIT_DISABLED = @XCIRCUIT_DISABLED@ |
| ifneq (${XCIRCUIT_DISABLED}, 1) |
| TOOLS += xcircuit |
| endif |
| |
| # This definition depends on the setting of EF_STYLE |
| ifeq (${EF_STYLE}, 1) |
| IO_GDS = gds/gf180mcu_fd_io |
| else |
| IO_GDS = gf180mcu_fd_io/gds |
| endif |
| |
| all: $(foreach var, ${VARIANTS}, all-$(var)) |
| |
| reference: ${TECH}.json |
| # Rewrite the ${TECH}.json file to change the commit values in |
| # "reference" to reflect the state of the system when "make |
| # reference" was run. This is then committed to the open_pdks |
| # repository to create a known reference configuration of all |
| # tools. |
| ../common/save_commit_refs.py ${COMMIT_DEFS} ${TECH}.json |
| |
| # Handle prerequisites |
| prerequisites: pr-repo pv-repo io-repo sc-7t-repo sc-9t-repo sram-repo osu-sc-repo |
| |
| pr-repo: |
| if test "x${REFERENCE_JSON}" != "x"; then \ |
| FD_PR_COMMIT=`cat ${REFERENCE_JSON} | grep gf180mcu_fd_pr | grep -v COMMIT | cut -d'"' -f4` ; \ |
| fi ; \ |
| if test "x${GF180MCU_PR_PATH}" != "x" ; then \ |
| if test -d "${GF180MCU_PR_PATH}" ; then \ |
| echo "Using existing installation of primitive library from ${GF180MCU_PR_PATH}" ; \ |
| else \ |
| echo "Downloading primitive library from ${GF180MCU_PR_PATH}" ; \ |
| ../scripts/download.sh ${PDK_LIB_PR} ${GF180MCU_PR_PATH} $${FD_PR_COMMIT}; \ |
| fi ; \ |
| fi |
| |
| pv-repo: |
| if test "x${REFERENCE_JSON}" != "x"; then \ |
| FD_PV_COMMIT=`cat ${REFERENCE_JSON} | grep gf180mcu_fd_pv | grep -v COMMIT | cut -d'"' -f4` ; \ |
| fi ; \ |
| if test "x${GF180MCU_PV_PATH}" != "x" ; then \ |
| if test -d "${GF180MCU_PV_PATH}" ; then \ |
| echo "Using existing installation of verification library from ${GF180MCU_PV_PATH}" ; \ |
| else \ |
| echo "Downloading verification library from ${GF180MCU_PV_PATH}" ; \ |
| ../scripts/download.sh ${PDK_LIB_PV} ${GF180MCU_PV_PATH} $${FD_PV_COMMIT}; \ |
| fi ; \ |
| fi |
| |
| io-repo: |
| if test "x${REFERENCE_JSON}" != "x"; then \ |
| FD_IO_COMMIT=`cat ${REFERENCE_JSON} | grep gf180mcu_fd_io | grep -v COMMIT | cut -d'"' -f4` ; \ |
| fi ; \ |
| if test "x${GF180MCU_IO_PATH}" != "x" ; then \ |
| if test -d "${GF180MCU_IO_PATH}" ; then \ |
| echo "Using existing installation of I/O library from ${GF180MCU_IO_PATH}" ; \ |
| else \ |
| echo "Downloading I/O library from ${GF180MCU_IO_PATH}" ; \ |
| ../scripts/download.sh ${PDK_LIB_IO} ${GF180MCU_IO_PATH} $${FD_IO_COMMIT}; \ |
| fi ; \ |
| fi |
| |
| sc-7t-repo: |
| if test "x${REFERENCE_JSON}" != "x"; then \ |
| FD_SC_MCU7T5V0_COMMIT=`cat ${REFERENCE_JSON} | grep gf180mcu_fd_sc_mcu7t5v0 | grep -v COMMIT | cut -d'"' -f4` ; \ |
| fi ; \ |
| if test "x${GF180MCU_SC_7T5V0_PATH}" != "x" ; then \ |
| if test -d "${GF180MCU_SC_7T5V0_PATH}" ; then \ |
| echo "Using existing installation of 7-track standard cell library from ${GF180MCU_SC_7T5V0_PATH}" ; \ |
| else \ |
| echo "Downloading 7-track standard cell library from ${GF180MCU_SC_7T5V0_PATH}" ; \ |
| ../scripts/download.sh ${PDK_LIB_SC_7T5V0} ${GF180MCU_SC_7T5V0_PATH} $${FD_SC_MCU7T5V0_COMMIT}; \ |
| fi ; \ |
| fi |
| |
| sc-9t-repo: |
| if test "x${REFERENCE_JSON}" != "x"; then \ |
| FD_SC_MCU9T5V0_COMMIT=`cat ${REFERENCE_JSON} | grep gf180mcu_fd_sc_mcu9t5v0 | grep -v COMMIT | cut -d'"' -f4` ; \ |
| fi ; \ |
| if test "x${GF180MCU_SC_9T5V0_PATH}" != "x" ; then \ |
| if test -d "${GF180MCU_SC_9T5V0_PATH}" ; then \ |
| echo "Using existing installation of 9-track standard cell library from ${GF180MCU_SC_9T5V0_PATH}" ; \ |
| else \ |
| echo "Downloading 9-track standard cell library from ${GF180MCU_SC_9T5V0_PATH}" ; \ |
| ../scripts/download.sh ${PDK_LIB_SC_9T5V0} ${GF180MCU_SC_9T5V0_PATH} $${FD_SC_MCU9T5V0_COMMIT}; \ |
| fi ; \ |
| fi |
| |
| sram-repo: |
| if test "x${REFERENCE_JSON}" != "x"; then \ |
| FD_IP_SRAM_COMMIT=`cat ${REFERENCE_JSON} | grep gf180mcu_fd_ip_sram | grep -v COMMIT | cut -d'"' -f4` ; \ |
| fi ; \ |
| if test "x${GF180MCU_SRAM_PATH}" != "x" ; then \ |
| if test -d "${GF180MCU_SRAM_PATH}" ; then \ |
| echo "Using existing installation of primitive library from ${GF180MCU_SRAM_PATH}" ; \ |
| else \ |
| echo "Downloading primitive library from ${GF180MCU_SRAM_PATH}" ; \ |
| ../scripts/download.sh ${PDK_LIB_SRAM} ${GF180MCU_SRAM_PATH} $${FD_IP_SRAM_COMMIT}; \ |
| fi ; \ |
| fi |
| |
| osu-sc-repo: |
| if test "x${REFERENCE_JSON}" != "x"; then \ |
| OSU_SC_COMMIT=`cat ${REFERENCE_JSON} | grep gf180mcu_osu_sc_gf12t3v3 | grep -v COMMIT | cut -d'"' -f4` ; \ |
| fi ; \ |
| if test "x${GF180MCU_OSU_SC_PATH}" != "x" ; then \ |
| if test -d "${GF180MCU_OSU_SC_PATH}" ; then \ |
| echo "Using existing installation of OSU 3.3V standard cell library from ${GF180MCU_OSU_SC_PATH}" ; \ |
| else \ |
| echo "Downloading OSU 3.3V standard cell library from ${GF180MCU_OSU_SC_PATH}" ; \ |
| ../scripts/download.sh ${PDK_LIB_OSU_SC} ${GF180MCU_OSU_SC_PATH} $${OSU_SC_COMMIT} ; \ |
| fi ; \ |
| fi |
| |
| # Update prerequisites |
| update: update-pr-repo update-pv-repo update-io-repo update-sc-7t-repo update-sc-9t-repo update-sram-repo update-osu-sc-repo |
| |
| update-pr-repo: |
| if test "x${GF180MCU_PR_PATH}" != "x" ; then \ |
| echo "Updating GF180MCU primitive library from ${PDK_LIB_PR}" ; \ |
| ../scripts/update.sh ${GF180MCU_PR_PATH} ; \ |
| fi |
| |
| update-pv-repo: |
| if test "x${GF180MCU_PV_PATH}" != "x" ; then \ |
| echo "Updating GF180MCU verification library from ${PDK_LIB_PV}" ; \ |
| ../scripts/update.sh ${GF180MCU_PV_PATH} ; \ |
| fi |
| |
| update-io-repo: |
| if test "x${GF180MCU_IO_PATH}" != "x" ; then \ |
| echo "Updating GF180MCU I/O library from ${PDK_LIB_IO}" ; \ |
| ../scripts/update.sh ${GF180MCU_IO_PATH} ; \ |
| fi |
| |
| update-sc-7t-repo: |
| if test "x${GF180MCU_SC_7T5V0_PATH}" != "x" ; then \ |
| echo "Updating GF180MCU 7-track standard cell library from ${PDK_LIB_SC_7T5V0}" ; \ |
| ../scripts/update.sh ${GF180MCU_SC_7T5V0_PATH} ; \ |
| fi |
| |
| update-sc-9t-repo: |
| if test "x${GF180MCU_SC_9T5V0_PATH}" != "x" ; then \ |
| echo "Updating GF180MCU 9-track standard cell library from ${PDK_LIB_SC_9T5V0}" ; \ |
| ../scripts/update.sh ${GF180MCU_SC_9T5V0_PATH} ; \ |
| fi |
| |
| update-sram-repo: |
| if test "x${GF180MCU_SRAM_PATH}" != "x" ; then \ |
| echo "Updating GF180MCU SRAM macro library from ${PDK_LIB_SRAM}" ; \ |
| ../scripts/update.sh ${GF180MCU_SRAM_PATH} ; \ |
| fi |
| |
| update-osu-sc-repo: |
| if test "x${GF180MCU_OSU_SC_PATH}" != "x" ; then \ |
| echo "Updating GF180MCU OSU 3.3V standard cell library from ${PDK_LIB_OSU_SC}" ; \ |
| ../scripts/update.sh ${GF180MCU_OSU_SC_PATH} ; \ |
| fi |
| |
| all-%: prerequisites |
| echo "Starting gf180mcu$* PDK staging on "`date` > ${GF180MCU$*}_make.log |
| ${MAKE} general-$* |
| ${MAKE} tools-$* |
| ${MAKE} vendor-$* |
| echo "Ended gf180mcu$* PDK staging on "`date` >> ${GF180MCU$*}_make.log |
| |
| general-%: ${TECH}.json |
| mkdir -p ${STAGING_PATH}/${GF180MCU$*}/${CONFIG_DIR} |
| rm -f ${STAGING_PATH}/${GF180MCU$*}/${CONFIG_DIR}/nodeinfo.json |
| ${CPP} ${GF180MCU$*_DEFS} ${COMMIT_DEFS} ${TECH}.json \ |
| ${STAGING_PATH}/${GF180MCU$*}/${CONFIG_DIR}/nodeinfo.json |
| |
| tools-A: $(addsuffix -A, $(TOOLS)) |
| |
| tools-B: $(addsuffix -B, $(TOOLS)) |
| |
| tools-C: $(addsuffix -C, $(TOOLS)) |
| |
| tools-D: $(addsuffix -D, $(TOOLS)) |
| |
| magic-%: magic/${TECH}.tech magic/${TECH}gds.tech magic/${TECH}.magicrc magic/${TECH}.tcl |
| mkdir -p ${MAGICTOP_STAGING_$*} |
| mkdir -p ${MAGIC_STAGING_$*} |
| rm -f ${MAGICTOP_STAGING_$*}/current |
| rm -f ${MAGIC_STAGING_$*}/${GF180MCU$*}.tech |
| rm -f ${MAGIC_STAGING_$*}/${GF180MCU$*}-GDS.tech |
| rm -f ${MAGIC_STAGING_$*}/${GF180MCU$*}.tcl |
| rm -f ${MAGIC_STAGING_$*}/${GF180MCU$*}-BindKeys |
| rm -f ${MAGIC_STAGING_$*}/magicrc |
| if test "${EF_STYLE}" == "1" ; then \ |
| (cd ${MAGICTOP_STAGING_$*} ; ln -f -s ${REV_DIR} current) ; \ |
| fi |
| |
| ${CPP} ${GF180MCU$*_DEFS} magic/${TECH}.tech \ |
| ${MAGIC_STAGING_$*}/${GF180MCU$*}.tech |
| ${CPP} ${GF180MCU$*_DEFS} magic/${TECH}gds.tech \ |
| ${MAGIC_STAGING_$*}/${GF180MCU$*}-GDS.tech |
| ${CPP} ${GF180MCU$*_DEFS} magic/${TECH}.magicrc \ |
| ${MAGIC_STAGING_$*}/${GF180MCU$*}.magicrc |
| ${CPP} ${GF180MCU$*_DEFS} ${SCRIPTSDIR}/common/pdk.bindkeys \ |
| ${MAGIC_STAGING_$*}/${GF180MCU$*}-BindKeys |
| ${CPP} ${GF180MCU$*_DEFS} magic/${TECH}.tcl \ |
| ${MAGIC_STAGING_$*}/${GF180MCU$*}.tcl |
| ${CPP} ${GF180MCU$*_DEFS} ${SCRIPTSDIR}/common/pdk.tcl >> \ |
| ${MAGIC_STAGING_$*}/${GF180MCU$*}.tcl |
| |
| netgen-%: netgen/${TECH}_setup.tcl |
| mkdir -p ${NETGENTOP_STAGING_$*} |
| mkdir -p ${NETGEN_STAGING_$*} |
| rm -f ${NETGEN_STAGING_$*}/${GF180MCU$*}_setup.tcl |
| rm -f ${NETGEN_STAGING_$*}/setup.tcl |
| ${CPP} ${GF180MCU$*_DEFS} netgen/${TECH}_setup.tcl \ |
| ${NETGEN_STAGING_$*}/${GF180MCU$*}_setup.tcl |
| (cd ${NETGEN_STAGING_$*} ; ln -f -s ${GF180MCU$*}_setup.tcl setup.tcl) |
| |
| qflow-%: qflow/${TECH}.sh qflow/${TECH}.par |
| mkdir -p ${QFLOWTOP_STAGING_$*} |
| mkdir -p ${QFLOW_STAGING_$*} |
| rm -f ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0.sh |
| rm -f ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0.par |
| rm -f ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0.sh |
| rm -f ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0.par |
| ${CPP} ${GF180MCU$*_DEFS} -DLIBRARY=gf180mcu_fd_sc_mcu7t5v0 \ |
| qflow/${TECH}.sh ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0.sh |
| ${CPP} ${GF180MCU$*_DEFS} -DLIBRARY=gf180mcu_fd_sc_mcu9t5v0 \ |
| qflow/${TECH}.sh ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0.sh |
| ${CPP} ${GF180MCU$*_DEFS} qflow/${TECH}.par \ |
| ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0.par |
| ${CPP} ${GF180MCU$*_DEFS} qflow/${TECH}.par \ |
| ${QFLOW_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0.par |
| |
| irsim-%: |
| mkdir -p ${IRSIMTOP_STAGING_$*} |
| mkdir -p ${IRSIM_STAGING_$*} |
| |
| klayout-%: ${GF180MCU_PV_PATH} ${GF180MCU_PR_PATH} |
| mkdir -p ${KLAYOUTTOP_STAGING_$*} |
| mkdir -p ${KLAYOUT_STAGING_$*} |
| rm -rf ${KLAYOUT_STAGING_$*}/drc |
| rm -rf ${KLAYOUT_STAGING_$*}/lvs |
| rm -rf ${KLAYOUT_STAGING_$*}/tech |
| rm -rf ${KLAYOUT_STAGING_$*}/pymacros |
| mkdir ${KLAYOUT_STAGING_$*}/drc |
| mkdir ${KLAYOUT_STAGING_$*}/lvs |
| mkdir ${KLAYOUT_STAGING_$*}/tech |
| mkdir ${KLAYOUT_STAGING_$*}/pymacros |
| |
| cp -rp ${GF180MCU_PV_PATH}/klayout/drc/* \ |
| ${KLAYOUT_STAGING_$*}/drc |
| cp -rp ${GF180MCU_PV_PATH}/klayout/lvs/* \ |
| ${KLAYOUT_STAGING_$*}/lvs |
| cp -rp ${GF180MCU_PR_PATH}/cells/klayout/pymacros/cells/* \ |
| ${KLAYOUT_STAGING_$*}/pymacros |
| cp -rp ${GF180MCU_PR_PATH}/tech/klayout/* \ |
| ${KLAYOUT_STAGING_$*}/tech |
| cp -rp ${GF180MCU_PR_PATH}/cells/klayout/pymacros/*.lym \ |
| ${KLAYOUT_STAGING_$*}/tech |
| |
| xcircuit-%: |
| rm -rf ${XCIRCUIT_STAGING_$*} |
| mkdir -p ${XCIRCUITTOP_STAGING_$*} |
| mkdir -p ${XCIRCUIT_STAGING_$*} |
| |
| xschem-%: ${GF180MCU_PR_PATH} |
| rm -rf ${XSCHEM_STAGING_$*} |
| mkdir -p ${XSCHEMTOP_STAGING_$*} |
| mkdir -p ${XSCHEM_STAGING_$*} |
| cp -rp ${GF180MCU_PR_PATH}/cells/xschem/symbols ${XSCHEM_STAGING_$*} |
| cp -rp ${GF180MCU_PR_PATH}/cells/xschem/tests ${XSCHEM_STAGING_$*} |
| cp -rp ${GF180MCU_PR_PATH}/cells/xschem/xschemrc ${XSCHEM_STAGING_$*} |
| cat ./custom/xschem/xschemrc_append >> ${XSCHEM_STAGING_$*}/xschemrc |
| |
| openlane-%: openlane/config.tcl openlane/gf180mcu_fd_sc_mcu7t5v0/config.tcl openlane/gf180mcu_fd_sc_mcu9t5v0/config.tcl |
| mkdir -p ${OPENLANETOP_STAGING_$*} |
| mkdir -p ${OPENLANE_STAGING_$*} |
| rm -rf ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0 |
| rm -rf ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0 |
| mkdir ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0 |
| mkdir ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0 |
| for file in ${OPENLANE_COMMON} ; do \ |
| rm -f ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0/$$file ; \ |
| done |
| for file in ${OPENLANE_COMMON} ; do \ |
| rm -f ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0/$$file ; \ |
| done |
| ${CPP} ${GF180MCU$*_DEFS} openlane/config.tcl ${OPENLANE_STAGING_$*}/config.tcl |
| |
| for file in ${OPENLANE_COMMON} ; do \ |
| ${CPP} -quiet ${GF180MCU$*_DEFS} openlane/gf180mcu_fd_sc_mcu7t5v0/$$file \ |
| ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu7t5v0/$$file ; \ |
| done |
| for file in ${OPENLANE_COMMON} ; do \ |
| ${CPP} -quiet ${GF180MCU$*_DEFS} openlane/gf180mcu_fd_sc_mcu9t5v0/$$file \ |
| ${OPENLANE_STAGING_$*}/gf180mcu_fd_sc_mcu9t5v0/$$file ; \ |
| done |
| |
| rm -f ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.min.* |
| rm -f ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.nom.* |
| rm -f ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.max.* |
| |
| if test -f openlane/rules.openrcx.gf180mcu$*.min.magic ; then \ |
| ${CPP} ${GF180MCU$*_DEFS} openlane/rules.openrcx.gf180mcu$*.min.magic \ |
| ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.min.magic ;\ |
| fi |
| if test -f openlane/rules.openrcx.gf180mcu$*.nom.magic ; then \ |
| ${CPP} ${GF180MCU$*_DEFS} openlane/rules.openrcx.gf180mcu$*.nom.magic \ |
| ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.nom.magic ;\ |
| fi |
| if test -f openlane/rules.openrcx.gf180mcu$*.max.magic ; then \ |
| ${CPP} ${GF180MCU$*_DEFS} openlane/rules.openrcx.gf180mcu$*.max.magic \ |
| ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.max.magic ;\ |
| fi |
| if test -f openlane/rules.openrcx.gf180mcu$*.min ; then \ |
| ${CPP} ${GF180MCU$*_DEFS} openlane/rules.openrcx.gf180mcu$*.min \ |
| ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.min ;\ |
| fi |
| if test -f openlane/rules.openrcx.gf180mcu$*.nom ; then \ |
| ${CPP} ${GF180MCU$*_DEFS} openlane/rules.openrcx.gf180mcu$*.nom \ |
| ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.nom ;\ |
| fi |
| if test -f openlane/rules.openrcx.gf180mcu$*.max ; then \ |
| ${CPP} ${GF180MCU$*_DEFS} openlane/rules.openrcx.gf180mcu$*.max \ |
| ${OPENLANE_STAGING_$*}/rules.openrcx.gf180mcu$*.max ;\ |
| fi |
| |
| vendor-A: primitive-build-A digital-7t5v0-build-A digital-9t5v0-build-A io-build-A sram-build-A digital-osu-build-A |
| |
| vendor-B: primitive-build-B digital-7t5v0-build-B digital-9t5v0-build-B io-build-B sram-build-B digital-osu-build-B |
| |
| vendor-C: primitive-build-C digital-7t5v0-build-C digital-9t5v0-build-C io-build-C sram-build-C digital-osu-build-C |
| |
| vendor-D: primitive-build-D digital-7t5v0-build-D digital-9t5v0-build-D io-build-D sram-build-D digital-osu-build-D |
| |
| primitive-build-%: |
| if test "x${GF180MCU_PR_PATH}" != "x" ; then \ |
| if test -d ${GF180MCU_PR_PATH} ; then \ |
| echo "Building primitives library and simulation models" ;\ |
| make primitive-$* ;\ |
| fi ;\ |
| fi |
| |
| io-build-%: |
| if test "x${GF180MCU_IO_PATH}" != "x" ; then \ |
| if test -d ${GF180MCU_IO_PATH} ; then \ |
| echo "Building padframe I/O libraries" ;\ |
| make io-$* ;\ |
| fi ;\ |
| fi |
| |
| digital-9t5v0-build-%: |
| if test "x${GF180MCU_SC_9T5V0_PATH}" != "x" ; then \ |
| if test -d ${GF180MCU_SC_9T5V0_PATH} ; then \ |
| echo "Building 5V 9-track digital standard cell libraries" ;\ |
| make digital-9t5v0-$* ;\ |
| fi ;\ |
| fi |
| |
| digital-7t5v0-build-%: |
| if test "x${GF180MCU_SC_7T5V0_PATH}" != "x" ; then \ |
| if test -d ${GF180MCU_SC_7T5V0_PATH} ; then \ |
| echo "Building 5V 7-track digital standard cell libraries" ;\ |
| make digital-7t5v0-$* ;\ |
| fi ;\ |
| fi |
| |
| sram-build-%: |
| if test "x${GF180MCU_SRAM_PATH}" != "x" ; then \ |
| if test -d ${GF180MCU_SRAM_PATH} ; then \ |
| echo "Building SRAM libraries" ;\ |
| make sram-$* ;\ |
| fi ;\ |
| fi |
| |
| digital-osu-build-%: |
| if test "x${GF180MCU_OSU_SC_PATH}" != "x" ; then \ |
| if test -d ${GF180MCU_OSU_SC_PATH} ; then \ |
| echo "Building OSU 3.3V digital standard cell libraries" ;\ |
| make digital-osu-$* ;\ |
| fi ;\ |
| fi |
| |
| primitive-%: |
| # Install tech LEF and primitive devices from vendor files |
| ${STAGE} -source ${GF180MCU_PR_PATH} \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -ngspice models/ngspice/*.ngspice \ |
| -xyce models/xyce/*.xyce \ |
| 2>&1 | tee -a ${GF180MCU$*}_make.log |
| # Install primitive device fixed layout cells from GDS |
| ${STAGE} -source ${GF180MCU_PR_PATH} \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -gds cells/klayout/pymacros/cells/*/*.gds noextract \ |
| -library primitive gf180mcu_fd_pr \ |
| 2>&1 | tee -a ${GF180MCU$*}_make.log |
| # The klayout GUI prefers that drc/ and lvs/ exist under tech/, |
| # so make symbolic links. |
| (cd ${STAGING_PATH}/${GF180MCU$*}/libs.tech/klayout/tech ; \ |
| ln -f -s ../lvs ; ln -f -s ../drc) |
| # Add "device primitive" property to the bipolar devices and |
| # order the ports correctly to match the subcircuit model. This |
| # ensures that the bipolar layouts extract correctly. |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x02p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x02p00 I1_default_C I1_default_B I1_default_E I1_default_S |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x04p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x04p00 I1_default_C I1_default_B I1_default_E I1_default_S |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x08p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x08p00 I1_default_C I1_default_B I1_default_E I1_default_S |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x16p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x16p00 I1_default_C I1_default_B I1_default_E I1_default_S |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_05p00x05p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_05p00x05p00 I1_default_C I1_default_B I1_default_E I1_default_S |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_10p00x10p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_10p00x10p00 I1_default_C I1_default_B I1_default_E I1_default_S |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_05p00x00p42 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_05p00x00p42 I1_default_C I1_default_B I1_default_E |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_05p00x05p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_05p00x05p00 I1_default_C I1_default_B I1_default_E |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_10p00x10p00 "device primitive" |
| ${PORTORDER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_10p00x10p00 I1_default_C I1_default_B I1_default_E |
| # Cells which have a different cell name than the device name |
| # should replace the "gencell" property with the device name. |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| efuse_cell "gencell efuse" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x02p00_0 "gencell npn_00p54x02p00" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x04p00_0 "gencell npn_00p54x04p00" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x08p00_0 "gencell npn_00p54x08p00" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_00p54x16p00_0 "gencell npn_00p54x16p00" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_05p00x05p00_0 "gencell npn_05p00x05p00" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| npn_10p00x10p00_0 "gencell npn_10p00x10p00" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_05p00x00p42_0 "gencell pnp_05p00x00p42" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_05p00x05p00_0 "gencell pnp_05p00x05p00" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_10p00x00p42_0 "gencell pnp_10p00x00p42" |
| ${ADDPROP} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_pr \ |
| pnp_10p00x10p00_0 "gencell pnp_10p00x10p00" |
| |
| digital-9t5v0-%: |
| # Install 5V 9-track digital standard cells from vendor files |
| ${STAGE} -source ${GF180MCU_SC_9T5V0_PATH} \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -techlef tech/gf180mcu_${$*_FULLSTACK}_9t_tech.lef \ |
| filter=custom/scripts/fix_techlef.py \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__nom.tlef \ |
| -cdl cells/*/*.cdl compile-only noconvert \ |
| -liberty cells/*/*_ff_125C_1v98.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ff_125C_1v98.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ff_125C_1v98 \ |
| -liberty cells/*/*_ff_n40C_1v98.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_1v98.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ff_n40C_1v98 \ |
| -liberty cells/*/*_ff_125C_3v60.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ff_125C_3v60.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ff_125C_3v60 \ |
| -liberty cells/*/*_ff_n40C_3v60.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_3v60.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ff_n40C_3v60 \ |
| -liberty cells/*/*_ff_125C_5v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ff_125C_5v50.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ff_125C_5v50 \ |
| -liberty cells/*/*_ff_n40C_5v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50 \ |
| -liberty cells/*/*_ss_125C_1v62.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ss_125C_1v62.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ss_125C_1v62 \ |
| -liberty cells/*/*_ss_n40C_1v62.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ss_n40C_1v62.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ss_n40C_1v62 \ |
| -liberty cells/*/*_ss_125C_3v00.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ss_125C_3v00.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ss_125C_3v00 \ |
| -liberty cells/*/*_ss_n40C_3v00.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ss_n40C_3v00.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ss_n40C_3v00 \ |
| -liberty cells/*/*_ss_125C_4v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ss_125C_4v50.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ss_125C_4v50 \ |
| -liberty cells/*/*_ss_n40C_4v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__ss_n40C_4v50.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__ss_n40C_4v50 \ |
| -liberty cells/*/*_tt_025C_1v80.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__tt_025C_1v80.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__tt_025C_1v80 \ |
| -liberty cells/*/*_tt_025C_3v30.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__tt_025C_3v30.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__tt_025C_3v30 \ |
| -liberty cells/*/*_tt_025C_5v00.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu9t5v0__tt_025C_5v00.lib \ |
| rename=gf180mcu_fd_sc_mcu9t5v0__tt_025C_5v00 \ |
| -spice cells/*/*.cdl compile-only \ |
| filter=custom/scripts/convert_sc_cdl.py \ |
| -gds cells/*/*.gds compile-only \ |
| options=custom/scripts/gds_import_sc.tcl \ |
| filter=custom/scripts/fix_stdcell_gds.py \ |
| -lef cells/*/*.lef annotate compile-only \ |
| filter=custom/scripts/fix_digital_lef.py \ |
| -verilog models/*/*.v compile-only rename=primitives \ |
| -verilog cells/*/*.v exclude=*.*.v,primitives.v \ |
| compile-only filter=custom/scripts/inc_verilog.py \ |
| -library digital gf180mcu_fd_sc_mcu9t5v0 2>&1 | \ |
| tee -a ${GF180MCU$*}_make.log |
| # Create minimum/maximum technology LEF files |
| ./custom/scripts/make_minmax_techlef.py ${EF_FORMAT} -variant=${GF180MCU$*} \ |
| -library=9t5v0 2>&1 | tee -a ${GF180MCU$*}_make.log || true |
| |
| digital-7t5v0-%: |
| # Install 5V 7-track digital standard cells from vendor files |
| ${STAGE} -source ${GF180MCU_SC_7T5V0_PATH} \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -techlef tech/gf180mcu_${$*_FULLSTACK}_7t_tech.lef \ |
| filter=custom/scripts/fix_techlef.py \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__nom.tlef \ |
| -cdl cells/*/*.cdl compile-only noconvert \ |
| -liberty cells/*/*_ff_125C_1v98.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ff_125C_1v98.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ff_125C_1v98 \ |
| -liberty cells/*/*_ff_n40C_1v98.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_1v98.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ff_n40C_1v98 \ |
| -liberty cells/*/*_ff_125C_3v60.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ff_125C_3v60.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ff_125C_3v60 \ |
| -liberty cells/*/*_ff_n40C_3v60.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_3v60.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ff_n40C_3v60 \ |
| -liberty cells/*/*_ff_125C_5v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ff_125C_5v50.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ff_125C_5v50 \ |
| -liberty cells/*/*_ff_n40C_5v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_5v50.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ff_n40C_5v50 \ |
| -liberty cells/*/*_ss_125C_1v62.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ss_125C_1v62.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ss_125C_1v62 \ |
| -liberty cells/*/*_ss_n40C_1v62.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ss_n40C_1v62.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ss_n40C_1v62 \ |
| -liberty cells/*/*_ss_125C_3v00.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ss_125C_3v00.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ss_125C_3v00 \ |
| -liberty cells/*/*_ss_n40C_3v00.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ss_n40C_3v00.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ss_n40C_3v00 \ |
| -liberty cells/*/*_ss_125C_4v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ss_125C_4v50.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ss_125C_4v50 \ |
| -liberty cells/*/*_ss_n40C_4v50.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__ss_n40C_4v50.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__ss_n40C_4v50 \ |
| -liberty cells/*/*_tt_025C_1v80.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_1v80.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__tt_025C_1v80 \ |
| -liberty cells/*/*_tt_025C_3v30.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_3v30.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__tt_025C_3v30 \ |
| -liberty cells/*/*_tt_025C_5v00.lib compile-only \ |
| filter=custom/scripts/fix_related_bias_pins.py \ |
| header=liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00 \ |
| -spice cells/*/*.cdl compile-only \ |
| filter=custom/scripts/convert_sc_cdl.py \ |
| -gds cells/*/*.gds compile-only \ |
| options=custom/scripts/gds_import_sc.tcl \ |
| filter=custom/scripts/fix_stdcell_gds.py \ |
| -lef cells/*/*.lef annotate compile-only \ |
| filter=custom/scripts/fix_digital_lef.py \ |
| -verilog models/*/*.v compile-only rename=primitives \ |
| -verilog cells/*/*.v exclude=*.*.v,primitives.v \ |
| compile-only filter=custom/scripts/inc_verilog.py \ |
| -library digital gf180mcu_fd_sc_mcu7t5v0 2>&1 | \ |
| tee -a ${GF180MCU$*}_make.log |
| # Create minimum/maximum technology LEF files |
| ./custom/scripts/make_minmax_techlef.py ${EF_FORMAT} -variant=${GF180MCU$*} \ |
| -library=7t5v0 2>&1 | tee -a ${GF180MCU$*}_make.log || true |
| |
| digital-osu-%: |
| # Install OSU 3.3V digital standard cells from vendor files |
| # NOTE: Work in progress (to be completed) |
| ${STAGE} -source ${GF180MCU_OSU_SC_PATH}/gf180mcu_osu_sc_gp9t3v3 \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -techlef ../tlef/gf180mcu_5LM_1TM_9K_9t.tlef \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__nom.tlef \ |
| -liberty lib/gf180mcu_osu_sc_gp9t3v3_TT_3P3_25C.ccs.lib \ |
| rename=gf180mcu_osu_sc_gp9t3v3__tt_025C_3v30 \ |
| -verilog cells/*/*.v compile-only \ |
| -lef cells/*/*.lef compile-only \ |
| -gds cells/*/*.gds compile-only \ |
| -spice cells/*/*.spice compile-only \ |
| -xschem cells/*/*.sch \ |
| -library digital gf180mcu_osu_sc_gp9t3v3 2>&1 | \ |
| tee -a ${GF180MCU$*}_make.log |
| |
| ${STAGE} -source ${GF180MCU_OSU_SC_PATH}/gf180mcu_osu_sc_gp12t3v3 \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -techlef ../tlef/gf180mcu_5LM_1TM_9K_12t.tlef \ |
| rename=gf180mcu_fd_sc_mcu7t5v0__nom.tlef \ |
| -liberty lib/gf180mcu_osu_sc_gp12t3v3_TT_25C.ccs.lib \ |
| rename=gf180mcu_osu_sc_gp12t3v3__tt_025C_3v30 \ |
| -verilog cells/*/*.v compile-only \ |
| -lef cells/*/*.lef compile-only \ |
| -gds cells/*/*.gds compile-only \ |
| -spice cells/*/*.spice compile-only \ |
| -xschem cells/*/*.sch \ |
| -library digital gf180mcu_osu_sc_gp12t3v3 2>&1 | \ |
| tee -a ${GF180MCU$*}_make.log |
| |
| io-%: |
| # Install I/O cells from vendor files |
| # Note: Do not use GF LEF views. Annotate only. LEF is being renamed |
| # back to the original, although eventually all files will be changed |
| # to canonical names. |
| |
| ${STAGE} -source ${GF180MCU_IO_PATH} \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -cdl cells/*/*.cdl compile-only noconvert \ |
| -liberty cells/*/*_ff_125C_2v75.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ff_125C_2v75.lib \ |
| rename=gf180mcu_fd_io__ff_125C_2v75 \ |
| -liberty cells/*/*_ff_n40C_2v75.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ff_n40C_2v75.lib \ |
| rename=gf180mcu_fd_io__ff_n40C_2v75 \ |
| -liberty cells/*/*_ff_125C_3v63.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ff_125C_3v63.lib \ |
| rename=gf180mcu_fd_io__ff_125C_3v63 \ |
| -liberty cells/*/*_ff_n40C_3v63.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ff_n40C_3v63.lib \ |
| rename=gf180mcu_fd_io__ff_n40C_3v63 \ |
| -liberty cells/*/*_ff_125C_5v50.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ff_125C_5v50.lib \ |
| rename=gf180mcu_fd_io__ff_125C_5v50 \ |
| -liberty cells/*/*_ff_n40C_5v50.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ff_n40C_5v50.lib \ |
| rename=gf180mcu_fd_io__ff_n40C_5v50 \ |
| -liberty cells/*/*_ss_125C_2v25.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ss_125C_2v25.lib \ |
| rename=gf180mcu_fd_io__ss_125C_2v25 \ |
| -liberty cells/*/*_ss_125C_2v97.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ss_125C_2v97.lib \ |
| rename=gf180mcu_fd_io__ss_125C_2v97 \ |
| -liberty cells/*/*_ss_125C_4v50.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__ss_125C_4v50.lib \ |
| rename=gf180mcu_fd_io__ss_125C_4v50 \ |
| -liberty cells/*/*_tt_025C_2v50.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__tt_025C_2v50.lib \ |
| rename=gf180mcu_fd_io__tt_025C_2v50 \ |
| -liberty cells/*/*_tt_025C_3v30.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__tt_025C_3v30.lib \ |
| rename=gf180mcu_fd_io__tt_025C_3v30 \ |
| -liberty cells/*/*_tt_025C_5v00.lib compile-only \ |
| header=liberty/gf180mcu_fd_io__tt_025C_5v00.lib \ |
| rename=gf180mcu_fd_io__tt_025C_5v00 \ |
| -spice cells/*/*.cdl compile-only \ |
| filter=custom/scripts/convert_io_cdl.py \ |
| -gds cells/*/*_${$*_STACK}.gds compile-only \ |
| options=custom/scripts/gds_import_io.tcl \ |
| -lef cells/*/*_${$*_STACK}.lef \ |
| annotate lefopts=-hide compile-only \ |
| filter=custom/scripts/fix_io_lef.py \ |
| -verilog cells/*/*.v compile-only \ |
| -library general gf180mcu_fd_io 2>&1 | tee -a ${GF180MCU$*}_make.log |
| # Quick solution to extraction issue---add the isolated substrate layer |
| # in the corner clamp cell that contains the devices being isolated. |
| ${ADDLAYER} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_io ESD_CLAMP_COR \ |
| isosubstrate "-42 43458 56113 57130 40932 43016 57057 55812" -mag |
| # Permanent solution to the extraction issue---modify the GDS with the |
| # isolated substrate layer. |
| ./custom/scripts/fix_io_cor_gds.py \ |
| ${STAGING_PATH}/${GF180MCU$*}/libs.ref/${IO_GDS}/gf180mcu_fd_io.gds |
| |
| sram-%: |
| # Install SRAM macros from vendor files |
| ${STAGE} -source ${GF180MCU_SRAM_PATH} \ |
| -target ${STAGING_PATH}/${GF180MCU$*} \ |
| -cdl cells/*/*.cdl noconvert \ |
| -liberty cells/*/*.lib \ |
| -spice cells/*/*.cdl \ |
| filter=custom/scripts/convert_sram_cdl.py \ |
| rename=*.spice \ |
| -gds cells/*/*.gds \ |
| options=custom/scripts/gds_import_sram.tcl \ |
| filter=custom/scripts/fix_sram_gds.py \ |
| -lef cells/*/*.lef \ |
| -verilog cells/*/*.v \ |
| -library general gf180mcu_fd_ip_sram 2>&1 | tee -a ${GF180MCU$*}_make.log |
| # Remove "BL" labels from the rarray4_* cells, otherwise extraction |
| # of the SRAMs without using "extract unique" will fail. |
| ${REMOVELAB} ${STAGING_PATH}/${GF180MCU$*} gf180mcu_fd_ip_sram \ |
| rarray4_\* BL\* -mag |
| |
| install: $(foreach var, ${VARIANTS}, install-$(var)) |
| |
| install-A: |
| echo "Starting GF180MCU PDK migration on "`date` > ${GF180MCUA}_install.log |
| ${INSTALL} \ |
| -source ${STAGING_PATH}/${GF180MCUA} \ |
| -finalpath ${SHARED_PDKS_PATH}/${GF180MCUA} \ |
| -variable PDKPATH \ |
| -link_from ${DIST_LINK_TARGETS_A} 2>&1 | tee -a ${GF180MCUA}_install.log |
| echo "Ended GF180MCU PDK migration on "`date` >> ${GF180MCUA}_install.log |
| |
| install-B: install-A |
| echo "Starting GF180MCU PDK migration on "`date` > ${GF180MCUB}_install.log |
| ${INSTALL} \ |
| -source ${STAGING_PATH}/${GF180MCUB} \ |
| -finalpath ${SHARED_PDKS_PATH}/${GF180MCUB} \ |
| -variable PDKPATH \ |
| -link_from ${DIST_LINK_TARGETS_B} 2>&1 | tee -a ${GF180MCUB}_install.log |
| echo "Ended GF180MCU PDK migration on "`date` >> ${GF180MCUB}_install.log |
| |
| install-C: install-A |
| echo "Starting GF180MCU PDK migration on "`date` > ${GF180MCUC}_install.log |
| ${INSTALL} \ |
| -source ${STAGING_PATH}/${GF180MCUC} \ |
| -finalpath ${SHARED_PDKS_PATH}/${GF180MCUC} \ |
| -variable PDKPATH \ |
| -link_from ${DIST_LINK_TARGETS_C} 2>&1 | tee -a ${GF180MCUC}_install.log |
| echo "Ended GF180MCU PDK migration on "`date` >> ${GF180MCUC}_install.log |
| |
| install-D: install-A |
| echo "Starting GF180MCU PDK migration on "`date` > ${GF180MCUD}_install.log |
| ${INSTALL} \ |
| -source ${STAGING_PATH}/${GF180MCUD} \ |
| -finalpath ${SHARED_PDKS_PATH}/${GF180MCUD} \ |
| -variable PDKPATH \ |
| -link_from ${DIST_LINK_TARGETS_C} 2>&1 | tee -a ${GF180MCUD}_install.log |
| echo "Ended GF180MCU PDK migration on "`date` >> ${GF180MCUD}_install.log |
| |
| uninstall: $(foreach var, ${VARIANTS}, uninstall-$(var)) |
| |
| uninstall-A: |
| echo "Uninstalling GF180MCU PDK from ${SHARED_PDKS_PATH}" |
| if test "x${SHARED_PDKS_PATH}" != "x" ; then \ |
| ${RM} -rf ${SHARED_PDKS_PATH}/${GF180MCUA} ; \ |
| fi |
| echo "Finished GF180MCU PDK uninstall" |
| |
| uninstall-B: |
| echo "Uninstalling GF180MCU PDK from ${SHARED_PDKS_PATH}" |
| if test "x${SHARED_PDKS_PATH}" != "x" ; then \ |
| ${RM} -rf ${SHARED_PDKS_PATH}/${GF180MCUB} ; \ |
| fi |
| echo "Finished GF180MCU PDK uninstall" |
| |
| uninstall-C: |
| echo "Uninstalling GF180MCU PDK from ${SHARED_PDKS_PATH}" |
| if test "x${SHARED_PDKS_PATH}" != "x" ; then \ |
| ${RM} -rf ${SHARED_PDKS_PATH}/${GF180MCUC} ; \ |
| fi |
| echo "Finished GF180MCU PDK uninstall" |
| |
| uninstall-D: |
| echo "Uninstalling GF180MCU PDK from ${SHARED_PDKS_PATH}" |
| if test "x${SHARED_PDKS_PATH}" != "x" ; then \ |
| ${RM} -rf ${SHARED_PDKS_PATH}/${GF180MCUD} ; \ |
| fi |
| echo "Finished GF180MCU PDK uninstall" |
| |
| clean: $(foreach var, ${VARIANTS}, clean-$(var)) |
| |
| clean-A: |
| ${STAGE} -target ${STAGING_PATH}/${GF180MCUA} -clean |
| |
| clean-B: |
| ${STAGE} -target ${STAGING_PATH}/${GF180MCUB} -clean |
| |
| clean-C: |
| ${STAGE} -target ${STAGING_PATH}/${GF180MCUC} -clean |
| |
| clean-D: |
| ${STAGE} -target ${STAGING_PATH}/${GF180MCUD} -clean |
| |
| veryclean: $(foreach var, ${VARIANTS}, veryclean-$(var)) |
| |
| veryclean-A: clean-A |
| ${RM} ${GF180MCUA}_make.log |
| ${RM} ${GF180MCUA}_install.log |
| |
| veryclean-B: clean-B |
| ${RM} ${GF180MCUB}_make.log |
| ${RM} ${GF180MCUB}_install.log |
| |
| veryclean-C: clean-C |
| ${RM} ${GF180MCUC}_make.log |
| ${RM} ${GF180MCUC}_install.log |
| |
| veryclean-D: clean-D |
| ${RM} ${GF180MCUD}_make.log |
| ${RM} ${GF180MCUD}_install.log |
| |
| |
