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foss-eda-tools
/
third_party
/
freepdk45
/
954b16e2fcd52994e9d3c8b5af35b5f91d261889
/
.
/
Low_Power
/
Back_End
/
virtuoso
/
LowPowerOpenCellLibrary
/
HEADER_X4
/
functional
/
verilog.v
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// Created by ihdl
module
HEADER_X4
(
SLEEP
);
input SLEEP
;
endmodule
