Sign in
foss-eda-tools
/
third_party
/
freepdk45
/
954b16e2fcd52994e9d3c8b5af35b5f91d261889
/
.
/
Low_Power
/
Back_End
/
virtuoso
/
LowPowerOpenCellLibrary
/
HEADER_X1
/
functional
/
verilog.v
blob: 05119903b7898f69853b83144a4455169d2f2ef2 [
file
] [
log
] [
blame
]
// Created by ihdl
module
HEADER_X1
(
SLEEP
);
input SLEEP
;
endmodule
