s130/V2.1.1/DIG/scs130hvl/V0.0.0/verilog/scs130hvl_dfrtp_1.v

// Automatically modified by replacePGwithIfDef.pl
// iptguser	Fri Aug 12 15:57:32 EDT 2011

// Automatically edited by removePhraseFromMultipleFiles.pl
// iptguser	Fri Aug 12 15:57:12 EDT 2011
// `suppress_faults;`enable_portfaults\n
// `ifdef TETRAMAX;`endif\n
// `ifdef functional;`endif\n
// `ifndef dont;`endif\n
// `else;`delay_mode_path\n
// `endif;\n
// `disable_portfaults;`nosuppress_faults\n

`celldefine
`timescale 1ns / 1ps



module scs130hvl_dfrtp_1  (
output Q,

input CLK,
input D,
input RESETB

`ifdef SC_USE_PG_PIN
,
input vpwr,
input vgnd,
input vpb,
input vnb
`endif

);

`ifdef functional
`else
`ifdef SC_USE_PG_PIN
`else
supply1 vpwr;
supply0 vgnd;
supply1 vpb;
supply0 vnb;
`endif

`endif

  wire buf_Q;
  wire reset;

`ifdef functional
  not (reset,RESETB);
  `ifdef SC_USE_PG_PIN
    scs130hvl_pg_U_DF_P_R_NO_pg  #0.001 ( buf_Q , D , CLK , reset , , vpwr , vgnd ) ;
  `else
    scs130hvl_pg_U_DF_P_R  #0.001 ( buf_Q , D , CLK , reset ) ;
  `endif
`else
  reg notifier;
  wire COND0;
  wire D_delayed;
  wire RESETB_delayed;
  wire CLK_delayed;
  not (reset,RESETB_delayed);
  scs130hvl_pg_U_DF_P_R_NO_pg (  buf_Q , D_delayed , CLK_delayed , reset , notifier , vpwr , vgnd  ) ;
    assign COND0 = (RESETB_delayed === 1'b1);
  specify
    (negedge RESETB => (Q +: RESETB ) ) = 0:0:0;  // delay is tris
    (posedge CLK => (Q : CLK ) ) = (0:0:0,0:0:0); // delays are tris,tfall
    $width (posedge CLK &&& (RESETB===1'b1) , 0:0:0, 0, notifier);
    $width (negedge CLK &&& (RESETB===1'b1) , 0:0:0, 0, notifier);
    $width (negedge RESETB , 0:0:0 , 0 , notifier ) ;
    $recrem ( posedge RESETB , posedge CLK , 0:0:0, 0:0:0, notifier , , , RESETB_delayed , CLK_delayed ) ;
    $setuphold ( posedge CLK , posedge D , 0:0:0, 0:0:0, notifier , , COND0 , CLK_delayed , D_delayed ) ;
    $setuphold ( posedge CLK , negedge D , 0:0:0, 0:0:0, notifier , , COND0 , CLK_delayed , D_delayed ) ;
  endspecify
`endif
  `ifdef SC_USE_PG_PIN


buf (UDP_IN_Q,buf_Q);
  scs130hvl_pg_U_VPWR_VGND (Q, UDP_IN_Q, vpwr, vgnd) ;

  `else
    buf ( Q , buf_Q ) ;
  `endif
endmodule
`endcelldefine