scs8lp/V0.0.0/verilog/scs8lp_xor3_lp.v

// Automatically modified by replacePGwithIfDef.pl
// iptguser	Thu Aug 18 13:10:23 EDT 2011

// Automatically edited by removePhraseFromMultipleFiles.pl
// iptguser	Mon Aug  8 14:40:05 EDT 2011
// \`suppress_faults;^\n
// \`ifdef TETRAMAX;^\n
// \`ifdef functional;\`else
// \`delay_mode_path;^\n
// \`disable_portfaults;\`nosuppress_faults

`celldefine
`timescale 1ns / 1ps
module scs8lp_xor3_lp  (
output X,
input A,
input B,
input C

`ifdef SC_USE_PG_PIN
, input vpwr
, input vgnd
, input vpb
, input vnb
`endif

);

`ifdef functional
`else
`ifdef SC_USE_PG_PIN
`else
supply1 vpwr;
supply0 vgnd;
supply1 vpb;
supply0 vnb;
`endif
`endif


`ifdef functional
`else
reg csi_notifier;

	specify
    // copied from scs8lp_xor3_1
    if ((!B&!C)) (A +=> X) = (0:0:0,0:0:0);
    if ((!B&C)) (A -=> X) = (0:0:0,0:0:0);
    if ((B&!C)) (A -=> X) = (0:0:0,0:0:0);
    if ((B&C)) (A +=> X) = (0:0:0,0:0:0);
    if ((!A&!C)) (B +=> X) = (0:0:0,0:0:0);
    if ((!A&C)) (B -=> X) = (0:0:0,0:0:0);
    if ((A&!C)) (B -=> X) = (0:0:0,0:0:0);
    if ((A&C)) (B +=> X) = (0:0:0,0:0:0);
    if ((!A&!B)) (C +=> X) = (0:0:0,0:0:0);
    if ((!A&B)) (C -=> X) = (0:0:0,0:0:0);
    if ((A&!B)) (C -=> X) = (0:0:0,0:0:0);
    if ((A&B)) (C +=> X) = (0:0:0,0:0:0);
	endspecify
`endif

  xor ( UDP_IN_X , A , B , C ) ;
  `ifdef SC_USE_PG_PIN

  scs8lpa_U_VPWR_VGND (UDP_OUT_X, UDP_IN_X, vpwr, vgnd) ;
  buf   (X, UDP_OUT_X) ;

  `else
    buf ( X , UDP_IN_X ) ;
  `endif
endmodule
`endcelldefine