| * Corner File for nvhv |
| * Number of BINS: 05 |
| * |
| .param |
| + nvhv_toxe_mult = 1.0 |
| + nvhv_toxp_mult = 1.0 |
| + nvhv_overlap_mult = 1.0 |
| + nvhv_ajunction_mult = 1.0 |
| + nvhv_pjunction_mult = 1.0 |
| + nvhv_cjs_mult = 1.0 |
| + nvhv_cjsws_mult = 1.0 |
| + nvhv_cjswgs_mult = 1.0 |
| + nvhv_cgdo_mult = 1.0 |
| + nvhv_cgso_mult = 1.0 |
| + nvhv_cgdl_mult = 1.0 |
| + nvhv_cgsl_mult = 1.0 |
| + nvhv_cf_mult = 1.0 |
| + nvhv_rdiff_mult = 1.0 |
| * |
| + nvhv_lint_diff = 0.0 |
| + nvhv_dlc_diff = 0.0 |
| + nvhv_wint_diff = 0.0 |
| + nvhv_dwc_diff = 0.0 |
| *** |
| * |
| * nvhv, Bin 000, W = 20.0, L = 0.7 |
| * |
| + nvhv_vth0_diff_0 = 0.0 |
| + nvhv_u0_diff_0 = 0.0 |
| + nvhv_k2_diff_0 = 0.0 |
| + nvhv_vsat_diff_0 = 0.0 |
| + nvhv_ua_diff_0 = 0.0 |
| + nvhv_ub_diff_0 = 0.0 |
| + nvhv_a0_diff_0 = 0.0 |
| + nvhv_b0_diff_0 = 0.0 |
| + nvhv_b1_diff_0 = 0.0 |
| + nvhv_ags_diff_0 = 0.0 |
| + nvhv_nfactor_diff_0 = 0.0 |
| + nvhv_voff_diff_0 = 0.0 |
| + nvhv_kt1_diff_0 = 0.0 |
| + nvhv_kt2_diff_0 = 0.0 |
| + nvhv_ute_diff_0 = 0.0 |
| + nvhv_tvoff_diff_0 = 0.0 |
| + nvhv_eta0_diff_0 = 0.0 |
| + nvhv_dsub_diff_0 = 0.0 |
| + nvhv_agidl_diff_0 = 0.0 |
| + nvhv_bgidl_diff_0 = 0.0 |
| + nvhv_cgidl_diff_0 = 0.0 |
| + nvhv_keta_diff_0 = 0.0 |
| * |
| * nvhv, Bin 001, W = 10.0, L = 0.5 |
| * |
| + nvhv_vth0_diff_1 = 0.0 |
| + nvhv_u0_diff_1 = 0.0 |
| + nvhv_k2_diff_1 = 0.0 |
| + nvhv_vsat_diff_1 = 0.0 |
| + nvhv_ua_diff_1 = 0.0 |
| + nvhv_ub_diff_1 = 0.0 |
| + nvhv_a0_diff_1 = 0.0 |
| + nvhv_b0_diff_1 = 0.0 |
| + nvhv_b1_diff_1 = 0.0 |
| + nvhv_ags_diff_1 = 0.0 |
| + nvhv_nfactor_diff_1 = 0.0 |
| + nvhv_voff_diff_1 = 0.0 |
| + nvhv_kt1_diff_1 = 0.0 |
| + nvhv_kt2_diff_1 = 0.0 |
| + nvhv_ute_diff_1 = 0.0 |
| + nvhv_tvoff_diff_1 = 0.0 |
| + nvhv_eta0_diff_1 = 0.0 |
| + nvhv_dsub_diff_1 = 0.0 |
| + nvhv_agidl_diff_1 = 0.0 |
| + nvhv_bgidl_diff_1 = 0.0 |
| + nvhv_cgidl_diff_1 = 0.0 |
| + nvhv_keta_diff_1 = 0.0 |
| * |
| * nvhv, Bin 002, W = 50.0, L = 0.7 |
| * |
| + nvhv_vth0_diff_2 = 0.0 |
| + nvhv_u0_diff_2 = 0.0 |
| + nvhv_k2_diff_2 = 0.0 |
| + nvhv_vsat_diff_2 = 0.0 |
| + nvhv_ua_diff_2 = 0.0 |
| + nvhv_ub_diff_2 = 0.0 |
| + nvhv_a0_diff_2 = 0.0 |
| + nvhv_b0_diff_2 = 0.0 |
| + nvhv_b1_diff_2 = 0.0 |
| + nvhv_ags_diff_2 = 0.0 |
| + nvhv_nfactor_diff_2 = 0.0 |
| + nvhv_voff_diff_2 = 0.0 |
| + nvhv_kt1_diff_2 = 0.0 |
| + nvhv_kt2_diff_2 = 0.0 |
| + nvhv_ute_diff_2 = 0.0 |
| + nvhv_tvoff_diff_2 = 0.0 |
| + nvhv_eta0_diff_2 = 0.0 |
| + nvhv_dsub_diff_2 = 0.0 |
| + nvhv_agidl_diff_2 = 0.0 |
| + nvhv_bgidl_diff_2 = 0.0 |
| + nvhv_cgidl_diff_2 = 0.0 |
| + nvhv_keta_diff_2 = 0.0 |
| * |
| * nvhv, Bin 003, W = 20.0, L = 2.2 |
| * |
| + nvhv_vth0_diff_3 = 0.0 |
| + nvhv_u0_diff_3 = 0.0 |
| + nvhv_k2_diff_3 = 0.0 |
| + nvhv_vsat_diff_3 = 0.0 |
| + nvhv_ua_diff_3 = 0.0 |
| + nvhv_ub_diff_3 = 0.0 |
| + nvhv_a0_diff_3 = 0.0 |
| + nvhv_b0_diff_3 = 0.0 |
| + nvhv_b1_diff_3 = 0.0 |
| + nvhv_ags_diff_3 = 0.0 |
| + nvhv_nfactor_diff_3 = 0.0 |
| + nvhv_voff_diff_3 = 0.0 |
| + nvhv_kt1_diff_3 = 0.0 |
| + nvhv_kt2_diff_3 = 0.0 |
| + nvhv_ute_diff_3 = 0.0 |
| + nvhv_tvoff_diff_3 = 0.0 |
| + nvhv_eta0_diff_3 = 0.0 |
| + nvhv_dsub_diff_3 = 0.0 |
| + nvhv_agidl_diff_3 = 0.0 |
| + nvhv_bgidl_diff_3 = 0.0 |
| + nvhv_cgidl_diff_3 = 0.0 |
| + nvhv_keta_diff_3 = 0.0 |
| * |
| * nvhv, Bin 004, W = 5.0, L = 2.2 |
| * |
| + nvhv_vth0_diff_4 = 0.0 |
| + nvhv_u0_diff_4 = 0.0 |
| + nvhv_k2_diff_4 = 0.0 |
| + nvhv_vsat_diff_4 = 0.0 |
| + nvhv_ua_diff_4 = 0.0 |
| + nvhv_ub_diff_4 = 0.0 |
| + nvhv_a0_diff_4 = 0.0 |
| + nvhv_b0_diff_4 = 0.0 |
| + nvhv_b1_diff_4 = 0.0 |
| + nvhv_ags_diff_4 = 0.0 |
| + nvhv_nfactor_diff_4 = 0.0 |
| + nvhv_voff_diff_4 = 0.0 |
| + nvhv_kt1_diff_4 = 0.0 |
| + nvhv_kt2_diff_4 = 0.0 |
| + nvhv_ute_diff_4 = 0.0 |
| + nvhv_tvoff_diff_4 = 0.0 |
| + nvhv_eta0_diff_4 = 0.0 |
| + nvhv_dsub_diff_4 = 0.0 |
| + nvhv_agidl_diff_4 = 0.0 |
| + nvhv_bgidl_diff_4 = 0.0 |
| + nvhv_cgidl_diff_4 = 0.0 |
| + nvhv_keta_diff_4 = 0.0 |
| |
| .include "nvhv_subcircuit.pm3" |
