blob: 51dc0fa86127a1df6fdc4f3391b5b7d68d88be55 [file] [log] [blame]
* Corner File for nvhv
* Number of BINS: 05
*
.param
+ nvhv_toxe_mult = 0.958
+ nvhv_overlap_mult = 0.10246
+ nvhv_ajunction_mult = 8.7078e-01
+ nvhv_pjunction_mult = 8.4883e-01
+ nvhv_rdiff_mult = 6.4330e-01
*
+ nvhv_lint_diff = 1.21275e-08
+ nvhv_dlc_diff = 1.21275e-08
+ nvhv_wint_diff = -2.252e-08
+ nvhv_dwc_diff = -2.252e-08
***
*
* nvhv, Bin 000, W = 20.0, L = 0.7
*
+ nvhv_vth0_diff_0 = -0.089609
+ nvhv_u0_diff_0 = 0.02839
+ nvhv_k2_diff_0 = 0.0
+ nvhv_vsat_diff_0 = 0.0
+ nvhv_ua_diff_0 = 0.0
+ nvhv_ub_diff_0 = 0.0
+ nvhv_a0_diff_0 = 0.0
+ nvhv_b0_diff_0 = 0.0
+ nvhv_b1_diff_0 = 0.0
+ nvhv_ags_diff_0 = 0.0
+ nvhv_nfactor_diff_0 = 0.0
+ nvhv_voff_diff_0 = 0.0
+ nvhv_kt1_diff_0 = 0.0
+ nvhv_kt2_diff_0 = 0.0
+ nvhv_ute_diff_0 = 0.0
+ nvhv_tvoff_diff_0 = 0.0
+ nvhv_eta0_diff_0 = 0.0
+ nvhv_dsub_diff_0 = 0.0
+ nvhv_agidl_diff_0 = 0.0
+ nvhv_bgidl_diff_0 = 0.0
+ nvhv_cgidl_diff_0 = 0.0
+ nvhv_keta_diff_0 = 0.0
*
* nvhv, Bin 001, W = 5.0, L = 0.7
*
+ nvhv_vth0_diff_1 = -0.096163
+ nvhv_u0_diff_1 = 0.022106
+ nvhv_k2_diff_1 = 0.0
+ nvhv_vsat_diff_1 = 0.0
+ nvhv_ua_diff_1 = 0.0
+ nvhv_ub_diff_1 = 0.0
+ nvhv_a0_diff_1 = 0.0
+ nvhv_b0_diff_1 = 0.0
+ nvhv_b1_diff_1 = 0.0
+ nvhv_ags_diff_1 = 0.0
+ nvhv_nfactor_diff_1 = 0.0
+ nvhv_voff_diff_1 = 0.0
+ nvhv_kt1_diff_1 = 0.0
+ nvhv_kt2_diff_1 = 0.0
+ nvhv_ute_diff_1 = 0.0
+ nvhv_tvoff_diff_1 = 0.0
+ nvhv_eta0_diff_1 = 0.0
+ nvhv_dsub_diff_1 = 0.0
+ nvhv_agidl_diff_1 = 0.0
+ nvhv_bgidl_diff_1 = 0.0
+ nvhv_cgidl_diff_1 = 0.0
+ nvhv_keta_diff_1 = 0.0
*
* nvhv, Bin 002, W = 50.0, L = 0.7
*
+ nvhv_vth0_diff_2 = -0.092808
+ nvhv_u0_diff_2 = 0.021507
+ nvhv_k2_diff_2 = 0.0
+ nvhv_vsat_diff_2 = 0.0
+ nvhv_ua_diff_2 = 0.0
+ nvhv_ub_diff_2 = 0.0
+ nvhv_a0_diff_2 = 0.0
+ nvhv_b0_diff_2 = 0.0
+ nvhv_b1_diff_2 = 0.0
+ nvhv_ags_diff_2 = 0.0
+ nvhv_nfactor_diff_2 = 0.0
+ nvhv_voff_diff_2 = 0.0
+ nvhv_kt1_diff_2 = 0.0
+ nvhv_kt2_diff_2 = 0.0
+ nvhv_ute_diff_2 = 0.0
+ nvhv_tvoff_diff_2 = 0.0
+ nvhv_eta0_diff_2 = 0.0
+ nvhv_dsub_diff_2 = 0.0
+ nvhv_agidl_diff_2 = 0.0
+ nvhv_bgidl_diff_2 = 0.0
+ nvhv_cgidl_diff_2 = 0.0
+ nvhv_keta_diff_2 = 0.0
*
* nvhv, Bin 003, W = 20.0, L = 2.2
*
+ nvhv_vth0_diff_3 = -0.065548
+ nvhv_u0_diff_3 = 0.0052842
+ nvhv_k2_diff_3 = 0.0
+ nvhv_vsat_diff_3 = 0.0
+ nvhv_ua_diff_3 = 0.0
+ nvhv_ub_diff_3 = 0.0
+ nvhv_a0_diff_3 = 0.0
+ nvhv_b0_diff_3 = 0.0
+ nvhv_b1_diff_3 = 0.0
+ nvhv_ags_diff_3 = 0.0
+ nvhv_nfactor_diff_3 = 0.0
+ nvhv_voff_diff_3 = 0.0
+ nvhv_kt1_diff_3 = 0.0
+ nvhv_kt2_diff_3 = 0.0
+ nvhv_ute_diff_3 = 0.0
+ nvhv_tvoff_diff_3 = 0.0
+ nvhv_eta0_diff_3 = 0.0
+ nvhv_dsub_diff_3 = 0.0
+ nvhv_agidl_diff_3 = 0.0
+ nvhv_bgidl_diff_3 = 0.0
+ nvhv_cgidl_diff_3 = 0.0
+ nvhv_keta_diff_3 = 0.0
*
* nvhv, Bin 004, W = 20.0, L = 2.2
*
+ nvhv_vth0_diff_4 = -0.059089
+ nvhv_u0_diff_4 = 0.0032591
+ nvhv_k2_diff_4 = 0.0
+ nvhv_vsat_diff_4 = 0.0
+ nvhv_ua_diff_4 = 0.0
+ nvhv_ub_diff_4 = 0.0
+ nvhv_a0_diff_4 = 0.0
+ nvhv_b0_diff_4 = 0.0
+ nvhv_b1_diff_4 = 0.0
+ nvhv_ags_diff_4 = 0.0
+ nvhv_nfactor_diff_4 = 0.0
+ nvhv_voff_diff_4 = 0.0
+ nvhv_kt1_diff_4 = 0.0
+ nvhv_kt2_diff_4 = 0.0
+ nvhv_ute_diff_4 = 0.0
+ nvhv_tvoff_diff_4 = 0.0
+ nvhv_eta0_diff_4 = 0.0
+ nvhv_dsub_diff_4 = 0.0
+ nvhv_agidl_diff_4 = 0.0
+ nvhv_bgidl_diff_4 = 0.0
+ nvhv_cgidl_diff_4 = 0.0
+ nvhv_keta_diff_4 = 0.0
.include "nvhv_subcircuit.pm3"