blob: 261366680b29831627a9e1f58356adeda691275c [file] [log] [blame]
// Automatically modified by replacePGwithIfDef.pl
// iptguser Thu Aug 18 13:10:20 EDT 2011
// Automatically edited by removePhraseFromMultipleFiles.pl
// iptguser Mon Aug 8 14:40:03 EDT 2011
// \`suppress_faults;^\n
// \`ifdef TETRAMAX;^\n
// \`ifdef functional;\`else
// \`delay_mode_path;^\n
// \`disable_portfaults;\`nosuppress_faults
`celldefine
`timescale 1ns / 1ps
module scs8lp_o21a_1 (
output X,
input A1,
input A2,
input B1
`ifdef SC_USE_PG_PIN
, input vpwr
, input vgnd
, input vpb
, input vnb
`endif
);
`ifdef functional
`else
`ifdef SC_USE_PG_PIN
`else
supply1 vpwr;
supply0 vgnd;
supply1 vpb;
supply0 vnb;
`endif
`endif
wire csi_opt_287;
// modification by BNB, based on SPR13943. need to have
`ifdef functional
`else
reg csi_notifier;
specify
(A1 +=> X) = (0:0:0,0:0:0);
(A2 +=> X) = (0:0:0,0:0:0);
if ((!A1&A2)) (B1 +=> X) = (0:0:0,0:0:0);
if ((A1&!A2)) (B1 +=> X) = (0:0:0,0:0:0);
if ((A1&A2)) (B1 +=> X) = (0:0:0,0:0:0);
endspecify
`endif
or ( csi_opt_287 , A2 , A1 ) ;
and ( UDP_IN_X , csi_opt_287 , B1 ) ;
`ifdef SC_USE_PG_PIN
scs8lpa_U_VPWR_VGND (UDP_OUT_X, UDP_IN_X, vpwr, vgnd) ;
buf (X, UDP_OUT_X) ;
`else
buf ( X , UDP_IN_X ) ;
`endif
endmodule
`endcelldefine