| `celldefine |
| `suppress_faults |
| `enable_portfaults |
| |
| `ifdef TETRAMAX |
| `define functional |
| `endif |
| |
| `ifdef functional |
| `timescale 1ns / 1ps |
| `ifndef dont_change_delay_mode // See CDT 66389 for detail on dont_change_delay_mode |
| `delay_mode_distributed |
| `endif |
| `ifndef dont_change_delay_mode // See CDT 66389 for detail on dont_change_delay_mode |
| `delay_mode_unit |
| `endif |
| `else |
| `timescale 1ns / 1ps |
| `ifndef dont_change_delay_mode // See CDT 66389 for detail on dont_change_delay_mode |
| `delay_mode_path |
| `endif |
| `endif |
| |
| |
| module scs8hs_dfbbn_1 ( Q , QN , D , CLKN , SETB , RESETB , vpwr , vgnd ) ; |
| output Q , QN ; |
| input D , CLKN , SETB , RESETB , vpwr , vgnd ; |
| |
| wire reset , set , clk , buf_Q ; |
| wire CLKN_delayed , RESETB_delayed , SETB_delayed ; |
| |
| `ifdef functional |
| not ( reset , RESETB ) ; |
| not ( set , SETB ) ; |
| not ( clk , CLKN ) ; |
| U_DFB_SETDOM_pg #0.001 ( buf_Q , set , reset , clk , D , vpwr , vgnd ) ; |
| `else |
| reg notifier ; |
| |
| not ( reset , RESETB_delayed ) ; |
| not ( set , SETB_delayed ) ; |
| not ( clk , CLKN_delayed ) ; |
| U_DFB_SETDOM_notify_pg ( buf_Q , set , reset , clk , D_delayed , notifier , vpwr , vgnd ) ; |
| |
| wire AWAKE , COND0 , COND1 , CONDB ; |
| assign AWAKE = ( vpwr === 1'b1 ) ; |
| assign COND0 = ( AWAKE && ( RESETB_delayed === 1'b1 ) ) ; |
| assign COND1 = ( AWAKE && ( SETB_delayed === 1'b1 ) ) ; |
| assign CONDB = ( COND0 & COND1 ) ; |
| specify |
| ( negedge RESETB => ( Q +: RESETB ) ) = 0:0:0 ; // delay is tfall |
| ( negedge RESETB => ( QN -: RESETB ) ) = 0:0:0 ; // delay is tris |
| |
| ( SETB => ( Q -: SETB ) ) = ( 0:0:0 , 0:0:0 ) ; // delay is tris , tfall |
| ( SETB => ( QN +: SETB ) ) = ( 0:0:0 , 0:0:0 ) ; // delay is tris , tfall |
| |
| ( negedge CLKN => ( Q +: D ) ) = ( 0:0:0 , 0:0:0 ) ; // delays are tris , tfall |
| ( negedge CLKN => ( QN -: D ) ) = ( 0:0:0 , 0:0:0 ) ; // delays are tris , tfall |
| |
| $recrem ( posedge SETB , negedge CLKN , 0:0:0 , 0:0:0 , notifier , COND0 , COND0 , SETB_delayed , CLKN_delayed ) ; |
| $recrem ( posedge RESETB , negedge CLKN , 0:0:0 , 0:0:0 , notifier , COND1 , COND1 , RESETB_delayed , CLKN_delayed ) ; |
| |
| $setuphold ( negedge CLKN , posedge D , 0:0:0 , 0:0:0 , notifier , CONDB , CONDB , CLKN_delayed , D_delayed ) ; |
| $setuphold ( negedge CLKN , negedge D , 0:0:0 , 0:0:0 , notifier , CONDB , CONDB , CLKN_delayed , D_delayed ) ; |
| |
| $hold ( posedge SETB &&& AWAKE , posedge RESETB &&& AWAKE , 3.0:3.0:3.0 , notifier ) ; //arbitrary , uncharacterized value to |
| //flag possible state error |
| $hold ( posedge RESETB &&& AWAKE , posedge SETB &&& AWAKE , 3.0:3.0:3.0 , notifier ) ; //arbitrary , uncharacterized value to |
| //flag possible state error |
| |
| $width ( negedge CLKN &&& CONDB , 1.0:1.0:1.0 , 0 , notifier ) ; |
| $width ( posedge CLKN &&& CONDB , 1.0:1.0:1.0 , 0 , notifier ) ; |
| $width ( negedge SETB &&& AWAKE , 1.0:1.0:1.0 , 0 , notifier ) ; |
| $width ( posedge SETB &&& AWAKE , 1.0:1.0:1.0 , 0 , notifier ) ; |
| $width ( negedge RESETB &&& AWAKE , 1.0:1.0:1.0 , 0 , notifier ) ; |
| $width ( posedge RESETB &&& AWAKE , 1.0:1.0:1.0 , 0 , notifier ) ; |
| |
| endspecify |
| |
| |
| `endif |
| buf ( Q , buf_Q ) ; |
| not ( QN , buf_Q ) ; |
| |
| |
| endmodule |
| `endcelldefine |
| `disable_portfaults |
| `nosuppress_faults |