scs8hs/V0.0.0/verilog/scs8hs_fa_1.v

`celldefine
`suppress_faults
`enable_portfaults

`ifdef TETRAMAX
`define functional
`endif

`ifdef functional
 `timescale 1ns / 1ps
`ifndef dont_change_delay_mode // See CDT 66389 for detail on dont_change_delay_mode
 `delay_mode_distributed
`endif
`ifndef dont_change_delay_mode // See CDT 66389 for detail on dont_change_delay_mode
 `delay_mode_unit
`endif
`else
 `timescale 1ns / 1ps
`ifndef dont_change_delay_mode // See CDT 66389 for detail on dont_change_delay_mode
 `delay_mode_path
`endif
`endif 

module scs8hs_fa_1 ( COUT , SUM ,  A , B , CIN , vpwr , vgnd );
input vpwr, vgnd;
output  COUT , SUM ;
input  A , B , CIN ;

wire	COUT , SUM , A , B ;
wire	CIN , csi_opt_303, csi_opt_278, csi_opt_279 ;
wire	csi_opt_276, csi_opt_275, csi_opt_277 ;

`ifdef functional
`else
reg csi_notifier;

	specify
    if ((!B&CIN)) (A +=> COUT) = (0:0:0,0:0:0);
    if ((B&!CIN)) (A +=> COUT) = (0:0:0,0:0:0);
    if ((!A&CIN)) (B +=> COUT) = (0:0:0,0:0:0);
    if ((A&!CIN)) (B +=> COUT) = (0:0:0,0:0:0);
    if ((!A&B)) (CIN +=> COUT) = (0:0:0,0:0:0);
    if ((A&!B)) (CIN +=> COUT) = (0:0:0,0:0:0);
    if ((!B&!CIN)) (A +=> SUM) = (0:0:0,0:0:0);
    if ((!B&CIN)) (A -=> SUM) = (0:0:0,0:0:0);
    if ((B&!CIN)) (A -=> SUM) = (0:0:0,0:0:0);
    if ((B&CIN)) (A +=> SUM) = (0:0:0,0:0:0);
    if ((!A&!CIN)) (B +=> SUM) = (0:0:0,0:0:0);
    if ((!A&CIN)) (B -=> SUM) = (0:0:0,0:0:0);
    if ((A&!CIN)) (B -=> SUM) = (0:0:0,0:0:0);
    if ((A&CIN)) (B +=> SUM) = (0:0:0,0:0:0);
    if ((!A&!B)) (CIN +=> SUM) = (0:0:0,0:0:0);
    if ((!A&B)) (CIN -=> SUM) = (0:0:0,0:0:0);
    if ((A&!B)) (CIN -=> SUM) = (0:0:0,0:0:0);
    if ((A&B)) (CIN +=> SUM) = (0:0:0,0:0:0);
	endspecify
`endif

  or ( csi_opt_303 , CIN , B ) ;
  and ( csi_opt_278 , csi_opt_303 , A ) ;
  and ( csi_opt_279 , B , CIN ) ;
  or  ( UDP_IN_COUT , csi_opt_279 , csi_opt_278 ) ;
  U_VPWR_VGND (UDP_OUT_COUT, UDP_IN_COUT, vpwr, vgnd) ;
  buf  (COUT, UDP_OUT_COUT) ;
  and ( csi_opt_276 , CIN , A , B ) ;
  nor ( csi_opt_275 , A , csi_opt_303 ) ;
  nor ( csi_opt_277 , csi_opt_275 , COUT ) ;
  or  ( UDP_IN_SUM , csi_opt_277 , csi_opt_276 ) ;
  U_VPWR_VGND (UDP_OUT_SUM, UDP_IN_SUM, vpwr, vgnd) ;
  buf  (SUM, UDP_OUT_SUM) ;
endmodule
`endcelldefine
`disable_portfaults
`nosuppress_faults