s8/V2.0.0/README.txt

For information on this PDK, please consult the Release Notes and User's Guide:

doc/sw_s8_pdk_Release_Notes_V1.0.0.pdf
doc/sw_s8_pdk_Users_Guide_V1.0.0.pdf

10/25/2019  vun  updated PEX deck for n20vhv1, added schematic symbol to the s8phirs_10r library.  Fixed the netlisting issue with the p20vhv1.
11/07/2019  vun  updated nfetextd and pfetextd matching the netlisting method used for the other high voltage fets.
11/26/2019  vun  updated softRules for HV fets.
12/11/2019  vun  updated updated s8_filter device for Dpar(DNWDIODE_PW)
12/20/2019  vun  updated updated xrcControlfile allowing diode parallel reduction.

1/18/2020   mlevine
  
  V2.0.0 Release Notes:

  - NOTE: Env Var PDK_HOME is assumed to be the path to the V2.0.0 directory.

  - Removed VirtuosoOA/examples/.cdsinit.swp file

  - Changed the last two lines in ./VirtuosoOA/examples/.cdsinit to:
      setShellEnvVar("CDS_Netlisting_Mode=Analog")
      setShellEnvVar("CDS_AUTO_64BIT=ALL")


  nfet/pfet Symbol Pcells Added:
    - Added functions for nfet/pfet symbol pcell to ./VirtuosoOA/SKILL/config/pcios/ilexec/nfet_pfet_symbol.il
      and they are loaded through ./VirtuosoOA/libs/s8phirs_10r/libInit.il

    - Added pcell generation code to ./VirtuosoOA/SKILL/dev/pcells

  hrpoly/uhrpoly Scalable Poly Resistors Added: 
    - Added functions for hrpoly/uhrpoly layout pcell and cdf to:
      ./VirtuosoOA/SKILL/config/pcios/ilexec/S8techData.il 
      ./VirtuosoOA/SKILL/config/pcios/ilexec/S8resPcellCBs.il

    - Added load for those files through ./VirtuosoOA/libs/s8phirs_10r/libInit.il

    - Added pcell generation code to ./VirtuosoOA/SKILL/dev/pcells
 
    - Added new linear.mod file sent by Usman to ./MODELS/SPECTRE/s8x/Models/linear.mod

  p20vhv1 Fix:
    - Changed the CDF parameter name hspiceModelMenu for cell p20vhv1 to hspiceModel (to get it to netlist properly).

    - Changed hspiceModelMenu to hspiceModel in the propMapping under auCdl sim properties (to LVS properly).

  PVS Support Added:
    - To Use, need to add a pvtech.lib file to where you start cadence and add:
      DEFINE s8_pvs $PDK_HOME/LVS/PVS
      (Note: could also use path $PDK_HOME/DRC/PVS, both should work for DRC and LVS)

    - Added the following files for LVS PVS to ./LVS/PVS directory:
        lvs_s8_opts.pvl
        xrcControlFile_s8.pvl
        s8_filter_devices.pvl
        extLvsRules_s8_5lm.pvl
        techRuleSets

    - Moved lvsRules_s8_5lm.pvl to lvsRules_s8_5lm_old.pvl in ./LVS/PVS directory
  
    - Added the following files for DRC PVS to ./DRC/PVS directory:
        s8_drcRules.pvl
        techRuleSets

  QA DRC Added:
    - To Use, add this to your cds.lib to do DRC QA testing:
      DEFINE QA_s8_drc $PDK_HOME/DRC/dev/libs/QA_s8_drc

    - To Use, set this in your environment prior to starting Cadence:
      export CDS_PROJECT="$PDK_HOME/VirtuosoOA/SKILL"
      export PDK_DEV=t

    - Added lib QA_s8_drc to /DRC/dev/libs directory

    - Added laQADRC.il load in ./VirtuosoOA/SKILL/SkyWater.il, dependent on PDK_DEV being set to t.

    - Added laQADRC.il to ./VirtuosoOA/SKILL/dev/qa_drc/laQADRC.il

    - Added cdsLibMgr.il to ./VirtuosoOA/SKILL/cdsLibMgr.il (for Skywater menu on library manager; can add other menus here too)

    - NOTE: If you have a ddsOpenLibManager() statement in your .cdsinit, you'll have to enclose it with a hiRegTimer like below or the library manager menus won't load.
            ;; Open Library Manager
            hiRegTimer("ddsOpenLibManager()" 50)

    - Added ./scripts with bash and python scripts necessary for running QA DRC (python has self contained executable, but source code also included)

  Known Issues:
    - Warnings from xhrpoly scalable resistor model:
        WARNING (SFE-101): "/db/pdk/skywater/s8/V2.0.0/MODELS/SPECTRE/s8phirs_10r/Models/./../../s8x/Models/linear.mod" 81: R0_1.rhead_model: `sw_et' is not a valid parameter for an instance of `r2'.  Ignored.
        WARNING (SFE-101): "/db/pdk/skywater/s8/V2.0.0/MODELS/SPECTRE/s8phirs_10r/Models/./../../s8x/Models/linear.mod" 81: R0_1.rhead_model: `isnoisy' is not a valid parameter for an instance of `r2'.  Ignored.
        WARNING (SFE-101): "/db/pdk/skywater/s8/V2.0.0/MODELS/SPECTRE/s8phirs_10r/Models/./../../s8x/Models/linear.mod" 86: R0_1.rbody_model: `sw_et' is not a valid parameter for an instance of `r2'.  Ignored.
        WARNING (SFE-101): "/db/pdk/skywater/s8/V2.0.0/MODELS/SPECTRE/s8phirs_10r/Models/./../../s8x/Models/linear.mod" 86: R0_1.rbody_model: `isnoisy' is not a valid parameter for an instance of `r2'.  Ignored.
        WARNING (CMI-2704): R0_1.rbody_model:  `p3' is higher than allowed maximum.
        WARNING (CMI-2704): R0_1.rbody_model:  `p2' is higher than allowed maximum.
        WARNING (CMI-2705): R0_1.rbody_model:  `p2' is lower than allowed minimum.

    - LVS does not work for hrpoly and uhrpoly because device name not in LVS deck

    - Right now using multiple instances for series with segments >1. If you plot current through ADE, it can't find the right terminal. 
      Either change termOrder, termMapping in cdf to accommodate or remove multiple instances and change model (preferred).

    - Seeing different R value for hrpoly between the fixed width and variable width models.