| torture_test_s8 1000 |
| s_68_metblk.6 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| metblk.6: prBoundary.boundary not allowed in layout |
| s_69_metblk.7 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| metblk.7: poly.boundary not allowed in layout |
| s_70_metblk.7 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| metblk.7: diff.boundary not allowed in layout |
| s_71_metblk.7 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| metblk.7: tap.boundary not allowed in layout |
| s_6_X.27 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.27: partnum or partnum exclusion 'partnum_not_necessary' not present on chip |
| s_7_X.27 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.27: partnum*block pcell should be used instead of partnum* pcells |
| s_0_X.18 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| single mcon_NOTAreaidStdCellCore that can be doubled |
| s_1_X.18 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| single via_NOTAreaidStdCellCore that can be doubled |
| s_2_X.18 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| single via2_NOTAreaidStdCellCore that can be doubled |
| s_5_X.23f |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.23f: ptap must not straddle localSub |
| s_3_X.18 |
| 0 0 2 Dec 2 07:20:03 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| single via3_NOTAreaidStdCellCore that can be doubled |
| s_4_X.18 |
| 57 57 2 Dec 2 07:20:04 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| single via4_NOTAreaidStdCellCore that can be doubled |
| p 1 4 |
| CN torture_test_s8 c 1 0 0 1 0 0 0 |
| 3012700 351100 |
| 3013500 351100 |
| 3013500 351900 |
| 3012700 351900 |
| p 2 4 |
| 3012700 354600 |
| 3013500 354600 |
| 3013500 355400 |
| 3012700 355400 |
| p 3 4 |
| 3012700 358100 |
| 3013500 358100 |
| 3013500 358900 |
| 3012700 358900 |
| p 4 4 |
| 3181600 414105 |
| 3182400 414105 |
| 3182400 414905 |
| 3181600 414905 |
| p 5 4 |
| 3185700 414105 |
| 3186500 414105 |
| 3186500 414905 |
| 3185700 414905 |
| p 6 4 |
| 3190490 414105 |
| 3191290 414105 |
| 3191290 414905 |
| 3190490 414905 |
| p 7 4 |
| 3194590 414105 |
| 3195390 414105 |
| 3195390 414905 |
| 3194590 414905 |
| p 8 4 |
| 3199380 414105 |
| 3200180 414105 |
| 3200180 414905 |
| 3199380 414905 |
| p 9 4 |
| 3203480 414105 |
| 3204280 414105 |
| 3204280 414905 |
| 3203480 414905 |
| p 10 4 |
| 3212370 414105 |
| 3213170 414105 |
| 3213170 414905 |
| 3212370 414905 |
| p 11 4 |
| 3271100 442610 |
| 3271900 442610 |
| 3271900 443410 |
| 3271100 443410 |
| p 12 4 |
| 3271100 446110 |
| 3271900 446110 |
| 3271900 446910 |
| 3271100 446910 |
| p 13 4 |
| 3271100 449610 |
| 3271900 449610 |
| 3271900 450410 |
| 3271100 450410 |
| p 14 4 |
| 3271100 453110 |
| 3271900 453110 |
| 3271900 453910 |
| 3271100 453910 |
| p 15 4 |
| 3274700 442610 |
| 3275500 442610 |
| 3275500 443410 |
| 3274700 443410 |
| p 16 4 |
| 3274700 453110 |
| 3275500 453110 |
| 3275500 453910 |
| 3274700 453910 |
| p 17 4 |
| 3278990 442610 |
| 3279790 442610 |
| 3279790 443410 |
| 3278990 443410 |
| p 18 4 |
| 3282590 442610 |
| 3283390 442610 |
| 3283390 443410 |
| 3282590 443410 |
| p 19 4 |
| 3282590 446110 |
| 3283390 446110 |
| 3283390 446910 |
| 3282590 446910 |
| p 20 4 |
| 3282590 449610 |
| 3283390 449610 |
| 3283390 450410 |
| 3282590 450410 |
| p 21 4 |
| 3282590 453110 |
| 3283390 453110 |
| 3283390 453910 |
| 3282590 453910 |
| p 22 4 |
| 3361100 497100 |
| 3361900 497100 |
| 3361900 497900 |
| 3361100 497900 |
| p 23 4 |
| 3361100 501600 |
| 3361900 501600 |
| 3361900 502400 |
| 3361100 502400 |
| p 24 4 |
| 3361100 506100 |
| 3361900 506100 |
| 3361900 506900 |
| 3361100 506900 |
| p 25 4 |
| 3368990 497100 |
| 3369790 497100 |
| 3369790 497900 |
| 3368990 497900 |
| p 26 4 |
| 3368990 506100 |
| 3369790 506100 |
| 3369790 506900 |
| 3368990 506900 |
| p 27 4 |
| 3376880 497100 |
| 3377680 497100 |
| 3377680 497900 |
| 3376880 497900 |
| p 28 4 |
| 3376880 506100 |
| 3377680 506100 |
| 3377680 506900 |
| 3376880 506900 |
| p 29 4 |
| 3384770 497100 |
| 3385570 497100 |
| 3385570 497900 |
| 3384770 497900 |
| p 30 4 |
| 3451600 351600 |
| 3452400 351600 |
| 3452400 352400 |
| 3451600 352400 |
| p 31 4 |
| 3451600 356100 |
| 3452400 356100 |
| 3452400 356900 |
| 3451600 356900 |
| p 32 4 |
| 3451600 360600 |
| 3452400 360600 |
| 3452400 361400 |
| 3451600 361400 |
| p 33 4 |
| 3451600 463100 |
| 3452400 463100 |
| 3452400 463900 |
| 3451600 463900 |
| p 34 4 |
| 3451600 467600 |
| 3452400 467600 |
| 3452400 468400 |
| 3451600 468400 |
| p 35 4 |
| 3455700 351600 |
| 3456500 351600 |
| 3456500 352400 |
| 3455700 352400 |
| p 36 4 |
| 3455700 360600 |
| 3456500 360600 |
| 3456500 361400 |
| 3455700 361400 |
| p 37 4 |
| 3455700 463100 |
| 3456500 463100 |
| 3456500 463900 |
| 3455700 463900 |
| p 38 4 |
| 3455700 467600 |
| 3456500 467600 |
| 3456500 468400 |
| 3455700 468400 |
| p 39 4 |
| 3458700 445600 |
| 3459500 445600 |
| 3459500 446400 |
| 3458700 446400 |
| p 40 4 |
| 3458700 456100 |
| 3459500 456100 |
| 3459500 456900 |
| 3458700 456900 |
| p 41 4 |
| 3460490 351600 |
| 3461290 351600 |
| 3461290 352400 |
| 3460490 352400 |
| p 42 4 |
| 3460490 356100 |
| 3461290 356100 |
| 3461290 356900 |
| 3460490 356900 |
| p 43 4 |
| 3460490 360600 |
| 3461290 360600 |
| 3461290 361400 |
| 3460490 361400 |
| p 44 4 |
| 3460490 463100 |
| 3461290 463100 |
| 3461290 463900 |
| 3460490 463900 |
| p 45 4 |
| 3460490 467600 |
| 3461290 467600 |
| 3461290 468400 |
| 3460490 468400 |
| p 46 4 |
| 3464590 351600 |
| 3465390 351600 |
| 3465390 352400 |
| 3464590 352400 |
| p 47 4 |
| 3464590 360600 |
| 3465390 360600 |
| 3465390 361400 |
| 3464590 361400 |
| p 48 4 |
| 3464590 463100 |
| 3465390 463100 |
| 3465390 463900 |
| 3464590 463900 |
| p 49 4 |
| 3464590 467600 |
| 3465390 467600 |
| 3465390 468400 |
| 3464590 468400 |
| p 50 4 |
| 3469380 351600 |
| 3470180 351600 |
| 3470180 352400 |
| 3469380 352400 |
| p 51 4 |
| 3469380 356100 |
| 3470180 356100 |
| 3470180 356900 |
| 3469380 356900 |
| p 52 4 |
| 3469380 463100 |
| 3470180 463100 |
| 3470180 463900 |
| 3469380 463900 |
| p 53 4 |
| 3473480 351600 |
| 3474280 351600 |
| 3474280 352400 |
| 3473480 352400 |
| p 54 4 |
| 3473480 356100 |
| 3474280 356100 |
| 3474280 356900 |
| 3473480 356900 |
| p 55 4 |
| 3473480 360600 |
| 3474280 360600 |
| 3474280 361400 |
| 3473480 361400 |
| p 56 4 |
| 3473480 463100 |
| 3474280 463100 |
| 3474280 463900 |
| 3473480 463900 |
| p 57 4 |
| 3473480 467600 |
| 3474280 467600 |
| 3474280 468400 |
| 3473480 468400 |
| s_8_m2.3c |
| 0 0 2 Dec 2 07:20:04 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m2.3c: Crater: spacing matches between met2 areas with via2-to-SurfaceArea ratio >=0.05 and =< 0.032 |
| s_13_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Metal on poly is texted as both tied and floating (Chip level) |
| s_18_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Metal on li1 is texted as both tied and floating (Chip level) |
| s_20_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: met1 marked with m1_float not floating |
| s_21_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Nets on met1 is floating |
| s_22_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating met1 marked with m1_tie at chiplevel without connecting |
| s_23_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Metal on met1 is texted as both tied and floating (Chip level) |
| s_25_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: met2 marked with m2_float not floating |
| s_26_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Nets on met2 is floating |
| s_27_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating met2 marked with m2_tie at chiplevel without connecting |
| s_28_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Metal on met2 is texted as both tied and floating (Chip level) |
| s_33_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Metal on met3 is texted as both tied and floating (Chip level) |
| s_38_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Metal on met4 is texted as both tied and floating (Chip level) |
| s_43_X.22 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Metal on met5 is texted as both tied and floating (Chip level) |
| s_72_chipint.1 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| chipint.1: areaid.ld not allowed within 50.0 um of ESDID |
| s_73_chipint.2 |
| 0 0 2 Dec 2 07:20:08 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| chipint.2: areaid.ij not allowed within 150.0 um of ESDID |
| s_11_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Nets on poly is floating |
| s_12_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating poly marked with poly_tie at chiplevel without connecting |
| s_10_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: poly marked with poly_float not floating |
| s_9_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating poly_float or poly_tie text not over poly |
| s_19_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating m1_float or m1_tie text not over met1 |
| s_16_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Nets on li1 is floating |
| s_17_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating li1 marked with li1_tie at chiplevel without connecting |
| s_24_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating m2_float or m2_tie text not over met2 |
| s_15_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: li1 marked with li1_float not floating |
| s_14_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating li1_float or li1_tie text not over li1 |
| s_29_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating m3_float or m3_tie text not over met3 |
| s_30_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: met3 marked with m3_float not floating |
| s_31_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Nets on met3 is floating |
| s_32_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating met3 marked with m3_tie at chiplevel without connecting |
| s_36_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Nets on met4 is floating |
| s_37_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating met4 marked with m4_tie at chiplevel without connecting |
| s_35_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: met4 marked with m4_float not floating |
| s_34_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating m4_float or m4_tie text not over met4 |
| s_40_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: met5 marked with m5_float not floating |
| s_41_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Nets on met5 is floating |
| s_42_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating met5 marked with m5_tie at chiplevel without connecting |
| s_39_X.22 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| X.22: Floating m5_float or m5_tie text not over met5 |
| s_44_m1.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m1.x.1: <70% metal density when 700x700 window 100% covered by mm1.waffledrop |
| s_45_m1.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m1.x.1: <65% metal density when 700x700 window 80-100% covered by mm1.waffledrop |
| s_46_m1.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m1.x.1: <60% metal density when 700x700 window 60-80% covered by mm1.waffledrop |
| s_47_m1.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m1.x.1: <50% metal density when 700x700 window 50-60% covered by mm1.waffledrop |
| s_48_m1.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m1.x.1: <40% metal density when 700x700 window 40-50% covered by mm1.waffledrop |
| s_49_m1.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m1.x.1: <30% metal density when 700x700 window 30-40% covered by mm1.waffledrop |
| s_51_m2.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m2.x.1: <65% metal density when 700x700 window 80-100% covered by mm2.waffledrop |
| s_50_m2.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m2.x.1: <70% metal density when 700x700 window 100% covered by mm2.waffledrop |
| s_52_m2.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m2.x.1: <60% metal density when 700x700 window 60-80% covered by mm2.waffledrop |
| s_53_m2.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m2.x.1: <50% metal density when 700x700 window 50-60% covered by mm2.waffledrop |
| s_54_m2.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m2.x.1: <40% metal density when 700x700 window 40-50% covered by mm2.waffledrop |
| s_55_m2.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m2.x.1: <30% metal density when 700x700 window 30-40% covered by mm2.waffledrop |
| s_56_m3.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m3.x.1: <70% metal density when 700x700 window 100% covered by mm3.waffledrop |
| s_57_m3.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m3.x.1: <65% metal density when 700x700 window 80-100% covered by mm3.waffledrop |
| s_58_m3.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m3.x.1: <60% metal density when 700x700 window 60-80% covered by mm3.waffledrop |
| s_59_m3.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m3.x.1: <50% metal density when 700x700 window 50-60% covered by mm3.waffledrop |
| s_60_m3.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m3.x.1: <40% metal density when 700x700 window 40-50% covered by mm3.waffledrop |
| s_61_m3.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m3.x.1: <30% metal density when 700x700 window 30-40% covered by mm3.waffledrop |
| s_62_m4.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m4.x.1: <70% metal density when 700x700 window 100% covered by mm4.waffledrop |
| s_63_m4.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m4.x.1: <65% metal density when 700x700 window 80-100% covered by mm4.waffledrop |
| s_64_m4.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m4.x.1: <60% metal density when 700x700 window 60-80% covered by mm4.waffledrop |
| s_65_m4.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m4.x.1: <50% metal density when 700x700 window 50-60% covered by mm4.waffledrop |
| s_66_m4.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m4.x.1: <40% metal density when 700x700 window 40-50% covered by mm4.waffledrop |
| s_67_m4.x.1 |
| 0 0 2 Dec 2 07:20:09 2019 |
| Rule File Pathname: /cadfiles/EfabLess/DRC2/calibre_rundir/drc/_s8_drcRules_ |
| m4.x.1: <30% metal density when 700x700 window 30-40% covered by mm4.waffledrop |
