1. ac90ef0 Libraries for most recent addition - 12T_hs is missing NLOWVT model by HunterLusk · 1 year, 1 month ago main
  2. fe8924a NEW CELL ADDITIONS: Negative D-Latch, Positive Clock Gate, Negative Clock Gate by HunterLusk · 1 year, 1 month ago
  3. 6af093f Fix verilog files by Teodor-Dumitru Ene · 1 year, 3 months ago
  4. f1eef84 Add latch cells to library by Teo Ene · 1 year, 7 months ago
  5. bb1c7a8 Updated files from the spring of 2021 by Hunter Lusk · 1 year, 10 months ago
  6. 76f0bb9 Fixed accidental adding of ls libraries to the wrong folder by Teo Ene · 2 years, 3 months ago
  7. d80f657 Update to MMMC timing files by Teo Ene · 2 years, 3 months ago
  8. f60f2d0 Fixed a bug with sky130_osu_sc_12T_ms__inv_l and added sky130_osu_sc_12T_ms__dffnr_l / sky130_osu_sc_12T_ms__dffnr_1 for project use by Teo Ene · 2 years, 4 months ago
  9. 87ca777 Fixed rail via bug by Teo Ene · 2 years, 6 months ago
  10. a0ee71a All files; characterization pending due to license starvation by Teo Ene · 2 years, 7 months ago