verilog: Fixing power pins usage in non-powerpin mode. Previously even when `USE_POWER_PIN` was not defined, the drive strength wrappers where still defining the power pins as ports. Fixes https://github.com/google/skywater-pdk/issues/181 Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>

diff --git a/cells/a2111o/sky130_fd_sc_ms__a2111o_1.v b/cells/a2111o/sky130_fd_sc_ms__a2111o_1.v
index 4bda564..fefec24 100644
--- a/cells/a2111o/sky130_fd_sc_ms__a2111o_1.v
+++ b/cells/a2111o/sky130_fd_sc_ms__a2111o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a2111o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111o/sky130_fd_sc_ms__a2111o_2.v b/cells/a2111o/sky130_fd_sc_ms__a2111o_2.v
index f7e0407..22a2d32 100644
--- a/cells/a2111o/sky130_fd_sc_ms__a2111o_2.v
+++ b/cells/a2111o/sky130_fd_sc_ms__a2111o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a2111o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111o/sky130_fd_sc_ms__a2111o_4.v b/cells/a2111o/sky130_fd_sc_ms__a2111o_4.v
index 7fe6da1..8481ee1 100644
--- a/cells/a2111o/sky130_fd_sc_ms__a2111o_4.v
+++ b/cells/a2111o/sky130_fd_sc_ms__a2111o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a2111o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111oi/sky130_fd_sc_ms__a2111oi_1.v b/cells/a2111oi/sky130_fd_sc_ms__a2111oi_1.v
index 850780d..cccc16e 100644
--- a/cells/a2111oi/sky130_fd_sc_ms__a2111oi_1.v
+++ b/cells/a2111oi/sky130_fd_sc_ms__a2111oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a2111oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111oi/sky130_fd_sc_ms__a2111oi_2.v b/cells/a2111oi/sky130_fd_sc_ms__a2111oi_2.v
index 0c6a9f1..f1a9414 100644
--- a/cells/a2111oi/sky130_fd_sc_ms__a2111oi_2.v
+++ b/cells/a2111oi/sky130_fd_sc_ms__a2111oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a2111oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111oi/sky130_fd_sc_ms__a2111oi_4.v b/cells/a2111oi/sky130_fd_sc_ms__a2111oi_4.v
index ba578b8..2cc7fe2 100644
--- a/cells/a2111oi/sky130_fd_sc_ms__a2111oi_4.v
+++ b/cells/a2111oi/sky130_fd_sc_ms__a2111oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a2111oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211o/sky130_fd_sc_ms__a211o_1.v b/cells/a211o/sky130_fd_sc_ms__a211o_1.v
index 0c2007b..a11c385 100644
--- a/cells/a211o/sky130_fd_sc_ms__a211o_1.v
+++ b/cells/a211o/sky130_fd_sc_ms__a211o_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a211o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211o/sky130_fd_sc_ms__a211o_2.v b/cells/a211o/sky130_fd_sc_ms__a211o_2.v
index 63bfc1a..2748743 100644
--- a/cells/a211o/sky130_fd_sc_ms__a211o_2.v
+++ b/cells/a211o/sky130_fd_sc_ms__a211o_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a211o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211o/sky130_fd_sc_ms__a211o_4.v b/cells/a211o/sky130_fd_sc_ms__a211o_4.v
index 2b80629..70cb124 100644
--- a/cells/a211o/sky130_fd_sc_ms__a211o_4.v
+++ b/cells/a211o/sky130_fd_sc_ms__a211o_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a211o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211oi/sky130_fd_sc_ms__a211oi_1.v b/cells/a211oi/sky130_fd_sc_ms__a211oi_1.v
index dc3308a..5b14cab 100644
--- a/cells/a211oi/sky130_fd_sc_ms__a211oi_1.v
+++ b/cells/a211oi/sky130_fd_sc_ms__a211oi_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a211oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211oi/sky130_fd_sc_ms__a211oi_2.v b/cells/a211oi/sky130_fd_sc_ms__a211oi_2.v
index 7a1d0ca..0b8eeb4 100644
--- a/cells/a211oi/sky130_fd_sc_ms__a211oi_2.v
+++ b/cells/a211oi/sky130_fd_sc_ms__a211oi_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a211oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211oi/sky130_fd_sc_ms__a211oi_4.v b/cells/a211oi/sky130_fd_sc_ms__a211oi_4.v
index 852ecc5..a4cc637 100644
--- a/cells/a211oi/sky130_fd_sc_ms__a211oi_4.v
+++ b/cells/a211oi/sky130_fd_sc_ms__a211oi_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a211oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21bo/sky130_fd_sc_ms__a21bo_1.v b/cells/a21bo/sky130_fd_sc_ms__a21bo_1.v
index bdf4d33..f18ab48 100644
--- a/cells/a21bo/sky130_fd_sc_ms__a21bo_1.v
+++ b/cells/a21bo/sky130_fd_sc_ms__a21bo_1.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21bo/sky130_fd_sc_ms__a21bo_2.v b/cells/a21bo/sky130_fd_sc_ms__a21bo_2.v
index 4d44bba..cae352e 100644
--- a/cells/a21bo/sky130_fd_sc_ms__a21bo_2.v
+++ b/cells/a21bo/sky130_fd_sc_ms__a21bo_2.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21bo/sky130_fd_sc_ms__a21bo_4.v b/cells/a21bo/sky130_fd_sc_ms__a21bo_4.v
index 25b66d3..900ac74 100644
--- a/cells/a21bo/sky130_fd_sc_ms__a21bo_4.v
+++ b/cells/a21bo/sky130_fd_sc_ms__a21bo_4.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21boi/sky130_fd_sc_ms__a21boi_1.v b/cells/a21boi/sky130_fd_sc_ms__a21boi_1.v
index 7225969..9ba0c58 100644
--- a/cells/a21boi/sky130_fd_sc_ms__a21boi_1.v
+++ b/cells/a21boi/sky130_fd_sc_ms__a21boi_1.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21boi/sky130_fd_sc_ms__a21boi_2.v b/cells/a21boi/sky130_fd_sc_ms__a21boi_2.v
index c5ac02c..d1f8beb 100644
--- a/cells/a21boi/sky130_fd_sc_ms__a21boi_2.v
+++ b/cells/a21boi/sky130_fd_sc_ms__a21boi_2.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21boi/sky130_fd_sc_ms__a21boi_4.v b/cells/a21boi/sky130_fd_sc_ms__a21boi_4.v
index 585080f..bb6ed45 100644
--- a/cells/a21boi/sky130_fd_sc_ms__a21boi_4.v
+++ b/cells/a21boi/sky130_fd_sc_ms__a21boi_4.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21o/sky130_fd_sc_ms__a21o_1.v b/cells/a21o/sky130_fd_sc_ms__a21o_1.v
index 2cb76cf..da8b295 100644
--- a/cells/a21o/sky130_fd_sc_ms__a21o_1.v
+++ b/cells/a21o/sky130_fd_sc_ms__a21o_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__a21o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21o/sky130_fd_sc_ms__a21o_2.v b/cells/a21o/sky130_fd_sc_ms__a21o_2.v
index 653afba..9c1f4f6 100644
--- a/cells/a21o/sky130_fd_sc_ms__a21o_2.v
+++ b/cells/a21o/sky130_fd_sc_ms__a21o_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__a21o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21o/sky130_fd_sc_ms__a21o_4.v b/cells/a21o/sky130_fd_sc_ms__a21o_4.v
index 9538714..9e401db 100644
--- a/cells/a21o/sky130_fd_sc_ms__a21o_4.v
+++ b/cells/a21o/sky130_fd_sc_ms__a21o_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__a21o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21oi/sky130_fd_sc_ms__a21oi_1.v b/cells/a21oi/sky130_fd_sc_ms__a21oi_1.v
index a96f45b..629e7e6 100644
--- a/cells/a21oi/sky130_fd_sc_ms__a21oi_1.v
+++ b/cells/a21oi/sky130_fd_sc_ms__a21oi_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__a21oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21oi/sky130_fd_sc_ms__a21oi_2.v b/cells/a21oi/sky130_fd_sc_ms__a21oi_2.v
index 088e16f..1cda40e 100644
--- a/cells/a21oi/sky130_fd_sc_ms__a21oi_2.v
+++ b/cells/a21oi/sky130_fd_sc_ms__a21oi_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__a21oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21oi/sky130_fd_sc_ms__a21oi_4.v b/cells/a21oi/sky130_fd_sc_ms__a21oi_4.v
index 72f80f1..6fe95b1 100644
--- a/cells/a21oi/sky130_fd_sc_ms__a21oi_4.v
+++ b/cells/a21oi/sky130_fd_sc_ms__a21oi_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__a21oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221o/sky130_fd_sc_ms__a221o_1.v b/cells/a221o/sky130_fd_sc_ms__a221o_1.v
index 02d99b4..9b8b328 100644
--- a/cells/a221o/sky130_fd_sc_ms__a221o_1.v
+++ b/cells/a221o/sky130_fd_sc_ms__a221o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a221o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221o/sky130_fd_sc_ms__a221o_2.v b/cells/a221o/sky130_fd_sc_ms__a221o_2.v
index 9937d5d..f1f79a3 100644
--- a/cells/a221o/sky130_fd_sc_ms__a221o_2.v
+++ b/cells/a221o/sky130_fd_sc_ms__a221o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a221o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221o/sky130_fd_sc_ms__a221o_4.v b/cells/a221o/sky130_fd_sc_ms__a221o_4.v
index e6cfab8..61202f5 100644
--- a/cells/a221o/sky130_fd_sc_ms__a221o_4.v
+++ b/cells/a221o/sky130_fd_sc_ms__a221o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a221o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221oi/sky130_fd_sc_ms__a221oi_1.v b/cells/a221oi/sky130_fd_sc_ms__a221oi_1.v
index 9e27d0a..4cbd848 100644
--- a/cells/a221oi/sky130_fd_sc_ms__a221oi_1.v
+++ b/cells/a221oi/sky130_fd_sc_ms__a221oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a221oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221oi/sky130_fd_sc_ms__a221oi_2.v b/cells/a221oi/sky130_fd_sc_ms__a221oi_2.v
index 5786afc..d26c44e 100644
--- a/cells/a221oi/sky130_fd_sc_ms__a221oi_2.v
+++ b/cells/a221oi/sky130_fd_sc_ms__a221oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a221oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221oi/sky130_fd_sc_ms__a221oi_4.v b/cells/a221oi/sky130_fd_sc_ms__a221oi_4.v
index ee35963..7287984 100644
--- a/cells/a221oi/sky130_fd_sc_ms__a221oi_4.v
+++ b/cells/a221oi/sky130_fd_sc_ms__a221oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a221oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a222o/sky130_fd_sc_ms__a222o_1.v b/cells/a222o/sky130_fd_sc_ms__a222o_1.v
index 727a4ea..cf77f40 100644
--- a/cells/a222o/sky130_fd_sc_ms__a222o_1.v
+++ b/cells/a222o/sky130_fd_sc_ms__a222o_1.v

@@ -86,30 +86,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__a222o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    C2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1,
+    C2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  C2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
+    input  C2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a222o/sky130_fd_sc_ms__a222o_2.v b/cells/a222o/sky130_fd_sc_ms__a222o_2.v
index 464f981..798598d 100644
--- a/cells/a222o/sky130_fd_sc_ms__a222o_2.v
+++ b/cells/a222o/sky130_fd_sc_ms__a222o_2.v

@@ -86,30 +86,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__a222o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    C2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1,
+    C2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  C2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
+    input  C2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a222oi/sky130_fd_sc_ms__a222oi_1.v b/cells/a222oi/sky130_fd_sc_ms__a222oi_1.v
index f7c416e..ef06757 100644
--- a/cells/a222oi/sky130_fd_sc_ms__a222oi_1.v
+++ b/cells/a222oi/sky130_fd_sc_ms__a222oi_1.v

@@ -86,30 +86,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__a222oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    C2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1,
+    C2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  C2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
+    input  C2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a222oi/sky130_fd_sc_ms__a222oi_2.v b/cells/a222oi/sky130_fd_sc_ms__a222oi_2.v
index 8ef36e7..c16b40a 100644
--- a/cells/a222oi/sky130_fd_sc_ms__a222oi_2.v
+++ b/cells/a222oi/sky130_fd_sc_ms__a222oi_2.v

@@ -86,30 +86,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__a222oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    C2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1,
+    C2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  C2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
+    input  C2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22o/sky130_fd_sc_ms__a22o_1.v b/cells/a22o/sky130_fd_sc_ms__a22o_1.v
index f93e2ac..9242de4 100644
--- a/cells/a22o/sky130_fd_sc_ms__a22o_1.v
+++ b/cells/a22o/sky130_fd_sc_ms__a22o_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a22o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22o/sky130_fd_sc_ms__a22o_2.v b/cells/a22o/sky130_fd_sc_ms__a22o_2.v
index 1c7bf34..2a98fc1 100644
--- a/cells/a22o/sky130_fd_sc_ms__a22o_2.v
+++ b/cells/a22o/sky130_fd_sc_ms__a22o_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a22o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22o/sky130_fd_sc_ms__a22o_4.v b/cells/a22o/sky130_fd_sc_ms__a22o_4.v
index 13cc2d3..f92aa72 100644
--- a/cells/a22o/sky130_fd_sc_ms__a22o_4.v
+++ b/cells/a22o/sky130_fd_sc_ms__a22o_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a22o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22oi/sky130_fd_sc_ms__a22oi_1.v b/cells/a22oi/sky130_fd_sc_ms__a22oi_1.v
index 07a81a9..290d97b 100644
--- a/cells/a22oi/sky130_fd_sc_ms__a22oi_1.v
+++ b/cells/a22oi/sky130_fd_sc_ms__a22oi_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a22oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22oi/sky130_fd_sc_ms__a22oi_2.v b/cells/a22oi/sky130_fd_sc_ms__a22oi_2.v
index a60cd96..ce181ff 100644
--- a/cells/a22oi/sky130_fd_sc_ms__a22oi_2.v
+++ b/cells/a22oi/sky130_fd_sc_ms__a22oi_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a22oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22oi/sky130_fd_sc_ms__a22oi_4.v b/cells/a22oi/sky130_fd_sc_ms__a22oi_4.v
index 5481d23..6bb2617 100644
--- a/cells/a22oi/sky130_fd_sc_ms__a22oi_4.v
+++ b/cells/a22oi/sky130_fd_sc_ms__a22oi_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a22oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_1.v b/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_1.v
index 7e575b0..c6fb732 100644
--- a/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_1.v
+++ b/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_1.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_2.v b/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_2.v
index 2108479..cce7864 100644
--- a/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_2.v
+++ b/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_2.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_4.v b/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_4.v
index b877499..4048ed9 100644
--- a/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_4.v
+++ b/cells/a2bb2o/sky130_fd_sc_ms__a2bb2o_4.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_1.v b/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_1.v
index bfbffd2..2bf2a17 100644
--- a/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_1.v
+++ b/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_1.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_2.v b/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_2.v
index 7cb247e..c492ece 100644
--- a/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_2.v
+++ b/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_2.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_4.v b/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_4.v
index 2178b20..ab17b3f 100644
--- a/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_4.v
+++ b/cells/a2bb2oi/sky130_fd_sc_ms__a2bb2oi_4.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311o/sky130_fd_sc_ms__a311o_1.v b/cells/a311o/sky130_fd_sc_ms__a311o_1.v
index 5cd3ebf..b508943 100644
--- a/cells/a311o/sky130_fd_sc_ms__a311o_1.v
+++ b/cells/a311o/sky130_fd_sc_ms__a311o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a311o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311o/sky130_fd_sc_ms__a311o_2.v b/cells/a311o/sky130_fd_sc_ms__a311o_2.v
index 20d0cdb..4cdc2a1 100644
--- a/cells/a311o/sky130_fd_sc_ms__a311o_2.v
+++ b/cells/a311o/sky130_fd_sc_ms__a311o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a311o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311o/sky130_fd_sc_ms__a311o_4.v b/cells/a311o/sky130_fd_sc_ms__a311o_4.v
index eeddf5c..63cf7ce 100644
--- a/cells/a311o/sky130_fd_sc_ms__a311o_4.v
+++ b/cells/a311o/sky130_fd_sc_ms__a311o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a311o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311oi/sky130_fd_sc_ms__a311oi_1.v b/cells/a311oi/sky130_fd_sc_ms__a311oi_1.v
index 1adeede..04e8322 100644
--- a/cells/a311oi/sky130_fd_sc_ms__a311oi_1.v
+++ b/cells/a311oi/sky130_fd_sc_ms__a311oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a311oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311oi/sky130_fd_sc_ms__a311oi_2.v b/cells/a311oi/sky130_fd_sc_ms__a311oi_2.v
index fb7dcbc..d1fee7e 100644
--- a/cells/a311oi/sky130_fd_sc_ms__a311oi_2.v
+++ b/cells/a311oi/sky130_fd_sc_ms__a311oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a311oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311oi/sky130_fd_sc_ms__a311oi_4.v b/cells/a311oi/sky130_fd_sc_ms__a311oi_4.v
index 94b2c1d..0826571 100644
--- a/cells/a311oi/sky130_fd_sc_ms__a311oi_4.v
+++ b/cells/a311oi/sky130_fd_sc_ms__a311oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a311oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31o/sky130_fd_sc_ms__a31o_1.v b/cells/a31o/sky130_fd_sc_ms__a31o_1.v
index 552daec..0e08e3c 100644
--- a/cells/a31o/sky130_fd_sc_ms__a31o_1.v
+++ b/cells/a31o/sky130_fd_sc_ms__a31o_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a31o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31o/sky130_fd_sc_ms__a31o_2.v b/cells/a31o/sky130_fd_sc_ms__a31o_2.v
index e026bd2..eb77d0a 100644
--- a/cells/a31o/sky130_fd_sc_ms__a31o_2.v
+++ b/cells/a31o/sky130_fd_sc_ms__a31o_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a31o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31o/sky130_fd_sc_ms__a31o_4.v b/cells/a31o/sky130_fd_sc_ms__a31o_4.v
index 070ac89..dbbc90d 100644
--- a/cells/a31o/sky130_fd_sc_ms__a31o_4.v
+++ b/cells/a31o/sky130_fd_sc_ms__a31o_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a31o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31oi/sky130_fd_sc_ms__a31oi_1.v b/cells/a31oi/sky130_fd_sc_ms__a31oi_1.v
index d12aa23..54c6147 100644
--- a/cells/a31oi/sky130_fd_sc_ms__a31oi_1.v
+++ b/cells/a31oi/sky130_fd_sc_ms__a31oi_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a31oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31oi/sky130_fd_sc_ms__a31oi_2.v b/cells/a31oi/sky130_fd_sc_ms__a31oi_2.v
index 100be90..891f4a5 100644
--- a/cells/a31oi/sky130_fd_sc_ms__a31oi_2.v
+++ b/cells/a31oi/sky130_fd_sc_ms__a31oi_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a31oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31oi/sky130_fd_sc_ms__a31oi_4.v b/cells/a31oi/sky130_fd_sc_ms__a31oi_4.v
index 28b978c..fb99d29 100644
--- a/cells/a31oi/sky130_fd_sc_ms__a31oi_4.v
+++ b/cells/a31oi/sky130_fd_sc_ms__a31oi_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__a31oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32o/sky130_fd_sc_ms__a32o_1.v b/cells/a32o/sky130_fd_sc_ms__a32o_1.v
index 6f2c736..d7bf694 100644
--- a/cells/a32o/sky130_fd_sc_ms__a32o_1.v
+++ b/cells/a32o/sky130_fd_sc_ms__a32o_1.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a32o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32o/sky130_fd_sc_ms__a32o_2.v b/cells/a32o/sky130_fd_sc_ms__a32o_2.v
index 33e92ea..d87f52d 100644
--- a/cells/a32o/sky130_fd_sc_ms__a32o_2.v
+++ b/cells/a32o/sky130_fd_sc_ms__a32o_2.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a32o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32o/sky130_fd_sc_ms__a32o_4.v b/cells/a32o/sky130_fd_sc_ms__a32o_4.v
index 46e68d3..71c487f 100644
--- a/cells/a32o/sky130_fd_sc_ms__a32o_4.v
+++ b/cells/a32o/sky130_fd_sc_ms__a32o_4.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a32o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32oi/sky130_fd_sc_ms__a32oi_1.v b/cells/a32oi/sky130_fd_sc_ms__a32oi_1.v
index 64d6951..2ed6b32 100644
--- a/cells/a32oi/sky130_fd_sc_ms__a32oi_1.v
+++ b/cells/a32oi/sky130_fd_sc_ms__a32oi_1.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a32oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32oi/sky130_fd_sc_ms__a32oi_2.v b/cells/a32oi/sky130_fd_sc_ms__a32oi_2.v
index 00ac2ef..dbf6af2 100644
--- a/cells/a32oi/sky130_fd_sc_ms__a32oi_2.v
+++ b/cells/a32oi/sky130_fd_sc_ms__a32oi_2.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a32oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32oi/sky130_fd_sc_ms__a32oi_4.v b/cells/a32oi/sky130_fd_sc_ms__a32oi_4.v
index c09e212..0f3442b 100644
--- a/cells/a32oi/sky130_fd_sc_ms__a32oi_4.v
+++ b/cells/a32oi/sky130_fd_sc_ms__a32oi_4.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a32oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41o/sky130_fd_sc_ms__a41o_1.v b/cells/a41o/sky130_fd_sc_ms__a41o_1.v
index fdc1145..5dc474d 100644
--- a/cells/a41o/sky130_fd_sc_ms__a41o_1.v
+++ b/cells/a41o/sky130_fd_sc_ms__a41o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a41o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41o/sky130_fd_sc_ms__a41o_2.v b/cells/a41o/sky130_fd_sc_ms__a41o_2.v
index af02b84..36e019b 100644
--- a/cells/a41o/sky130_fd_sc_ms__a41o_2.v
+++ b/cells/a41o/sky130_fd_sc_ms__a41o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a41o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41o/sky130_fd_sc_ms__a41o_4.v b/cells/a41o/sky130_fd_sc_ms__a41o_4.v
index fa1b0fe..eccd816 100644
--- a/cells/a41o/sky130_fd_sc_ms__a41o_4.v
+++ b/cells/a41o/sky130_fd_sc_ms__a41o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a41o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41oi/sky130_fd_sc_ms__a41oi_1.v b/cells/a41oi/sky130_fd_sc_ms__a41oi_1.v
index 4bde755..0b5285d 100644
--- a/cells/a41oi/sky130_fd_sc_ms__a41oi_1.v
+++ b/cells/a41oi/sky130_fd_sc_ms__a41oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a41oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41oi/sky130_fd_sc_ms__a41oi_2.v b/cells/a41oi/sky130_fd_sc_ms__a41oi_2.v
index 982a9ad..71e274d 100644
--- a/cells/a41oi/sky130_fd_sc_ms__a41oi_2.v
+++ b/cells/a41oi/sky130_fd_sc_ms__a41oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a41oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41oi/sky130_fd_sc_ms__a41oi_4.v b/cells/a41oi/sky130_fd_sc_ms__a41oi_4.v
index fd9b5ba..2a4e448 100644
--- a/cells/a41oi/sky130_fd_sc_ms__a41oi_4.v
+++ b/cells/a41oi/sky130_fd_sc_ms__a41oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__a41oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2/sky130_fd_sc_ms__and2_1.v b/cells/and2/sky130_fd_sc_ms__and2_1.v
index a62db96..76c1f5c 100644
--- a/cells/and2/sky130_fd_sc_ms__and2_1.v
+++ b/cells/and2/sky130_fd_sc_ms__and2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__and2_1 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2/sky130_fd_sc_ms__and2_2.v b/cells/and2/sky130_fd_sc_ms__and2_2.v
index d4b0901..24b933a 100644
--- a/cells/and2/sky130_fd_sc_ms__and2_2.v
+++ b/cells/and2/sky130_fd_sc_ms__and2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__and2_2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2/sky130_fd_sc_ms__and2_4.v b/cells/and2/sky130_fd_sc_ms__and2_4.v
index 6a016c5..5d3b0f8 100644
--- a/cells/and2/sky130_fd_sc_ms__and2_4.v
+++ b/cells/and2/sky130_fd_sc_ms__and2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__and2_4 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2b/sky130_fd_sc_ms__and2b_1.v b/cells/and2b/sky130_fd_sc_ms__and2b_1.v
index eb2d391..e457a47 100644
--- a/cells/and2b/sky130_fd_sc_ms__and2b_1.v
+++ b/cells/and2b/sky130_fd_sc_ms__and2b_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__and2b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2b/sky130_fd_sc_ms__and2b_2.v b/cells/and2b/sky130_fd_sc_ms__and2b_2.v
index fc28ea7..71a92d4 100644
--- a/cells/and2b/sky130_fd_sc_ms__and2b_2.v
+++ b/cells/and2b/sky130_fd_sc_ms__and2b_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__and2b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2b/sky130_fd_sc_ms__and2b_4.v b/cells/and2b/sky130_fd_sc_ms__and2b_4.v
index 3e4aded..32b6cc6 100644
--- a/cells/and2b/sky130_fd_sc_ms__and2b_4.v
+++ b/cells/and2b/sky130_fd_sc_ms__and2b_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__and2b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3/sky130_fd_sc_ms__and3_1.v b/cells/and3/sky130_fd_sc_ms__and3_1.v
index 10de071..a2eab28 100644
--- a/cells/and3/sky130_fd_sc_ms__and3_1.v
+++ b/cells/and3/sky130_fd_sc_ms__and3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__and3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3/sky130_fd_sc_ms__and3_2.v b/cells/and3/sky130_fd_sc_ms__and3_2.v
index 0920628..892e079 100644
--- a/cells/and3/sky130_fd_sc_ms__and3_2.v
+++ b/cells/and3/sky130_fd_sc_ms__and3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__and3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3/sky130_fd_sc_ms__and3_4.v b/cells/and3/sky130_fd_sc_ms__and3_4.v
index a0043c2..9840df1 100644
--- a/cells/and3/sky130_fd_sc_ms__and3_4.v
+++ b/cells/and3/sky130_fd_sc_ms__and3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__and3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3b/sky130_fd_sc_ms__and3b_1.v b/cells/and3b/sky130_fd_sc_ms__and3b_1.v
index ccbf85e..d8d05fe 100644
--- a/cells/and3b/sky130_fd_sc_ms__and3b_1.v
+++ b/cells/and3b/sky130_fd_sc_ms__and3b_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__and3b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3b/sky130_fd_sc_ms__and3b_2.v b/cells/and3b/sky130_fd_sc_ms__and3b_2.v
index 3e61234..ece1cb8 100644
--- a/cells/and3b/sky130_fd_sc_ms__and3b_2.v
+++ b/cells/and3b/sky130_fd_sc_ms__and3b_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__and3b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3b/sky130_fd_sc_ms__and3b_4.v b/cells/and3b/sky130_fd_sc_ms__and3b_4.v
index 1bdbec9..f469140 100644
--- a/cells/and3b/sky130_fd_sc_ms__and3b_4.v
+++ b/cells/and3b/sky130_fd_sc_ms__and3b_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__and3b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4/sky130_fd_sc_ms__and4_1.v b/cells/and4/sky130_fd_sc_ms__and4_1.v
index 73d737c..579d71e 100644
--- a/cells/and4/sky130_fd_sc_ms__and4_1.v
+++ b/cells/and4/sky130_fd_sc_ms__and4_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4/sky130_fd_sc_ms__and4_2.v b/cells/and4/sky130_fd_sc_ms__and4_2.v
index b7044b3..a166436 100644
--- a/cells/and4/sky130_fd_sc_ms__and4_2.v
+++ b/cells/and4/sky130_fd_sc_ms__and4_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4/sky130_fd_sc_ms__and4_4.v b/cells/and4/sky130_fd_sc_ms__and4_4.v
index 9338a7c..6a26708 100644
--- a/cells/and4/sky130_fd_sc_ms__and4_4.v
+++ b/cells/and4/sky130_fd_sc_ms__and4_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4b/sky130_fd_sc_ms__and4b_1.v b/cells/and4b/sky130_fd_sc_ms__and4b_1.v
index 2e3c735..2894902 100644
--- a/cells/and4b/sky130_fd_sc_ms__and4b_1.v
+++ b/cells/and4b/sky130_fd_sc_ms__and4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4b/sky130_fd_sc_ms__and4b_2.v b/cells/and4b/sky130_fd_sc_ms__and4b_2.v
index 8a4e2c9..160b788 100644
--- a/cells/and4b/sky130_fd_sc_ms__and4b_2.v
+++ b/cells/and4b/sky130_fd_sc_ms__and4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4b/sky130_fd_sc_ms__and4b_4.v b/cells/and4b/sky130_fd_sc_ms__and4b_4.v
index 7ec780b..a72861b 100644
--- a/cells/and4b/sky130_fd_sc_ms__and4b_4.v
+++ b/cells/and4b/sky130_fd_sc_ms__and4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4bb/sky130_fd_sc_ms__and4bb_1.v b/cells/and4bb/sky130_fd_sc_ms__and4bb_1.v
index c101e16..24e01e2 100644
--- a/cells/and4bb/sky130_fd_sc_ms__and4bb_1.v
+++ b/cells/and4bb/sky130_fd_sc_ms__and4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4bb_1 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4bb/sky130_fd_sc_ms__and4bb_2.v b/cells/and4bb/sky130_fd_sc_ms__and4bb_2.v
index 811782b..4754c6f 100644
--- a/cells/and4bb/sky130_fd_sc_ms__and4bb_2.v
+++ b/cells/and4bb/sky130_fd_sc_ms__and4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4bb_2 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4bb/sky130_fd_sc_ms__and4bb_4.v b/cells/and4bb/sky130_fd_sc_ms__and4bb_4.v
index c783089..e031ee3 100644
--- a/cells/and4bb/sky130_fd_sc_ms__and4bb_4.v
+++ b/cells/and4bb/sky130_fd_sc_ms__and4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__and4bb_4 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_ms__buf_1.v b/cells/buf/sky130_fd_sc_ms__buf_1.v
index ce1315b..f43900d 100644
--- a/cells/buf/sky130_fd_sc_ms__buf_1.v
+++ b/cells/buf/sky130_fd_sc_ms__buf_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__buf_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_ms__buf_16.v b/cells/buf/sky130_fd_sc_ms__buf_16.v
index 2cb4738..1617277 100644
--- a/cells/buf/sky130_fd_sc_ms__buf_16.v
+++ b/cells/buf/sky130_fd_sc_ms__buf_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__buf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_ms__buf_2.v b/cells/buf/sky130_fd_sc_ms__buf_2.v
index 8a68bfa..4302a45 100644
--- a/cells/buf/sky130_fd_sc_ms__buf_2.v
+++ b/cells/buf/sky130_fd_sc_ms__buf_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__buf_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_ms__buf_4.v b/cells/buf/sky130_fd_sc_ms__buf_4.v
index be8d242..4f121e1 100644
--- a/cells/buf/sky130_fd_sc_ms__buf_4.v
+++ b/cells/buf/sky130_fd_sc_ms__buf_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__buf_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_ms__buf_8.v b/cells/buf/sky130_fd_sc_ms__buf_8.v
index 7eaa772..74b3457 100644
--- a/cells/buf/sky130_fd_sc_ms__buf_8.v
+++ b/cells/buf/sky130_fd_sc_ms__buf_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__buf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufbuf/sky130_fd_sc_ms__bufbuf_16.v b/cells/bufbuf/sky130_fd_sc_ms__bufbuf_16.v
index ac5400e..c4aed86 100644
--- a/cells/bufbuf/sky130_fd_sc_ms__bufbuf_16.v
+++ b/cells/bufbuf/sky130_fd_sc_ms__bufbuf_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__bufbuf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufbuf/sky130_fd_sc_ms__bufbuf_8.v b/cells/bufbuf/sky130_fd_sc_ms__bufbuf_8.v
index 6043e62..af68a56 100644
--- a/cells/bufbuf/sky130_fd_sc_ms__bufbuf_8.v
+++ b/cells/bufbuf/sky130_fd_sc_ms__bufbuf_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__bufbuf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufinv/sky130_fd_sc_ms__bufinv_16.v b/cells/bufinv/sky130_fd_sc_ms__bufinv_16.v
index 5730da9..dec8053 100644
--- a/cells/bufinv/sky130_fd_sc_ms__bufinv_16.v
+++ b/cells/bufinv/sky130_fd_sc_ms__bufinv_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__bufinv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufinv/sky130_fd_sc_ms__bufinv_8.v b/cells/bufinv/sky130_fd_sc_ms__bufinv_8.v
index 8ff7549..28c0da3 100644
--- a/cells/bufinv/sky130_fd_sc_ms__bufinv_8.v
+++ b/cells/bufinv/sky130_fd_sc_ms__bufinv_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__bufinv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_1.v b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_1.v
index 124eb68..a94da82 100644
--- a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_1.v
+++ b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkbuf_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_16.v b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_16.v
index 4415c6d..92c0200 100644
--- a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_16.v
+++ b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkbuf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_2.v b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_2.v
index 3f5fcff..d5b939e 100644
--- a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_2.v
+++ b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkbuf_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_4.v b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_4.v
index 7057f24..b095433 100644
--- a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_4.v
+++ b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkbuf_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_8.v b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_8.v
index ec1b729..e4176ab 100644
--- a/cells/clkbuf/sky130_fd_sc_ms__clkbuf_8.v
+++ b/cells/clkbuf/sky130_fd_sc_ms__clkbuf_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkbuf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlyinv3sd1/sky130_fd_sc_ms__clkdlyinv3sd1_1.v b/cells/clkdlyinv3sd1/sky130_fd_sc_ms__clkdlyinv3sd1_1.v
index 64bc90c..d17f593 100644
--- a/cells/clkdlyinv3sd1/sky130_fd_sc_ms__clkdlyinv3sd1_1.v
+++ b/cells/clkdlyinv3sd1/sky130_fd_sc_ms__clkdlyinv3sd1_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkdlyinv3sd1_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlyinv3sd2/sky130_fd_sc_ms__clkdlyinv3sd2_1.v b/cells/clkdlyinv3sd2/sky130_fd_sc_ms__clkdlyinv3sd2_1.v
index 50d2f25..c8d90ef 100644
--- a/cells/clkdlyinv3sd2/sky130_fd_sc_ms__clkdlyinv3sd2_1.v
+++ b/cells/clkdlyinv3sd2/sky130_fd_sc_ms__clkdlyinv3sd2_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkdlyinv3sd2_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlyinv3sd3/sky130_fd_sc_ms__clkdlyinv3sd3_1.v b/cells/clkdlyinv3sd3/sky130_fd_sc_ms__clkdlyinv3sd3_1.v
index 847b5ec..1c816c3 100644
--- a/cells/clkdlyinv3sd3/sky130_fd_sc_ms__clkdlyinv3sd3_1.v
+++ b/cells/clkdlyinv3sd3/sky130_fd_sc_ms__clkdlyinv3sd3_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkdlyinv3sd3_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlyinv5sd1/sky130_fd_sc_ms__clkdlyinv5sd1_1.v b/cells/clkdlyinv5sd1/sky130_fd_sc_ms__clkdlyinv5sd1_1.v
index 3a5117a..78c3748 100644
--- a/cells/clkdlyinv5sd1/sky130_fd_sc_ms__clkdlyinv5sd1_1.v
+++ b/cells/clkdlyinv5sd1/sky130_fd_sc_ms__clkdlyinv5sd1_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkdlyinv5sd1_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlyinv5sd2/sky130_fd_sc_ms__clkdlyinv5sd2_1.v b/cells/clkdlyinv5sd2/sky130_fd_sc_ms__clkdlyinv5sd2_1.v
index 361b395..79b3de1 100644
--- a/cells/clkdlyinv5sd2/sky130_fd_sc_ms__clkdlyinv5sd2_1.v
+++ b/cells/clkdlyinv5sd2/sky130_fd_sc_ms__clkdlyinv5sd2_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkdlyinv5sd2_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlyinv5sd3/sky130_fd_sc_ms__clkdlyinv5sd3_1.v b/cells/clkdlyinv5sd3/sky130_fd_sc_ms__clkdlyinv5sd3_1.v
index 7ffb33c..00b6f30 100644
--- a/cells/clkdlyinv5sd3/sky130_fd_sc_ms__clkdlyinv5sd3_1.v
+++ b/cells/clkdlyinv5sd3/sky130_fd_sc_ms__clkdlyinv5sd3_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkdlyinv5sd3_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_ms__clkinv_1.v b/cells/clkinv/sky130_fd_sc_ms__clkinv_1.v
index 1590186..7bb37bd 100644
--- a/cells/clkinv/sky130_fd_sc_ms__clkinv_1.v
+++ b/cells/clkinv/sky130_fd_sc_ms__clkinv_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkinv_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_ms__clkinv_16.v b/cells/clkinv/sky130_fd_sc_ms__clkinv_16.v
index c9493fe..b13184c 100644
--- a/cells/clkinv/sky130_fd_sc_ms__clkinv_16.v
+++ b/cells/clkinv/sky130_fd_sc_ms__clkinv_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkinv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_ms__clkinv_2.v b/cells/clkinv/sky130_fd_sc_ms__clkinv_2.v
index ef4d62c..f45c85e 100644
--- a/cells/clkinv/sky130_fd_sc_ms__clkinv_2.v
+++ b/cells/clkinv/sky130_fd_sc_ms__clkinv_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkinv_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_ms__clkinv_4.v b/cells/clkinv/sky130_fd_sc_ms__clkinv_4.v
index 8b6940c..2d3d229 100644
--- a/cells/clkinv/sky130_fd_sc_ms__clkinv_4.v
+++ b/cells/clkinv/sky130_fd_sc_ms__clkinv_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkinv_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_ms__clkinv_8.v b/cells/clkinv/sky130_fd_sc_ms__clkinv_8.v
index 63acc7f..1b03ff7 100644
--- a/cells/clkinv/sky130_fd_sc_ms__clkinv_8.v
+++ b/cells/clkinv/sky130_fd_sc_ms__clkinv_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__clkinv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/conb/sky130_fd_sc_ms__conb_1.v b/cells/conb/sky130_fd_sc_ms__conb_1.v
index d82bcdd..d6d2264 100644
--- a/cells/conb/sky130_fd_sc_ms__conb_1.v
+++ b/cells/conb/sky130_fd_sc_ms__conb_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__conb_1 (
-    HI  ,
-    LO  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    HI,
+    LO
 );
 
-    output HI  ;
-    output LO  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output HI;
+    output LO;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/decap/sky130_fd_sc_ms__decap_4.v b/cells/decap/sky130_fd_sc_ms__decap_4.v
index 897838c..ce695e9 100644
--- a/cells/decap/sky130_fd_sc_ms__decap_4.v
+++ b/cells/decap/sky130_fd_sc_ms__decap_4.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__decap_4 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__decap_4 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/decap/sky130_fd_sc_ms__decap_8.v b/cells/decap/sky130_fd_sc_ms__decap_8.v
index 255f456..c27fcba 100644
--- a/cells/decap/sky130_fd_sc_ms__decap_8.v
+++ b/cells/decap/sky130_fd_sc_ms__decap_8.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__decap_8 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__decap_8 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/dfbbn/sky130_fd_sc_ms__dfbbn_1.v b/cells/dfbbn/sky130_fd_sc_ms__dfbbn_1.v
index 430fed1..96c3717 100644
--- a/cells/dfbbn/sky130_fd_sc_ms__dfbbn_1.v
+++ b/cells/dfbbn/sky130_fd_sc_ms__dfbbn_1.v

@@ -87,11 +87,7 @@
     D      ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfbbn/sky130_fd_sc_ms__dfbbn_2.v b/cells/dfbbn/sky130_fd_sc_ms__dfbbn_2.v
index a40fc90..667c122 100644
--- a/cells/dfbbn/sky130_fd_sc_ms__dfbbn_2.v
+++ b/cells/dfbbn/sky130_fd_sc_ms__dfbbn_2.v

@@ -87,11 +87,7 @@
     D      ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfbbp/sky130_fd_sc_ms__dfbbp_1.v b/cells/dfbbp/sky130_fd_sc_ms__dfbbp_1.v
index db35031..2f8a8cf 100644
--- a/cells/dfbbp/sky130_fd_sc_ms__dfbbp_1.v
+++ b/cells/dfbbp/sky130_fd_sc_ms__dfbbp_1.v

@@ -87,11 +87,7 @@
     D      ,
     CLK    ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK    ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrbp/sky130_fd_sc_ms__dfrbp_1.v b/cells/dfrbp/sky130_fd_sc_ms__dfrbp_1.v
index 0a71ae4..ede4b2d 100644
--- a/cells/dfrbp/sky130_fd_sc_ms__dfrbp_1.v
+++ b/cells/dfrbp/sky130_fd_sc_ms__dfrbp_1.v

@@ -82,11 +82,7 @@
     Q_N    ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -94,10 +90,6 @@
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrbp/sky130_fd_sc_ms__dfrbp_2.v b/cells/dfrbp/sky130_fd_sc_ms__dfrbp_2.v
index 3d87715..85e2674 100644
--- a/cells/dfrbp/sky130_fd_sc_ms__dfrbp_2.v
+++ b/cells/dfrbp/sky130_fd_sc_ms__dfrbp_2.v

@@ -82,11 +82,7 @@
     Q_N    ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -94,10 +90,6 @@
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtn/sky130_fd_sc_ms__dfrtn_1.v b/cells/dfrtn/sky130_fd_sc_ms__dfrtn_1.v
index 370f3a4..47ec54f 100644
--- a/cells/dfrtn/sky130_fd_sc_ms__dfrtn_1.v
+++ b/cells/dfrtn/sky130_fd_sc_ms__dfrtn_1.v

@@ -79,21 +79,13 @@
     Q      ,
     CLK_N  ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK_N  ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtp/sky130_fd_sc_ms__dfrtp_1.v b/cells/dfrtp/sky130_fd_sc_ms__dfrtp_1.v
index af039a9..a35ebec 100644
--- a/cells/dfrtp/sky130_fd_sc_ms__dfrtp_1.v
+++ b/cells/dfrtp/sky130_fd_sc_ms__dfrtp_1.v

@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtp/sky130_fd_sc_ms__dfrtp_2.v b/cells/dfrtp/sky130_fd_sc_ms__dfrtp_2.v
index 719d14b..2c0642a 100644
--- a/cells/dfrtp/sky130_fd_sc_ms__dfrtp_2.v
+++ b/cells/dfrtp/sky130_fd_sc_ms__dfrtp_2.v

@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtp/sky130_fd_sc_ms__dfrtp_4.v b/cells/dfrtp/sky130_fd_sc_ms__dfrtp_4.v
index 4d3df2d..4a5815c 100644
--- a/cells/dfrtp/sky130_fd_sc_ms__dfrtp_4.v
+++ b/cells/dfrtp/sky130_fd_sc_ms__dfrtp_4.v

@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfsbp/sky130_fd_sc_ms__dfsbp_1.v b/cells/dfsbp/sky130_fd_sc_ms__dfsbp_1.v
index 68b4202..bd62065 100644
--- a/cells/dfsbp/sky130_fd_sc_ms__dfsbp_1.v
+++ b/cells/dfsbp/sky130_fd_sc_ms__dfsbp_1.v

@@ -82,11 +82,7 @@
     Q_N  ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -94,10 +90,6 @@
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfsbp/sky130_fd_sc_ms__dfsbp_2.v b/cells/dfsbp/sky130_fd_sc_ms__dfsbp_2.v
index b259963..feba861 100644
--- a/cells/dfsbp/sky130_fd_sc_ms__dfsbp_2.v
+++ b/cells/dfsbp/sky130_fd_sc_ms__dfsbp_2.v

@@ -82,11 +82,7 @@
     Q_N  ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -94,10 +90,6 @@
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfstp/sky130_fd_sc_ms__dfstp_1.v b/cells/dfstp/sky130_fd_sc_ms__dfstp_1.v
index 8612400..9a7326b 100644
--- a/cells/dfstp/sky130_fd_sc_ms__dfstp_1.v
+++ b/cells/dfstp/sky130_fd_sc_ms__dfstp_1.v

@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfstp/sky130_fd_sc_ms__dfstp_2.v b/cells/dfstp/sky130_fd_sc_ms__dfstp_2.v
index 9a1581b..f5f21c3 100644
--- a/cells/dfstp/sky130_fd_sc_ms__dfstp_2.v
+++ b/cells/dfstp/sky130_fd_sc_ms__dfstp_2.v

@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfstp/sky130_fd_sc_ms__dfstp_4.v b/cells/dfstp/sky130_fd_sc_ms__dfstp_4.v
index f8eadd1..7336c32 100644
--- a/cells/dfstp/sky130_fd_sc_ms__dfstp_4.v
+++ b/cells/dfstp/sky130_fd_sc_ms__dfstp_4.v

@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxbp/sky130_fd_sc_ms__dfxbp_1.v b/cells/dfxbp/sky130_fd_sc_ms__dfxbp_1.v
index 0c2b454..b309564 100644
--- a/cells/dfxbp/sky130_fd_sc_ms__dfxbp_1.v
+++ b/cells/dfxbp/sky130_fd_sc_ms__dfxbp_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__dfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxbp/sky130_fd_sc_ms__dfxbp_2.v b/cells/dfxbp/sky130_fd_sc_ms__dfxbp_2.v
index 95cad84..a50176a 100644
--- a/cells/dfxbp/sky130_fd_sc_ms__dfxbp_2.v
+++ b/cells/dfxbp/sky130_fd_sc_ms__dfxbp_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__dfxbp_2 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxtp/sky130_fd_sc_ms__dfxtp_1.v b/cells/dfxtp/sky130_fd_sc_ms__dfxtp_1.v
index 9f388d6..cda1db4 100644
--- a/cells/dfxtp/sky130_fd_sc_ms__dfxtp_1.v
+++ b/cells/dfxtp/sky130_fd_sc_ms__dfxtp_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__dfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxtp/sky130_fd_sc_ms__dfxtp_2.v b/cells/dfxtp/sky130_fd_sc_ms__dfxtp_2.v
index b8a9fde..eb8aec0 100644
--- a/cells/dfxtp/sky130_fd_sc_ms__dfxtp_2.v
+++ b/cells/dfxtp/sky130_fd_sc_ms__dfxtp_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__dfxtp_2 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxtp/sky130_fd_sc_ms__dfxtp_4.v b/cells/dfxtp/sky130_fd_sc_ms__dfxtp_4.v
index 7049fce..2b1ed70 100644
--- a/cells/dfxtp/sky130_fd_sc_ms__dfxtp_4.v
+++ b/cells/dfxtp/sky130_fd_sc_ms__dfxtp_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__dfxtp_4 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/diode/sky130_fd_sc_ms__diode_2.v b/cells/diode/sky130_fd_sc_ms__diode_2.v
index 53ffc43..5d92caa 100644
--- a/cells/diode/sky130_fd_sc_ms__diode_2.v
+++ b/cells/diode/sky130_fd_sc_ms__diode_2.v

@@ -66,18 +66,10 @@
 
 `celldefine
 module sky130_fd_sc_ms__diode_2 (
-    DIODE,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    DIODE
 );
 
     input DIODE;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlclkp/sky130_fd_sc_ms__dlclkp_1.v b/cells/dlclkp/sky130_fd_sc_ms__dlclkp_1.v
index 0d08296..56f6acd 100644
--- a/cells/dlclkp/sky130_fd_sc_ms__dlclkp_1.v
+++ b/cells/dlclkp/sky130_fd_sc_ms__dlclkp_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__dlclkp_1 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlclkp/sky130_fd_sc_ms__dlclkp_2.v b/cells/dlclkp/sky130_fd_sc_ms__dlclkp_2.v
index df39b23..2a73b47 100644
--- a/cells/dlclkp/sky130_fd_sc_ms__dlclkp_2.v
+++ b/cells/dlclkp/sky130_fd_sc_ms__dlclkp_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__dlclkp_2 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlclkp/sky130_fd_sc_ms__dlclkp_4.v b/cells/dlclkp/sky130_fd_sc_ms__dlclkp_4.v
index 6ed8985..dae0024 100644
--- a/cells/dlclkp/sky130_fd_sc_ms__dlclkp_4.v
+++ b/cells/dlclkp/sky130_fd_sc_ms__dlclkp_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__dlclkp_4 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbn/sky130_fd_sc_ms__dlrbn_1.v b/cells/dlrbn/sky130_fd_sc_ms__dlrbn_1.v
index 43d7acb..a483ae3 100644
--- a/cells/dlrbn/sky130_fd_sc_ms__dlrbn_1.v
+++ b/cells/dlrbn/sky130_fd_sc_ms__dlrbn_1.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbn/sky130_fd_sc_ms__dlrbn_2.v b/cells/dlrbn/sky130_fd_sc_ms__dlrbn_2.v
index beb9fed..4cb2383 100644
--- a/cells/dlrbn/sky130_fd_sc_ms__dlrbn_2.v
+++ b/cells/dlrbn/sky130_fd_sc_ms__dlrbn_2.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbp/sky130_fd_sc_ms__dlrbp_1.v b/cells/dlrbp/sky130_fd_sc_ms__dlrbp_1.v
index b779804..83276e1 100644
--- a/cells/dlrbp/sky130_fd_sc_ms__dlrbp_1.v
+++ b/cells/dlrbp/sky130_fd_sc_ms__dlrbp_1.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbp/sky130_fd_sc_ms__dlrbp_2.v b/cells/dlrbp/sky130_fd_sc_ms__dlrbp_2.v
index 780b840..a2e3f20 100644
--- a/cells/dlrbp/sky130_fd_sc_ms__dlrbp_2.v
+++ b/cells/dlrbp/sky130_fd_sc_ms__dlrbp_2.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtn/sky130_fd_sc_ms__dlrtn_1.v b/cells/dlrtn/sky130_fd_sc_ms__dlrtn_1.v
index 6326005..b4cb39c 100644
--- a/cells/dlrtn/sky130_fd_sc_ms__dlrtn_1.v
+++ b/cells/dlrtn/sky130_fd_sc_ms__dlrtn_1.v

@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtn/sky130_fd_sc_ms__dlrtn_2.v b/cells/dlrtn/sky130_fd_sc_ms__dlrtn_2.v
index 0077b7d..117e665 100644
--- a/cells/dlrtn/sky130_fd_sc_ms__dlrtn_2.v
+++ b/cells/dlrtn/sky130_fd_sc_ms__dlrtn_2.v

@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtn/sky130_fd_sc_ms__dlrtn_4.v b/cells/dlrtn/sky130_fd_sc_ms__dlrtn_4.v
index 08c9e57..b73725e 100644
--- a/cells/dlrtn/sky130_fd_sc_ms__dlrtn_4.v
+++ b/cells/dlrtn/sky130_fd_sc_ms__dlrtn_4.v

@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtp/sky130_fd_sc_ms__dlrtp_1.v b/cells/dlrtp/sky130_fd_sc_ms__dlrtp_1.v
index acd8a8c..4698c02 100644
--- a/cells/dlrtp/sky130_fd_sc_ms__dlrtp_1.v
+++ b/cells/dlrtp/sky130_fd_sc_ms__dlrtp_1.v

@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtp/sky130_fd_sc_ms__dlrtp_2.v b/cells/dlrtp/sky130_fd_sc_ms__dlrtp_2.v
index e8afe90..92f27c2 100644
--- a/cells/dlrtp/sky130_fd_sc_ms__dlrtp_2.v
+++ b/cells/dlrtp/sky130_fd_sc_ms__dlrtp_2.v

@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtp/sky130_fd_sc_ms__dlrtp_4.v b/cells/dlrtp/sky130_fd_sc_ms__dlrtp_4.v
index 32ebe83..3a480d9 100644
--- a/cells/dlrtp/sky130_fd_sc_ms__dlrtp_4.v
+++ b/cells/dlrtp/sky130_fd_sc_ms__dlrtp_4.v

@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxbn/sky130_fd_sc_ms__dlxbn_1.v b/cells/dlxbn/sky130_fd_sc_ms__dlxbn_1.v
index f270275..1e1689b 100644
--- a/cells/dlxbn/sky130_fd_sc_ms__dlxbn_1.v
+++ b/cells/dlxbn/sky130_fd_sc_ms__dlxbn_1.v

@@ -78,21 +78,13 @@
     Q     ,
     Q_N   ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     output Q_N   ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxbn/sky130_fd_sc_ms__dlxbn_2.v b/cells/dlxbn/sky130_fd_sc_ms__dlxbn_2.v
index 9f41def..fefab20 100644
--- a/cells/dlxbn/sky130_fd_sc_ms__dlxbn_2.v
+++ b/cells/dlxbn/sky130_fd_sc_ms__dlxbn_2.v

@@ -78,21 +78,13 @@
     Q     ,
     Q_N   ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     output Q_N   ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxbp/sky130_fd_sc_ms__dlxbp_1.v b/cells/dlxbp/sky130_fd_sc_ms__dlxbp_1.v
index 5f51df6..04039ae 100644
--- a/cells/dlxbp/sky130_fd_sc_ms__dlxbp_1.v
+++ b/cells/dlxbp/sky130_fd_sc_ms__dlxbp_1.v

@@ -78,21 +78,13 @@
     Q   ,
     Q_N ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     output Q_N ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtn/sky130_fd_sc_ms__dlxtn_1.v b/cells/dlxtn/sky130_fd_sc_ms__dlxtn_1.v
index bbc62a7..3edb945 100644
--- a/cells/dlxtn/sky130_fd_sc_ms__dlxtn_1.v
+++ b/cells/dlxtn/sky130_fd_sc_ms__dlxtn_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__dlxtn_1 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtn/sky130_fd_sc_ms__dlxtn_2.v b/cells/dlxtn/sky130_fd_sc_ms__dlxtn_2.v
index d24b4d8..bc7e421 100644
--- a/cells/dlxtn/sky130_fd_sc_ms__dlxtn_2.v
+++ b/cells/dlxtn/sky130_fd_sc_ms__dlxtn_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__dlxtn_2 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtn/sky130_fd_sc_ms__dlxtn_4.v b/cells/dlxtn/sky130_fd_sc_ms__dlxtn_4.v
index 89dfe81..3cc99ee 100644
--- a/cells/dlxtn/sky130_fd_sc_ms__dlxtn_4.v
+++ b/cells/dlxtn/sky130_fd_sc_ms__dlxtn_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__dlxtn_4 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtp/sky130_fd_sc_ms__dlxtp_1.v b/cells/dlxtp/sky130_fd_sc_ms__dlxtp_1.v
index 23f76a2..5b787ba 100644
--- a/cells/dlxtp/sky130_fd_sc_ms__dlxtp_1.v
+++ b/cells/dlxtp/sky130_fd_sc_ms__dlxtp_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__dlxtp_1 (
     Q   ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlygate4sd1/sky130_fd_sc_ms__dlygate4sd1_1.v b/cells/dlygate4sd1/sky130_fd_sc_ms__dlygate4sd1_1.v
index 1bffc51..7e5f3d2 100644
--- a/cells/dlygate4sd1/sky130_fd_sc_ms__dlygate4sd1_1.v
+++ b/cells/dlygate4sd1/sky130_fd_sc_ms__dlygate4sd1_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__dlygate4sd1_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlygate4sd2/sky130_fd_sc_ms__dlygate4sd2_1.v b/cells/dlygate4sd2/sky130_fd_sc_ms__dlygate4sd2_1.v
index c73bdf8..d74bd33 100644
--- a/cells/dlygate4sd2/sky130_fd_sc_ms__dlygate4sd2_1.v
+++ b/cells/dlygate4sd2/sky130_fd_sc_ms__dlygate4sd2_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__dlygate4sd2_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlygate4sd3/sky130_fd_sc_ms__dlygate4sd3_1.v b/cells/dlygate4sd3/sky130_fd_sc_ms__dlygate4sd3_1.v
index 40c5bd0..cda7d51 100644
--- a/cells/dlygate4sd3/sky130_fd_sc_ms__dlygate4sd3_1.v
+++ b/cells/dlygate4sd3/sky130_fd_sc_ms__dlygate4sd3_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__dlygate4sd3_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlymetal6s2s/sky130_fd_sc_ms__dlymetal6s2s_1.v b/cells/dlymetal6s2s/sky130_fd_sc_ms__dlymetal6s2s_1.v
index a215822..192bd68 100644
--- a/cells/dlymetal6s2s/sky130_fd_sc_ms__dlymetal6s2s_1.v
+++ b/cells/dlymetal6s2s/sky130_fd_sc_ms__dlymetal6s2s_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__dlymetal6s2s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlymetal6s4s/sky130_fd_sc_ms__dlymetal6s4s_1.v b/cells/dlymetal6s4s/sky130_fd_sc_ms__dlymetal6s4s_1.v
index 6b0d25e..dfb6e91 100644
--- a/cells/dlymetal6s4s/sky130_fd_sc_ms__dlymetal6s4s_1.v
+++ b/cells/dlymetal6s4s/sky130_fd_sc_ms__dlymetal6s4s_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__dlymetal6s4s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlymetal6s6s/sky130_fd_sc_ms__dlymetal6s6s_1.v b/cells/dlymetal6s6s/sky130_fd_sc_ms__dlymetal6s6s_1.v
index 38548ed..602ae00 100644
--- a/cells/dlymetal6s6s/sky130_fd_sc_ms__dlymetal6s6s_1.v
+++ b/cells/dlymetal6s6s/sky130_fd_sc_ms__dlymetal6s6s_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__dlymetal6s6s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_ms__ebufn_1.v b/cells/ebufn/sky130_fd_sc_ms__ebufn_1.v
index 20e892e..40511ce 100644
--- a/cells/ebufn/sky130_fd_sc_ms__ebufn_1.v
+++ b/cells/ebufn/sky130_fd_sc_ms__ebufn_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__ebufn_1 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_ms__ebufn_2.v b/cells/ebufn/sky130_fd_sc_ms__ebufn_2.v
index 098b848..b6b77b9 100644
--- a/cells/ebufn/sky130_fd_sc_ms__ebufn_2.v
+++ b/cells/ebufn/sky130_fd_sc_ms__ebufn_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__ebufn_2 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_ms__ebufn_4.v b/cells/ebufn/sky130_fd_sc_ms__ebufn_4.v
index a717e0e..5ae1954 100644
--- a/cells/ebufn/sky130_fd_sc_ms__ebufn_4.v
+++ b/cells/ebufn/sky130_fd_sc_ms__ebufn_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__ebufn_4 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_ms__ebufn_8.v b/cells/ebufn/sky130_fd_sc_ms__ebufn_8.v
index 39fb03b..e9eae53 100644
--- a/cells/ebufn/sky130_fd_sc_ms__ebufn_8.v
+++ b/cells/ebufn/sky130_fd_sc_ms__ebufn_8.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__ebufn_8 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/edfxbp/sky130_fd_sc_ms__edfxbp_1.v b/cells/edfxbp/sky130_fd_sc_ms__edfxbp_1.v
index bead12d..67bf497 100644
--- a/cells/edfxbp/sky130_fd_sc_ms__edfxbp_1.v
+++ b/cells/edfxbp/sky130_fd_sc_ms__edfxbp_1.v

@@ -79,26 +79,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__edfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    DE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    DE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  DE ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/edfxtp/sky130_fd_sc_ms__edfxtp_1.v b/cells/edfxtp/sky130_fd_sc_ms__edfxtp_1.v
index c93fe59..1948265 100644
--- a/cells/edfxtp/sky130_fd_sc_ms__edfxtp_1.v
+++ b/cells/edfxtp/sky130_fd_sc_ms__edfxtp_1.v

@@ -76,24 +76,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__edfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_ms__einvn_1.v b/cells/einvn/sky130_fd_sc_ms__einvn_1.v
index 81faba0..c2f1e1d 100644
--- a/cells/einvn/sky130_fd_sc_ms__einvn_1.v
+++ b/cells/einvn/sky130_fd_sc_ms__einvn_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__einvn_1 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_ms__einvn_2.v b/cells/einvn/sky130_fd_sc_ms__einvn_2.v
index c47db14..ba95c82 100644
--- a/cells/einvn/sky130_fd_sc_ms__einvn_2.v
+++ b/cells/einvn/sky130_fd_sc_ms__einvn_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__einvn_2 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_ms__einvn_4.v b/cells/einvn/sky130_fd_sc_ms__einvn_4.v
index 14a6c96..0653b12 100644
--- a/cells/einvn/sky130_fd_sc_ms__einvn_4.v
+++ b/cells/einvn/sky130_fd_sc_ms__einvn_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__einvn_4 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_ms__einvn_8.v b/cells/einvn/sky130_fd_sc_ms__einvn_8.v
index 5b38435..205c012 100644
--- a/cells/einvn/sky130_fd_sc_ms__einvn_8.v
+++ b/cells/einvn/sky130_fd_sc_ms__einvn_8.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_ms__einvn_8 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_ms__einvp_1.v b/cells/einvp/sky130_fd_sc_ms__einvp_1.v
index cf190cf..43155c0 100644
--- a/cells/einvp/sky130_fd_sc_ms__einvp_1.v
+++ b/cells/einvp/sky130_fd_sc_ms__einvp_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__einvp_1 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_ms__einvp_2.v b/cells/einvp/sky130_fd_sc_ms__einvp_2.v
index ccd924e..2348799 100644
--- a/cells/einvp/sky130_fd_sc_ms__einvp_2.v
+++ b/cells/einvp/sky130_fd_sc_ms__einvp_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__einvp_2 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_ms__einvp_4.v b/cells/einvp/sky130_fd_sc_ms__einvp_4.v
index 56d946e..fc13a7a 100644
--- a/cells/einvp/sky130_fd_sc_ms__einvp_4.v
+++ b/cells/einvp/sky130_fd_sc_ms__einvp_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__einvp_4 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_ms__einvp_8.v b/cells/einvp/sky130_fd_sc_ms__einvp_8.v
index 53d9fca..64a7039 100644
--- a/cells/einvp/sky130_fd_sc_ms__einvp_8.v
+++ b/cells/einvp/sky130_fd_sc_ms__einvp_8.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__einvp_8 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fa/sky130_fd_sc_ms__fa_1.v b/cells/fa/sky130_fd_sc_ms__fa_1.v
index df2d06c..b77aa5a 100644
--- a/cells/fa/sky130_fd_sc_ms__fa_1.v
+++ b/cells/fa/sky130_fd_sc_ms__fa_1.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fa/sky130_fd_sc_ms__fa_2.v b/cells/fa/sky130_fd_sc_ms__fa_2.v
index 9655974..5db6429 100644
--- a/cells/fa/sky130_fd_sc_ms__fa_2.v
+++ b/cells/fa/sky130_fd_sc_ms__fa_2.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fa/sky130_fd_sc_ms__fa_4.v b/cells/fa/sky130_fd_sc_ms__fa_4.v
index 31078f3..c5088d3 100644
--- a/cells/fa/sky130_fd_sc_ms__fa_4.v
+++ b/cells/fa/sky130_fd_sc_ms__fa_4.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fah/sky130_fd_sc_ms__fah_1.v b/cells/fah/sky130_fd_sc_ms__fah_1.v
index c675819..3a1ad81 100644
--- a/cells/fah/sky130_fd_sc_ms__fah_1.v
+++ b/cells/fah/sky130_fd_sc_ms__fah_1.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CI  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CI
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CI  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fah/sky130_fd_sc_ms__fah_2.v b/cells/fah/sky130_fd_sc_ms__fah_2.v
index 40e8a8a..6179909 100644
--- a/cells/fah/sky130_fd_sc_ms__fah_2.v
+++ b/cells/fah/sky130_fd_sc_ms__fah_2.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CI  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CI
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CI  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fah/sky130_fd_sc_ms__fah_4.v b/cells/fah/sky130_fd_sc_ms__fah_4.v
index 595fa17..e987500 100644
--- a/cells/fah/sky130_fd_sc_ms__fah_4.v
+++ b/cells/fah/sky130_fd_sc_ms__fah_4.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CI  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CI
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CI  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fahcin/sky130_fd_sc_ms__fahcin_1.v b/cells/fahcin/sky130_fd_sc_ms__fahcin_1.v
index 14f1c3e..24c6130 100644
--- a/cells/fahcin/sky130_fd_sc_ms__fahcin_1.v
+++ b/cells/fahcin/sky130_fd_sc_ms__fahcin_1.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fahcon/sky130_fd_sc_ms__fahcon_1.v b/cells/fahcon/sky130_fd_sc_ms__fahcon_1.v
index 9effb84..2a68f0d 100644
--- a/cells/fahcon/sky130_fd_sc_ms__fahcon_1.v
+++ b/cells/fahcon/sky130_fd_sc_ms__fahcon_1.v

@@ -82,11 +82,7 @@
     SUM   ,
     A     ,
     B     ,
-    CI    ,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    CI
 );
 
     output COUT_N;
@@ -94,10 +90,6 @@
     input  A     ;
     input  B     ;
     input  CI    ;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fill/sky130_fd_sc_ms__fill_1.v b/cells/fill/sky130_fd_sc_ms__fill_1.v
index 6507de6..bf92d8d 100644
--- a/cells/fill/sky130_fd_sc_ms__fill_1.v
+++ b/cells/fill/sky130_fd_sc_ms__fill_1.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__fill_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__fill_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill/sky130_fd_sc_ms__fill_2.v b/cells/fill/sky130_fd_sc_ms__fill_2.v
index c712205..097531b 100644
--- a/cells/fill/sky130_fd_sc_ms__fill_2.v
+++ b/cells/fill/sky130_fd_sc_ms__fill_2.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__fill_2 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__fill_2 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill/sky130_fd_sc_ms__fill_4.v b/cells/fill/sky130_fd_sc_ms__fill_4.v
index b910707..f8d3e1c 100644
--- a/cells/fill/sky130_fd_sc_ms__fill_4.v
+++ b/cells/fill/sky130_fd_sc_ms__fill_4.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__fill_4 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__fill_4 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill/sky130_fd_sc_ms__fill_8.v b/cells/fill/sky130_fd_sc_ms__fill_8.v
index 3a31e41..682ed9b 100644
--- a/cells/fill/sky130_fd_sc_ms__fill_8.v
+++ b/cells/fill/sky130_fd_sc_ms__fill_8.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__fill_8 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__fill_8 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill_diode/sky130_fd_sc_ms__fill_diode_2.v b/cells/fill_diode/sky130_fd_sc_ms__fill_diode_2.v
index d67f288..4b72482 100644
--- a/cells/fill_diode/sky130_fd_sc_ms__fill_diode_2.v
+++ b/cells/fill_diode/sky130_fd_sc_ms__fill_diode_2.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__fill_diode_2 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__fill_diode_2 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill_diode/sky130_fd_sc_ms__fill_diode_4.v b/cells/fill_diode/sky130_fd_sc_ms__fill_diode_4.v
index 23139d6..e5bfa17 100644
--- a/cells/fill_diode/sky130_fd_sc_ms__fill_diode_4.v
+++ b/cells/fill_diode/sky130_fd_sc_ms__fill_diode_4.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__fill_diode_4 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__fill_diode_4 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill_diode/sky130_fd_sc_ms__fill_diode_8.v b/cells/fill_diode/sky130_fd_sc_ms__fill_diode_8.v
index 85f63d1..b8ecca4 100644
--- a/cells/fill_diode/sky130_fd_sc_ms__fill_diode_8.v
+++ b/cells/fill_diode/sky130_fd_sc_ms__fill_diode_8.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__fill_diode_8 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__fill_diode_8 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/ha/sky130_fd_sc_ms__ha_1.v b/cells/ha/sky130_fd_sc_ms__ha_1.v
index ecaa56e..aeace66 100644
--- a/cells/ha/sky130_fd_sc_ms__ha_1.v
+++ b/cells/ha/sky130_fd_sc_ms__ha_1.v

@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ha/sky130_fd_sc_ms__ha_2.v b/cells/ha/sky130_fd_sc_ms__ha_2.v
index f87c7ee..849dd55 100644
--- a/cells/ha/sky130_fd_sc_ms__ha_2.v
+++ b/cells/ha/sky130_fd_sc_ms__ha_2.v

@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ha/sky130_fd_sc_ms__ha_4.v b/cells/ha/sky130_fd_sc_ms__ha_4.v
index aac721b..25be673 100644
--- a/cells/ha/sky130_fd_sc_ms__ha_4.v
+++ b/cells/ha/sky130_fd_sc_ms__ha_4.v

@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_ms__inv_1.v b/cells/inv/sky130_fd_sc_ms__inv_1.v
index 12d66ba..0a0d3d1 100644
--- a/cells/inv/sky130_fd_sc_ms__inv_1.v
+++ b/cells/inv/sky130_fd_sc_ms__inv_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__inv_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_ms__inv_16.v b/cells/inv/sky130_fd_sc_ms__inv_16.v
index ec28c02..0303635 100644
--- a/cells/inv/sky130_fd_sc_ms__inv_16.v
+++ b/cells/inv/sky130_fd_sc_ms__inv_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__inv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_ms__inv_2.v b/cells/inv/sky130_fd_sc_ms__inv_2.v
index 2a8f245..7ee77ef 100644
--- a/cells/inv/sky130_fd_sc_ms__inv_2.v
+++ b/cells/inv/sky130_fd_sc_ms__inv_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__inv_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_ms__inv_4.v b/cells/inv/sky130_fd_sc_ms__inv_4.v
index 9362fec..faf4b6a 100644
--- a/cells/inv/sky130_fd_sc_ms__inv_4.v
+++ b/cells/inv/sky130_fd_sc_ms__inv_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__inv_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_ms__inv_8.v b/cells/inv/sky130_fd_sc_ms__inv_8.v
index ab5629c..05e7ef7 100644
--- a/cells/inv/sky130_fd_sc_ms__inv_8.v
+++ b/cells/inv/sky130_fd_sc_ms__inv_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_ms__inv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/maj3/sky130_fd_sc_ms__maj3_1.v b/cells/maj3/sky130_fd_sc_ms__maj3_1.v
index dda0844..ce29feb 100644
--- a/cells/maj3/sky130_fd_sc_ms__maj3_1.v
+++ b/cells/maj3/sky130_fd_sc_ms__maj3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__maj3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/maj3/sky130_fd_sc_ms__maj3_2.v b/cells/maj3/sky130_fd_sc_ms__maj3_2.v
index 9fb14d4..87d4d99 100644
--- a/cells/maj3/sky130_fd_sc_ms__maj3_2.v
+++ b/cells/maj3/sky130_fd_sc_ms__maj3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__maj3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/maj3/sky130_fd_sc_ms__maj3_4.v b/cells/maj3/sky130_fd_sc_ms__maj3_4.v
index 4b603b5..a05a3e3 100644
--- a/cells/maj3/sky130_fd_sc_ms__maj3_4.v
+++ b/cells/maj3/sky130_fd_sc_ms__maj3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__maj3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2/sky130_fd_sc_ms__mux2_1.v b/cells/mux2/sky130_fd_sc_ms__mux2_1.v
index 4f378d0..b46fe92 100644
--- a/cells/mux2/sky130_fd_sc_ms__mux2_1.v
+++ b/cells/mux2/sky130_fd_sc_ms__mux2_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux2_1 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2/sky130_fd_sc_ms__mux2_2.v b/cells/mux2/sky130_fd_sc_ms__mux2_2.v
index 3ee249d..e2b8bcf 100644
--- a/cells/mux2/sky130_fd_sc_ms__mux2_2.v
+++ b/cells/mux2/sky130_fd_sc_ms__mux2_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux2_2 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2/sky130_fd_sc_ms__mux2_4.v b/cells/mux2/sky130_fd_sc_ms__mux2_4.v
index bcb05fa..63905e9 100644
--- a/cells/mux2/sky130_fd_sc_ms__mux2_4.v
+++ b/cells/mux2/sky130_fd_sc_ms__mux2_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux2_4 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2i/sky130_fd_sc_ms__mux2i_1.v b/cells/mux2i/sky130_fd_sc_ms__mux2i_1.v
index 41e1def..811d503 100644
--- a/cells/mux2i/sky130_fd_sc_ms__mux2i_1.v
+++ b/cells/mux2i/sky130_fd_sc_ms__mux2i_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux2i_1 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2i/sky130_fd_sc_ms__mux2i_2.v b/cells/mux2i/sky130_fd_sc_ms__mux2i_2.v
index 77ce028..ba9b4ec 100644
--- a/cells/mux2i/sky130_fd_sc_ms__mux2i_2.v
+++ b/cells/mux2i/sky130_fd_sc_ms__mux2i_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux2i_2 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2i/sky130_fd_sc_ms__mux2i_4.v b/cells/mux2i/sky130_fd_sc_ms__mux2i_4.v
index b6b94a1..c31ee1d 100644
--- a/cells/mux2i/sky130_fd_sc_ms__mux2i_4.v
+++ b/cells/mux2i/sky130_fd_sc_ms__mux2i_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux2i_4 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux4/sky130_fd_sc_ms__mux4_1.v b/cells/mux4/sky130_fd_sc_ms__mux4_1.v
index 499a91e..7fbe2a2 100644
--- a/cells/mux4/sky130_fd_sc_ms__mux4_1.v
+++ b/cells/mux4/sky130_fd_sc_ms__mux4_1.v

@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux4_1 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux4/sky130_fd_sc_ms__mux4_2.v b/cells/mux4/sky130_fd_sc_ms__mux4_2.v
index 01e7d7a..fac62b6 100644
--- a/cells/mux4/sky130_fd_sc_ms__mux4_2.v
+++ b/cells/mux4/sky130_fd_sc_ms__mux4_2.v

@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux4_2 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux4/sky130_fd_sc_ms__mux4_4.v b/cells/mux4/sky130_fd_sc_ms__mux4_4.v
index 290ef27..7ff8bb7 100644
--- a/cells/mux4/sky130_fd_sc_ms__mux4_4.v
+++ b/cells/mux4/sky130_fd_sc_ms__mux4_4.v

@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__mux4_4 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_ms__nand2_1.v b/cells/nand2/sky130_fd_sc_ms__nand2_1.v
index 679ea11..18d687c 100644
--- a/cells/nand2/sky130_fd_sc_ms__nand2_1.v
+++ b/cells/nand2/sky130_fd_sc_ms__nand2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_ms__nand2_2.v b/cells/nand2/sky130_fd_sc_ms__nand2_2.v
index d448566..3898227 100644
--- a/cells/nand2/sky130_fd_sc_ms__nand2_2.v
+++ b/cells/nand2/sky130_fd_sc_ms__nand2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_ms__nand2_4.v b/cells/nand2/sky130_fd_sc_ms__nand2_4.v
index b7bc6dd..2a5df21 100644
--- a/cells/nand2/sky130_fd_sc_ms__nand2_4.v
+++ b/cells/nand2/sky130_fd_sc_ms__nand2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_ms__nand2_8.v b/cells/nand2/sky130_fd_sc_ms__nand2_8.v
index 25b4c8e..42980b1 100644
--- a/cells/nand2/sky130_fd_sc_ms__nand2_8.v
+++ b/cells/nand2/sky130_fd_sc_ms__nand2_8.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand2_8 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2b/sky130_fd_sc_ms__nand2b_1.v b/cells/nand2b/sky130_fd_sc_ms__nand2b_1.v
index 88fffce..75ea6b9 100644
--- a/cells/nand2b/sky130_fd_sc_ms__nand2b_1.v
+++ b/cells/nand2b/sky130_fd_sc_ms__nand2b_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand2b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2b/sky130_fd_sc_ms__nand2b_2.v b/cells/nand2b/sky130_fd_sc_ms__nand2b_2.v
index 8a80aaa..860ea81 100644
--- a/cells/nand2b/sky130_fd_sc_ms__nand2b_2.v
+++ b/cells/nand2b/sky130_fd_sc_ms__nand2b_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand2b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2b/sky130_fd_sc_ms__nand2b_4.v b/cells/nand2b/sky130_fd_sc_ms__nand2b_4.v
index 12d7f7e..fc46e2d 100644
--- a/cells/nand2b/sky130_fd_sc_ms__nand2b_4.v
+++ b/cells/nand2b/sky130_fd_sc_ms__nand2b_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand2b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3/sky130_fd_sc_ms__nand3_1.v b/cells/nand3/sky130_fd_sc_ms__nand3_1.v
index 5217b15..c1f3dba 100644
--- a/cells/nand3/sky130_fd_sc_ms__nand3_1.v
+++ b/cells/nand3/sky130_fd_sc_ms__nand3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand3_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3/sky130_fd_sc_ms__nand3_2.v b/cells/nand3/sky130_fd_sc_ms__nand3_2.v
index 4f4fdf9..34e0cee 100644
--- a/cells/nand3/sky130_fd_sc_ms__nand3_2.v
+++ b/cells/nand3/sky130_fd_sc_ms__nand3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand3_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3/sky130_fd_sc_ms__nand3_4.v b/cells/nand3/sky130_fd_sc_ms__nand3_4.v
index d976676..e96cc4d 100644
--- a/cells/nand3/sky130_fd_sc_ms__nand3_4.v
+++ b/cells/nand3/sky130_fd_sc_ms__nand3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand3_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3b/sky130_fd_sc_ms__nand3b_1.v b/cells/nand3b/sky130_fd_sc_ms__nand3b_1.v
index a2feb51..ce9fb80 100644
--- a/cells/nand3b/sky130_fd_sc_ms__nand3b_1.v
+++ b/cells/nand3b/sky130_fd_sc_ms__nand3b_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand3b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3b/sky130_fd_sc_ms__nand3b_2.v b/cells/nand3b/sky130_fd_sc_ms__nand3b_2.v
index 67653a7..a7fb8c3 100644
--- a/cells/nand3b/sky130_fd_sc_ms__nand3b_2.v
+++ b/cells/nand3b/sky130_fd_sc_ms__nand3b_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand3b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3b/sky130_fd_sc_ms__nand3b_4.v b/cells/nand3b/sky130_fd_sc_ms__nand3b_4.v
index 1a642e8..7317931 100644
--- a/cells/nand3b/sky130_fd_sc_ms__nand3b_4.v
+++ b/cells/nand3b/sky130_fd_sc_ms__nand3b_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand3b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4/sky130_fd_sc_ms__nand4_1.v b/cells/nand4/sky130_fd_sc_ms__nand4_1.v
index e7d5ef1..d85f8d6 100644
--- a/cells/nand4/sky130_fd_sc_ms__nand4_1.v
+++ b/cells/nand4/sky130_fd_sc_ms__nand4_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4/sky130_fd_sc_ms__nand4_2.v b/cells/nand4/sky130_fd_sc_ms__nand4_2.v
index c43a421..0602698 100644
--- a/cells/nand4/sky130_fd_sc_ms__nand4_2.v
+++ b/cells/nand4/sky130_fd_sc_ms__nand4_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4/sky130_fd_sc_ms__nand4_4.v b/cells/nand4/sky130_fd_sc_ms__nand4_4.v
index 4fba5c9..dc0f117 100644
--- a/cells/nand4/sky130_fd_sc_ms__nand4_4.v
+++ b/cells/nand4/sky130_fd_sc_ms__nand4_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4b/sky130_fd_sc_ms__nand4b_1.v b/cells/nand4b/sky130_fd_sc_ms__nand4b_1.v
index 6eeca80..1d8573f 100644
--- a/cells/nand4b/sky130_fd_sc_ms__nand4b_1.v
+++ b/cells/nand4b/sky130_fd_sc_ms__nand4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4b/sky130_fd_sc_ms__nand4b_2.v b/cells/nand4b/sky130_fd_sc_ms__nand4b_2.v
index fd1f56f..a4ecc08 100644
--- a/cells/nand4b/sky130_fd_sc_ms__nand4b_2.v
+++ b/cells/nand4b/sky130_fd_sc_ms__nand4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4b/sky130_fd_sc_ms__nand4b_4.v b/cells/nand4b/sky130_fd_sc_ms__nand4b_4.v
index d463235..97cc2a9 100644
--- a/cells/nand4b/sky130_fd_sc_ms__nand4b_4.v
+++ b/cells/nand4b/sky130_fd_sc_ms__nand4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4bb/sky130_fd_sc_ms__nand4bb_1.v b/cells/nand4bb/sky130_fd_sc_ms__nand4bb_1.v
index 0a7dbf7..59599ff 100644
--- a/cells/nand4bb/sky130_fd_sc_ms__nand4bb_1.v
+++ b/cells/nand4bb/sky130_fd_sc_ms__nand4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4bb_1 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4bb/sky130_fd_sc_ms__nand4bb_2.v b/cells/nand4bb/sky130_fd_sc_ms__nand4bb_2.v
index bda3b74..8f48955 100644
--- a/cells/nand4bb/sky130_fd_sc_ms__nand4bb_2.v
+++ b/cells/nand4bb/sky130_fd_sc_ms__nand4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4bb_2 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4bb/sky130_fd_sc_ms__nand4bb_4.v b/cells/nand4bb/sky130_fd_sc_ms__nand4bb_4.v
index d1eaccc..cf39369 100644
--- a/cells/nand4bb/sky130_fd_sc_ms__nand4bb_4.v
+++ b/cells/nand4bb/sky130_fd_sc_ms__nand4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nand4bb_4 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_ms__nor2_1.v b/cells/nor2/sky130_fd_sc_ms__nor2_1.v
index 307c1db..41a90c9 100644
--- a/cells/nor2/sky130_fd_sc_ms__nor2_1.v
+++ b/cells/nor2/sky130_fd_sc_ms__nor2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_ms__nor2_2.v b/cells/nor2/sky130_fd_sc_ms__nor2_2.v
index 20761d3..e133d36 100644
--- a/cells/nor2/sky130_fd_sc_ms__nor2_2.v
+++ b/cells/nor2/sky130_fd_sc_ms__nor2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_ms__nor2_4.v b/cells/nor2/sky130_fd_sc_ms__nor2_4.v
index b5595e9..893dfda 100644
--- a/cells/nor2/sky130_fd_sc_ms__nor2_4.v
+++ b/cells/nor2/sky130_fd_sc_ms__nor2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_ms__nor2_8.v b/cells/nor2/sky130_fd_sc_ms__nor2_8.v
index dbcf5ec..4e3aa1f 100644
--- a/cells/nor2/sky130_fd_sc_ms__nor2_8.v
+++ b/cells/nor2/sky130_fd_sc_ms__nor2_8.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor2_8 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2b/sky130_fd_sc_ms__nor2b_1.v b/cells/nor2b/sky130_fd_sc_ms__nor2b_1.v
index 94b32ba..3a68362 100644
--- a/cells/nor2b/sky130_fd_sc_ms__nor2b_1.v
+++ b/cells/nor2b/sky130_fd_sc_ms__nor2b_1.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor2b_1 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2b/sky130_fd_sc_ms__nor2b_2.v b/cells/nor2b/sky130_fd_sc_ms__nor2b_2.v
index 60884b2..3a2542c 100644
--- a/cells/nor2b/sky130_fd_sc_ms__nor2b_2.v
+++ b/cells/nor2b/sky130_fd_sc_ms__nor2b_2.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor2b_2 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2b/sky130_fd_sc_ms__nor2b_4.v b/cells/nor2b/sky130_fd_sc_ms__nor2b_4.v
index 3f15d9a..7f883e6 100644
--- a/cells/nor2b/sky130_fd_sc_ms__nor2b_4.v
+++ b/cells/nor2b/sky130_fd_sc_ms__nor2b_4.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor2b_4 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3/sky130_fd_sc_ms__nor3_1.v b/cells/nor3/sky130_fd_sc_ms__nor3_1.v
index a5c3748..448501c 100644
--- a/cells/nor3/sky130_fd_sc_ms__nor3_1.v
+++ b/cells/nor3/sky130_fd_sc_ms__nor3_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor3_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3/sky130_fd_sc_ms__nor3_2.v b/cells/nor3/sky130_fd_sc_ms__nor3_2.v
index 15fa8bd..8425b4d 100644
--- a/cells/nor3/sky130_fd_sc_ms__nor3_2.v
+++ b/cells/nor3/sky130_fd_sc_ms__nor3_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor3_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3/sky130_fd_sc_ms__nor3_4.v b/cells/nor3/sky130_fd_sc_ms__nor3_4.v
index 4cd8219..406275c 100644
--- a/cells/nor3/sky130_fd_sc_ms__nor3_4.v
+++ b/cells/nor3/sky130_fd_sc_ms__nor3_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor3_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3b/sky130_fd_sc_ms__nor3b_1.v b/cells/nor3b/sky130_fd_sc_ms__nor3b_1.v
index c8f2b46..742dab9 100644
--- a/cells/nor3b/sky130_fd_sc_ms__nor3b_1.v
+++ b/cells/nor3b/sky130_fd_sc_ms__nor3b_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor3b_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3b/sky130_fd_sc_ms__nor3b_2.v b/cells/nor3b/sky130_fd_sc_ms__nor3b_2.v
index 3f921a3..4e846dd 100644
--- a/cells/nor3b/sky130_fd_sc_ms__nor3b_2.v
+++ b/cells/nor3b/sky130_fd_sc_ms__nor3b_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor3b_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3b/sky130_fd_sc_ms__nor3b_4.v b/cells/nor3b/sky130_fd_sc_ms__nor3b_4.v
index bb5f74f..f7fb12a 100644
--- a/cells/nor3b/sky130_fd_sc_ms__nor3b_4.v
+++ b/cells/nor3b/sky130_fd_sc_ms__nor3b_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor3b_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4/sky130_fd_sc_ms__nor4_1.v b/cells/nor4/sky130_fd_sc_ms__nor4_1.v
index 6d16f83..bc01bcf 100644
--- a/cells/nor4/sky130_fd_sc_ms__nor4_1.v
+++ b/cells/nor4/sky130_fd_sc_ms__nor4_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4/sky130_fd_sc_ms__nor4_2.v b/cells/nor4/sky130_fd_sc_ms__nor4_2.v
index c5e4437..3f8f5c5 100644
--- a/cells/nor4/sky130_fd_sc_ms__nor4_2.v
+++ b/cells/nor4/sky130_fd_sc_ms__nor4_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4/sky130_fd_sc_ms__nor4_4.v b/cells/nor4/sky130_fd_sc_ms__nor4_4.v
index 39693ae..f2e7fac 100644
--- a/cells/nor4/sky130_fd_sc_ms__nor4_4.v
+++ b/cells/nor4/sky130_fd_sc_ms__nor4_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4b/sky130_fd_sc_ms__nor4b_1.v b/cells/nor4b/sky130_fd_sc_ms__nor4b_1.v
index 2f78b58..ebbf01e 100644
--- a/cells/nor4b/sky130_fd_sc_ms__nor4b_1.v
+++ b/cells/nor4b/sky130_fd_sc_ms__nor4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4b_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4b/sky130_fd_sc_ms__nor4b_2.v b/cells/nor4b/sky130_fd_sc_ms__nor4b_2.v
index 102aedb..fc82403 100644
--- a/cells/nor4b/sky130_fd_sc_ms__nor4b_2.v
+++ b/cells/nor4b/sky130_fd_sc_ms__nor4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4b_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4b/sky130_fd_sc_ms__nor4b_4.v b/cells/nor4b/sky130_fd_sc_ms__nor4b_4.v
index f4990be..3db4014 100644
--- a/cells/nor4b/sky130_fd_sc_ms__nor4b_4.v
+++ b/cells/nor4b/sky130_fd_sc_ms__nor4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4b_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4bb/sky130_fd_sc_ms__nor4bb_1.v b/cells/nor4bb/sky130_fd_sc_ms__nor4bb_1.v
index b3325b5..2cd62f9 100644
--- a/cells/nor4bb/sky130_fd_sc_ms__nor4bb_1.v
+++ b/cells/nor4bb/sky130_fd_sc_ms__nor4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4bb_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4bb/sky130_fd_sc_ms__nor4bb_2.v b/cells/nor4bb/sky130_fd_sc_ms__nor4bb_2.v
index 08f9c3c..91b1683 100644
--- a/cells/nor4bb/sky130_fd_sc_ms__nor4bb_2.v
+++ b/cells/nor4bb/sky130_fd_sc_ms__nor4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4bb_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4bb/sky130_fd_sc_ms__nor4bb_4.v b/cells/nor4bb/sky130_fd_sc_ms__nor4bb_4.v
index 65a3148..37d58ce 100644
--- a/cells/nor4bb/sky130_fd_sc_ms__nor4bb_4.v
+++ b/cells/nor4bb/sky130_fd_sc_ms__nor4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__nor4bb_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111a/sky130_fd_sc_ms__o2111a_1.v b/cells/o2111a/sky130_fd_sc_ms__o2111a_1.v
index 1099e12..03e1dc7 100644
--- a/cells/o2111a/sky130_fd_sc_ms__o2111a_1.v
+++ b/cells/o2111a/sky130_fd_sc_ms__o2111a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o2111a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111a/sky130_fd_sc_ms__o2111a_2.v b/cells/o2111a/sky130_fd_sc_ms__o2111a_2.v
index 639762b..fe9e47b 100644
--- a/cells/o2111a/sky130_fd_sc_ms__o2111a_2.v
+++ b/cells/o2111a/sky130_fd_sc_ms__o2111a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o2111a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111a/sky130_fd_sc_ms__o2111a_4.v b/cells/o2111a/sky130_fd_sc_ms__o2111a_4.v
index 5875991..af4c152 100644
--- a/cells/o2111a/sky130_fd_sc_ms__o2111a_4.v
+++ b/cells/o2111a/sky130_fd_sc_ms__o2111a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o2111a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111ai/sky130_fd_sc_ms__o2111ai_1.v b/cells/o2111ai/sky130_fd_sc_ms__o2111ai_1.v
index 6fa56b4..cdb90cc 100644
--- a/cells/o2111ai/sky130_fd_sc_ms__o2111ai_1.v
+++ b/cells/o2111ai/sky130_fd_sc_ms__o2111ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o2111ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111ai/sky130_fd_sc_ms__o2111ai_2.v b/cells/o2111ai/sky130_fd_sc_ms__o2111ai_2.v
index 42ca901..7414e51 100644
--- a/cells/o2111ai/sky130_fd_sc_ms__o2111ai_2.v
+++ b/cells/o2111ai/sky130_fd_sc_ms__o2111ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o2111ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111ai/sky130_fd_sc_ms__o2111ai_4.v b/cells/o2111ai/sky130_fd_sc_ms__o2111ai_4.v
index d807374..a3c372e 100644
--- a/cells/o2111ai/sky130_fd_sc_ms__o2111ai_4.v
+++ b/cells/o2111ai/sky130_fd_sc_ms__o2111ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o2111ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211a/sky130_fd_sc_ms__o211a_1.v b/cells/o211a/sky130_fd_sc_ms__o211a_1.v
index 8b88ae9..955f27b 100644
--- a/cells/o211a/sky130_fd_sc_ms__o211a_1.v
+++ b/cells/o211a/sky130_fd_sc_ms__o211a_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o211a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211a/sky130_fd_sc_ms__o211a_2.v b/cells/o211a/sky130_fd_sc_ms__o211a_2.v
index 19663de..9cc9a73 100644
--- a/cells/o211a/sky130_fd_sc_ms__o211a_2.v
+++ b/cells/o211a/sky130_fd_sc_ms__o211a_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o211a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211a/sky130_fd_sc_ms__o211a_4.v b/cells/o211a/sky130_fd_sc_ms__o211a_4.v
index 7742ff1..2c97854 100644
--- a/cells/o211a/sky130_fd_sc_ms__o211a_4.v
+++ b/cells/o211a/sky130_fd_sc_ms__o211a_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o211a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211ai/sky130_fd_sc_ms__o211ai_1.v b/cells/o211ai/sky130_fd_sc_ms__o211ai_1.v
index 9a4dbff..ce2cd9e 100644
--- a/cells/o211ai/sky130_fd_sc_ms__o211ai_1.v
+++ b/cells/o211ai/sky130_fd_sc_ms__o211ai_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o211ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211ai/sky130_fd_sc_ms__o211ai_2.v b/cells/o211ai/sky130_fd_sc_ms__o211ai_2.v
index 44cf0cc..aabb72a 100644
--- a/cells/o211ai/sky130_fd_sc_ms__o211ai_2.v
+++ b/cells/o211ai/sky130_fd_sc_ms__o211ai_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o211ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211ai/sky130_fd_sc_ms__o211ai_4.v b/cells/o211ai/sky130_fd_sc_ms__o211ai_4.v
index b938870..15798df 100644
--- a/cells/o211ai/sky130_fd_sc_ms__o211ai_4.v
+++ b/cells/o211ai/sky130_fd_sc_ms__o211ai_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o211ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21a/sky130_fd_sc_ms__o21a_1.v b/cells/o21a/sky130_fd_sc_ms__o21a_1.v
index 0d50fac..37327c8 100644
--- a/cells/o21a/sky130_fd_sc_ms__o21a_1.v
+++ b/cells/o21a/sky130_fd_sc_ms__o21a_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__o21a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21a/sky130_fd_sc_ms__o21a_2.v b/cells/o21a/sky130_fd_sc_ms__o21a_2.v
index 083c0d1..64d9a5c 100644
--- a/cells/o21a/sky130_fd_sc_ms__o21a_2.v
+++ b/cells/o21a/sky130_fd_sc_ms__o21a_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__o21a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21a/sky130_fd_sc_ms__o21a_4.v b/cells/o21a/sky130_fd_sc_ms__o21a_4.v
index 24d725b..e3b8ce2 100644
--- a/cells/o21a/sky130_fd_sc_ms__o21a_4.v
+++ b/cells/o21a/sky130_fd_sc_ms__o21a_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__o21a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ai/sky130_fd_sc_ms__o21ai_1.v b/cells/o21ai/sky130_fd_sc_ms__o21ai_1.v
index cf1b123..93c6269 100644
--- a/cells/o21ai/sky130_fd_sc_ms__o21ai_1.v
+++ b/cells/o21ai/sky130_fd_sc_ms__o21ai_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__o21ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ai/sky130_fd_sc_ms__o21ai_2.v b/cells/o21ai/sky130_fd_sc_ms__o21ai_2.v
index 57539f5..cbf365f 100644
--- a/cells/o21ai/sky130_fd_sc_ms__o21ai_2.v
+++ b/cells/o21ai/sky130_fd_sc_ms__o21ai_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__o21ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ai/sky130_fd_sc_ms__o21ai_4.v b/cells/o21ai/sky130_fd_sc_ms__o21ai_4.v
index 3d0270c..90bc6fc 100644
--- a/cells/o21ai/sky130_fd_sc_ms__o21ai_4.v
+++ b/cells/o21ai/sky130_fd_sc_ms__o21ai_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__o21ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ba/sky130_fd_sc_ms__o21ba_1.v b/cells/o21ba/sky130_fd_sc_ms__o21ba_1.v
index ae94eaf..1ae1678 100644
--- a/cells/o21ba/sky130_fd_sc_ms__o21ba_1.v
+++ b/cells/o21ba/sky130_fd_sc_ms__o21ba_1.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ba/sky130_fd_sc_ms__o21ba_2.v b/cells/o21ba/sky130_fd_sc_ms__o21ba_2.v
index b1cbaac..40e5d8b 100644
--- a/cells/o21ba/sky130_fd_sc_ms__o21ba_2.v
+++ b/cells/o21ba/sky130_fd_sc_ms__o21ba_2.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ba/sky130_fd_sc_ms__o21ba_4.v b/cells/o21ba/sky130_fd_sc_ms__o21ba_4.v
index ebc8b58..3f6594d 100644
--- a/cells/o21ba/sky130_fd_sc_ms__o21ba_4.v
+++ b/cells/o21ba/sky130_fd_sc_ms__o21ba_4.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21bai/sky130_fd_sc_ms__o21bai_1.v b/cells/o21bai/sky130_fd_sc_ms__o21bai_1.v
index 5f25ed3..7a092b3 100644
--- a/cells/o21bai/sky130_fd_sc_ms__o21bai_1.v
+++ b/cells/o21bai/sky130_fd_sc_ms__o21bai_1.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21bai/sky130_fd_sc_ms__o21bai_2.v b/cells/o21bai/sky130_fd_sc_ms__o21bai_2.v
index b7a9418..15e9a2d 100644
--- a/cells/o21bai/sky130_fd_sc_ms__o21bai_2.v
+++ b/cells/o21bai/sky130_fd_sc_ms__o21bai_2.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21bai/sky130_fd_sc_ms__o21bai_4.v b/cells/o21bai/sky130_fd_sc_ms__o21bai_4.v
index 68c725e..65e8da7 100644
--- a/cells/o21bai/sky130_fd_sc_ms__o21bai_4.v
+++ b/cells/o21bai/sky130_fd_sc_ms__o21bai_4.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221a/sky130_fd_sc_ms__o221a_1.v b/cells/o221a/sky130_fd_sc_ms__o221a_1.v
index a8b0536..3b729cc 100644
--- a/cells/o221a/sky130_fd_sc_ms__o221a_1.v
+++ b/cells/o221a/sky130_fd_sc_ms__o221a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o221a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221a/sky130_fd_sc_ms__o221a_2.v b/cells/o221a/sky130_fd_sc_ms__o221a_2.v
index b5e7c1b..09829af 100644
--- a/cells/o221a/sky130_fd_sc_ms__o221a_2.v
+++ b/cells/o221a/sky130_fd_sc_ms__o221a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o221a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221a/sky130_fd_sc_ms__o221a_4.v b/cells/o221a/sky130_fd_sc_ms__o221a_4.v
index cee0603..e849d62 100644
--- a/cells/o221a/sky130_fd_sc_ms__o221a_4.v
+++ b/cells/o221a/sky130_fd_sc_ms__o221a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o221a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221ai/sky130_fd_sc_ms__o221ai_1.v b/cells/o221ai/sky130_fd_sc_ms__o221ai_1.v
index a0c79df..33c2811 100644
--- a/cells/o221ai/sky130_fd_sc_ms__o221ai_1.v
+++ b/cells/o221ai/sky130_fd_sc_ms__o221ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o221ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221ai/sky130_fd_sc_ms__o221ai_2.v b/cells/o221ai/sky130_fd_sc_ms__o221ai_2.v
index a4d836f..802f270 100644
--- a/cells/o221ai/sky130_fd_sc_ms__o221ai_2.v
+++ b/cells/o221ai/sky130_fd_sc_ms__o221ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o221ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221ai/sky130_fd_sc_ms__o221ai_4.v b/cells/o221ai/sky130_fd_sc_ms__o221ai_4.v
index 8e97969..0e8c5e0 100644
--- a/cells/o221ai/sky130_fd_sc_ms__o221ai_4.v
+++ b/cells/o221ai/sky130_fd_sc_ms__o221ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o221ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22a/sky130_fd_sc_ms__o22a_1.v b/cells/o22a/sky130_fd_sc_ms__o22a_1.v
index 8bd7d77..ff909d1 100644
--- a/cells/o22a/sky130_fd_sc_ms__o22a_1.v
+++ b/cells/o22a/sky130_fd_sc_ms__o22a_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o22a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22a/sky130_fd_sc_ms__o22a_2.v b/cells/o22a/sky130_fd_sc_ms__o22a_2.v
index 19e9f9b..493e68f 100644
--- a/cells/o22a/sky130_fd_sc_ms__o22a_2.v
+++ b/cells/o22a/sky130_fd_sc_ms__o22a_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o22a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22a/sky130_fd_sc_ms__o22a_4.v b/cells/o22a/sky130_fd_sc_ms__o22a_4.v
index d82b9c6..16cb4bb 100644
--- a/cells/o22a/sky130_fd_sc_ms__o22a_4.v
+++ b/cells/o22a/sky130_fd_sc_ms__o22a_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o22a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22ai/sky130_fd_sc_ms__o22ai_1.v b/cells/o22ai/sky130_fd_sc_ms__o22ai_1.v
index cb4a24b..94680df 100644
--- a/cells/o22ai/sky130_fd_sc_ms__o22ai_1.v
+++ b/cells/o22ai/sky130_fd_sc_ms__o22ai_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o22ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22ai/sky130_fd_sc_ms__o22ai_2.v b/cells/o22ai/sky130_fd_sc_ms__o22ai_2.v
index d40ca33..d6b8585 100644
--- a/cells/o22ai/sky130_fd_sc_ms__o22ai_2.v
+++ b/cells/o22ai/sky130_fd_sc_ms__o22ai_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o22ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22ai/sky130_fd_sc_ms__o22ai_4.v b/cells/o22ai/sky130_fd_sc_ms__o22ai_4.v
index a1e7b07..abdf746 100644
--- a/cells/o22ai/sky130_fd_sc_ms__o22ai_4.v
+++ b/cells/o22ai/sky130_fd_sc_ms__o22ai_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o22ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_1.v b/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_1.v
index 4f7798d..034ede7 100644
--- a/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_1.v
+++ b/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_1.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_2.v b/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_2.v
index 352eaab..0d6807a 100644
--- a/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_2.v
+++ b/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_2.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_4.v b/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_4.v
index 1d1e084..7630010 100644
--- a/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_4.v
+++ b/cells/o2bb2a/sky130_fd_sc_ms__o2bb2a_4.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_1.v b/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_1.v
index 85f5663..96f8596 100644
--- a/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_1.v
+++ b/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_1.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_2.v b/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_2.v
index 6d499ba..e8a72d1 100644
--- a/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_2.v
+++ b/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_2.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_4.v b/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_4.v
index 45dc584..a074ef3 100644
--- a/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_4.v
+++ b/cells/o2bb2ai/sky130_fd_sc_ms__o2bb2ai_4.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311a/sky130_fd_sc_ms__o311a_1.v b/cells/o311a/sky130_fd_sc_ms__o311a_1.v
index 032739f..861ac1a 100644
--- a/cells/o311a/sky130_fd_sc_ms__o311a_1.v
+++ b/cells/o311a/sky130_fd_sc_ms__o311a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o311a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311a/sky130_fd_sc_ms__o311a_2.v b/cells/o311a/sky130_fd_sc_ms__o311a_2.v
index c790fb5..e98bad8 100644
--- a/cells/o311a/sky130_fd_sc_ms__o311a_2.v
+++ b/cells/o311a/sky130_fd_sc_ms__o311a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o311a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311a/sky130_fd_sc_ms__o311a_4.v b/cells/o311a/sky130_fd_sc_ms__o311a_4.v
index aee0a5d..6075ec4 100644
--- a/cells/o311a/sky130_fd_sc_ms__o311a_4.v
+++ b/cells/o311a/sky130_fd_sc_ms__o311a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o311a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311ai/sky130_fd_sc_ms__o311ai_1.v b/cells/o311ai/sky130_fd_sc_ms__o311ai_1.v
index fcdc56c..3c3791d 100644
--- a/cells/o311ai/sky130_fd_sc_ms__o311ai_1.v
+++ b/cells/o311ai/sky130_fd_sc_ms__o311ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o311ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311ai/sky130_fd_sc_ms__o311ai_2.v b/cells/o311ai/sky130_fd_sc_ms__o311ai_2.v
index c012f1e..0b87ca2 100644
--- a/cells/o311ai/sky130_fd_sc_ms__o311ai_2.v
+++ b/cells/o311ai/sky130_fd_sc_ms__o311ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o311ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311ai/sky130_fd_sc_ms__o311ai_4.v b/cells/o311ai/sky130_fd_sc_ms__o311ai_4.v
index 514e12e..501c957 100644
--- a/cells/o311ai/sky130_fd_sc_ms__o311ai_4.v
+++ b/cells/o311ai/sky130_fd_sc_ms__o311ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o311ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31a/sky130_fd_sc_ms__o31a_1.v b/cells/o31a/sky130_fd_sc_ms__o31a_1.v
index e8b0a07..37b11c3 100644
--- a/cells/o31a/sky130_fd_sc_ms__o31a_1.v
+++ b/cells/o31a/sky130_fd_sc_ms__o31a_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o31a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31a/sky130_fd_sc_ms__o31a_2.v b/cells/o31a/sky130_fd_sc_ms__o31a_2.v
index 69bf183..31879ee 100644
--- a/cells/o31a/sky130_fd_sc_ms__o31a_2.v
+++ b/cells/o31a/sky130_fd_sc_ms__o31a_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o31a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31a/sky130_fd_sc_ms__o31a_4.v b/cells/o31a/sky130_fd_sc_ms__o31a_4.v
index e65512e..b31debb 100644
--- a/cells/o31a/sky130_fd_sc_ms__o31a_4.v
+++ b/cells/o31a/sky130_fd_sc_ms__o31a_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o31a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31ai/sky130_fd_sc_ms__o31ai_1.v b/cells/o31ai/sky130_fd_sc_ms__o31ai_1.v
index 024f87d..77d1bca 100644
--- a/cells/o31ai/sky130_fd_sc_ms__o31ai_1.v
+++ b/cells/o31ai/sky130_fd_sc_ms__o31ai_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o31ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31ai/sky130_fd_sc_ms__o31ai_2.v b/cells/o31ai/sky130_fd_sc_ms__o31ai_2.v
index 9d24576..da118c3 100644
--- a/cells/o31ai/sky130_fd_sc_ms__o31ai_2.v
+++ b/cells/o31ai/sky130_fd_sc_ms__o31ai_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o31ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31ai/sky130_fd_sc_ms__o31ai_4.v b/cells/o31ai/sky130_fd_sc_ms__o31ai_4.v
index e1bcf88..f64b56b 100644
--- a/cells/o31ai/sky130_fd_sc_ms__o31ai_4.v
+++ b/cells/o31ai/sky130_fd_sc_ms__o31ai_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__o31ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32a/sky130_fd_sc_ms__o32a_1.v b/cells/o32a/sky130_fd_sc_ms__o32a_1.v
index 9f488b5..bef8a2d 100644
--- a/cells/o32a/sky130_fd_sc_ms__o32a_1.v
+++ b/cells/o32a/sky130_fd_sc_ms__o32a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o32a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32a/sky130_fd_sc_ms__o32a_2.v b/cells/o32a/sky130_fd_sc_ms__o32a_2.v
index a4b6bd5..601eb66 100644
--- a/cells/o32a/sky130_fd_sc_ms__o32a_2.v
+++ b/cells/o32a/sky130_fd_sc_ms__o32a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o32a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32a/sky130_fd_sc_ms__o32a_4.v b/cells/o32a/sky130_fd_sc_ms__o32a_4.v
index 361661d..7bc1350 100644
--- a/cells/o32a/sky130_fd_sc_ms__o32a_4.v
+++ b/cells/o32a/sky130_fd_sc_ms__o32a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o32a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32ai/sky130_fd_sc_ms__o32ai_1.v b/cells/o32ai/sky130_fd_sc_ms__o32ai_1.v
index 3790cc6..a0be545 100644
--- a/cells/o32ai/sky130_fd_sc_ms__o32ai_1.v
+++ b/cells/o32ai/sky130_fd_sc_ms__o32ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o32ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32ai/sky130_fd_sc_ms__o32ai_2.v b/cells/o32ai/sky130_fd_sc_ms__o32ai_2.v
index f800ca7..d3cd301 100644
--- a/cells/o32ai/sky130_fd_sc_ms__o32ai_2.v
+++ b/cells/o32ai/sky130_fd_sc_ms__o32ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o32ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32ai/sky130_fd_sc_ms__o32ai_4.v b/cells/o32ai/sky130_fd_sc_ms__o32ai_4.v
index 849763f..b60a82b 100644
--- a/cells/o32ai/sky130_fd_sc_ms__o32ai_4.v
+++ b/cells/o32ai/sky130_fd_sc_ms__o32ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o32ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41a/sky130_fd_sc_ms__o41a_1.v b/cells/o41a/sky130_fd_sc_ms__o41a_1.v
index 909ff7d..2812ec6 100644
--- a/cells/o41a/sky130_fd_sc_ms__o41a_1.v
+++ b/cells/o41a/sky130_fd_sc_ms__o41a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o41a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41a/sky130_fd_sc_ms__o41a_2.v b/cells/o41a/sky130_fd_sc_ms__o41a_2.v
index 4b18b1b..993753e 100644
--- a/cells/o41a/sky130_fd_sc_ms__o41a_2.v
+++ b/cells/o41a/sky130_fd_sc_ms__o41a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o41a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41a/sky130_fd_sc_ms__o41a_4.v b/cells/o41a/sky130_fd_sc_ms__o41a_4.v
index dc2802a..7e709f9 100644
--- a/cells/o41a/sky130_fd_sc_ms__o41a_4.v
+++ b/cells/o41a/sky130_fd_sc_ms__o41a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o41a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41ai/sky130_fd_sc_ms__o41ai_1.v b/cells/o41ai/sky130_fd_sc_ms__o41ai_1.v
index f94a836..bdef573 100644
--- a/cells/o41ai/sky130_fd_sc_ms__o41ai_1.v
+++ b/cells/o41ai/sky130_fd_sc_ms__o41ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o41ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41ai/sky130_fd_sc_ms__o41ai_2.v b/cells/o41ai/sky130_fd_sc_ms__o41ai_2.v
index 5296503..58f5b31 100644
--- a/cells/o41ai/sky130_fd_sc_ms__o41ai_2.v
+++ b/cells/o41ai/sky130_fd_sc_ms__o41ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o41ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41ai/sky130_fd_sc_ms__o41ai_4.v b/cells/o41ai/sky130_fd_sc_ms__o41ai_4.v
index f607808..4d377e9 100644
--- a/cells/o41ai/sky130_fd_sc_ms__o41ai_4.v
+++ b/cells/o41ai/sky130_fd_sc_ms__o41ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__o41ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2/sky130_fd_sc_ms__or2_1.v b/cells/or2/sky130_fd_sc_ms__or2_1.v
index 1e0956f..77cbe46 100644
--- a/cells/or2/sky130_fd_sc_ms__or2_1.v
+++ b/cells/or2/sky130_fd_sc_ms__or2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__or2_1 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2/sky130_fd_sc_ms__or2_2.v b/cells/or2/sky130_fd_sc_ms__or2_2.v
index de47e42..a3e3018 100644
--- a/cells/or2/sky130_fd_sc_ms__or2_2.v
+++ b/cells/or2/sky130_fd_sc_ms__or2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__or2_2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2/sky130_fd_sc_ms__or2_4.v b/cells/or2/sky130_fd_sc_ms__or2_4.v
index 78aadc8..a8bca43 100644
--- a/cells/or2/sky130_fd_sc_ms__or2_4.v
+++ b/cells/or2/sky130_fd_sc_ms__or2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__or2_4 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2b/sky130_fd_sc_ms__or2b_1.v b/cells/or2b/sky130_fd_sc_ms__or2b_1.v
index d76649e..c9b7e21 100644
--- a/cells/or2b/sky130_fd_sc_ms__or2b_1.v
+++ b/cells/or2b/sky130_fd_sc_ms__or2b_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__or2b_1 (
-    X   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2b/sky130_fd_sc_ms__or2b_2.v b/cells/or2b/sky130_fd_sc_ms__or2b_2.v
index 62499a9..4f0dcbe 100644
--- a/cells/or2b/sky130_fd_sc_ms__or2b_2.v
+++ b/cells/or2b/sky130_fd_sc_ms__or2b_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__or2b_2 (
-    X   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2b/sky130_fd_sc_ms__or2b_4.v b/cells/or2b/sky130_fd_sc_ms__or2b_4.v
index 2780f60..23d5928 100644
--- a/cells/or2b/sky130_fd_sc_ms__or2b_4.v
+++ b/cells/or2b/sky130_fd_sc_ms__or2b_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__or2b_4 (
-    X   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3/sky130_fd_sc_ms__or3_1.v b/cells/or3/sky130_fd_sc_ms__or3_1.v
index f506950..fac0bae 100644
--- a/cells/or3/sky130_fd_sc_ms__or3_1.v
+++ b/cells/or3/sky130_fd_sc_ms__or3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__or3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3/sky130_fd_sc_ms__or3_2.v b/cells/or3/sky130_fd_sc_ms__or3_2.v
index 79896e2..3566adc 100644
--- a/cells/or3/sky130_fd_sc_ms__or3_2.v
+++ b/cells/or3/sky130_fd_sc_ms__or3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__or3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3/sky130_fd_sc_ms__or3_4.v b/cells/or3/sky130_fd_sc_ms__or3_4.v
index 58a4106..b7a9cae 100644
--- a/cells/or3/sky130_fd_sc_ms__or3_4.v
+++ b/cells/or3/sky130_fd_sc_ms__or3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__or3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3b/sky130_fd_sc_ms__or3b_1.v b/cells/or3b/sky130_fd_sc_ms__or3b_1.v
index 8871e01..38f7784 100644
--- a/cells/or3b/sky130_fd_sc_ms__or3b_1.v
+++ b/cells/or3b/sky130_fd_sc_ms__or3b_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__or3b_1 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3b/sky130_fd_sc_ms__or3b_2.v b/cells/or3b/sky130_fd_sc_ms__or3b_2.v
index 3ece2ac..77d2744 100644
--- a/cells/or3b/sky130_fd_sc_ms__or3b_2.v
+++ b/cells/or3b/sky130_fd_sc_ms__or3b_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__or3b_2 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3b/sky130_fd_sc_ms__or3b_4.v b/cells/or3b/sky130_fd_sc_ms__or3b_4.v
index 68d94eb..dde26be 100644
--- a/cells/or3b/sky130_fd_sc_ms__or3b_4.v
+++ b/cells/or3b/sky130_fd_sc_ms__or3b_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__or3b_4 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4/sky130_fd_sc_ms__or4_1.v b/cells/or4/sky130_fd_sc_ms__or4_1.v
index a691659..61d18f8 100644
--- a/cells/or4/sky130_fd_sc_ms__or4_1.v
+++ b/cells/or4/sky130_fd_sc_ms__or4_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4/sky130_fd_sc_ms__or4_2.v b/cells/or4/sky130_fd_sc_ms__or4_2.v
index bdc4d7f..f284418 100644
--- a/cells/or4/sky130_fd_sc_ms__or4_2.v
+++ b/cells/or4/sky130_fd_sc_ms__or4_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4/sky130_fd_sc_ms__or4_4.v b/cells/or4/sky130_fd_sc_ms__or4_4.v
index 0c257be..433ed0a 100644
--- a/cells/or4/sky130_fd_sc_ms__or4_4.v
+++ b/cells/or4/sky130_fd_sc_ms__or4_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4b/sky130_fd_sc_ms__or4b_1.v b/cells/or4b/sky130_fd_sc_ms__or4b_1.v
index ea27e58..6aa5ff9 100644
--- a/cells/or4b/sky130_fd_sc_ms__or4b_1.v
+++ b/cells/or4b/sky130_fd_sc_ms__or4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4b_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4b/sky130_fd_sc_ms__or4b_2.v b/cells/or4b/sky130_fd_sc_ms__or4b_2.v
index 77707fa..ae6846a 100644
--- a/cells/or4b/sky130_fd_sc_ms__or4b_2.v
+++ b/cells/or4b/sky130_fd_sc_ms__or4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4b_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4b/sky130_fd_sc_ms__or4b_4.v b/cells/or4b/sky130_fd_sc_ms__or4b_4.v
index 1963cc7..5bb9a3f 100644
--- a/cells/or4b/sky130_fd_sc_ms__or4b_4.v
+++ b/cells/or4b/sky130_fd_sc_ms__or4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4b_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4bb/sky130_fd_sc_ms__or4bb_1.v b/cells/or4bb/sky130_fd_sc_ms__or4bb_1.v
index e5312ac..7df492e 100644
--- a/cells/or4bb/sky130_fd_sc_ms__or4bb_1.v
+++ b/cells/or4bb/sky130_fd_sc_ms__or4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4bb_1 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4bb/sky130_fd_sc_ms__or4bb_2.v b/cells/or4bb/sky130_fd_sc_ms__or4bb_2.v
index cf6650c..8bb36f3 100644
--- a/cells/or4bb/sky130_fd_sc_ms__or4bb_2.v
+++ b/cells/or4bb/sky130_fd_sc_ms__or4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4bb_2 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4bb/sky130_fd_sc_ms__or4bb_4.v b/cells/or4bb/sky130_fd_sc_ms__or4bb_4.v
index a893d65..50454fc 100644
--- a/cells/or4bb/sky130_fd_sc_ms__or4bb_4.v
+++ b/cells/or4bb/sky130_fd_sc_ms__or4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__or4bb_4 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_1.v b/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_1.v
index a26a1c3..c9fd717 100644
--- a/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_1.v
+++ b/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_1.v

@@ -95,11 +95,7 @@
     SCE    ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -110,10 +106,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_2.v b/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_2.v
index 6fac51e..b8f7bbe 100644
--- a/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_2.v
+++ b/cells/sdfbbn/sky130_fd_sc_ms__sdfbbn_2.v

@@ -95,11 +95,7 @@
     SCE    ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -110,10 +106,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfbbp/sky130_fd_sc_ms__sdfbbp_1.v b/cells/sdfbbp/sky130_fd_sc_ms__sdfbbp_1.v
index d47e7e3..711110c 100644
--- a/cells/sdfbbp/sky130_fd_sc_ms__sdfbbp_1.v
+++ b/cells/sdfbbp/sky130_fd_sc_ms__sdfbbp_1.v

@@ -95,11 +95,7 @@
     SCE    ,
     CLK    ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -110,10 +106,6 @@
     input  CLK    ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_1.v b/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_1.v
index 1ecbf28..0435768 100644
--- a/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_1.v
+++ b/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_1.v

@@ -91,11 +91,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -105,10 +101,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_2.v b/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_2.v
index 4debc08..bf7ee7c 100644
--- a/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_2.v
+++ b/cells/sdfrbp/sky130_fd_sc_ms__sdfrbp_2.v

@@ -91,11 +91,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -105,10 +101,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtn/sky130_fd_sc_ms__sdfrtn_1.v b/cells/sdfrtn/sky130_fd_sc_ms__sdfrtn_1.v
index 81259ff..9249417 100644
--- a/cells/sdfrtn/sky130_fd_sc_ms__sdfrtn_1.v
+++ b/cells/sdfrtn/sky130_fd_sc_ms__sdfrtn_1.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_1.v b/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_1.v
index e95bc50..b9208a8 100644
--- a/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_1.v
+++ b/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_1.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_2.v b/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_2.v
index 371c42b..267d96c 100644
--- a/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_2.v
+++ b/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_2.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_4.v b/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_4.v
index 179314b..501a342 100644
--- a/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_4.v
+++ b/cells/sdfrtp/sky130_fd_sc_ms__sdfrtp_4.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_1.v b/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_1.v
index 964ba36..ea48386 100644
--- a/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_1.v
+++ b/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_1.v

@@ -91,11 +91,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -105,10 +101,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_2.v b/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_2.v
index 012b7e2..b62f4d8 100644
--- a/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_2.v
+++ b/cells/sdfsbp/sky130_fd_sc_ms__sdfsbp_2.v

@@ -91,11 +91,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -105,10 +101,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfstp/sky130_fd_sc_ms__sdfstp_1.v b/cells/sdfstp/sky130_fd_sc_ms__sdfstp_1.v
index db48661..22a2fb8 100644
--- a/cells/sdfstp/sky130_fd_sc_ms__sdfstp_1.v
+++ b/cells/sdfstp/sky130_fd_sc_ms__sdfstp_1.v

@@ -87,11 +87,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -100,10 +96,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfstp/sky130_fd_sc_ms__sdfstp_2.v b/cells/sdfstp/sky130_fd_sc_ms__sdfstp_2.v
index b652475..be078b2 100644
--- a/cells/sdfstp/sky130_fd_sc_ms__sdfstp_2.v
+++ b/cells/sdfstp/sky130_fd_sc_ms__sdfstp_2.v

@@ -87,11 +87,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -100,10 +96,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfstp/sky130_fd_sc_ms__sdfstp_4.v b/cells/sdfstp/sky130_fd_sc_ms__sdfstp_4.v
index 5fd2a53..3ace06f 100644
--- a/cells/sdfstp/sky130_fd_sc_ms__sdfstp_4.v
+++ b/cells/sdfstp/sky130_fd_sc_ms__sdfstp_4.v

@@ -87,11 +87,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -100,10 +96,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_1.v b/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_1.v
index 73b9386..3dd97fe 100644
--- a/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_1.v
+++ b/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_1.v

@@ -81,28 +81,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__sdfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_2.v b/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_2.v
index 50cd0c7..e100f44 100644
--- a/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_2.v
+++ b/cells/sdfxbp/sky130_fd_sc_ms__sdfxbp_2.v

@@ -81,28 +81,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__sdfxbp_2 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_1.v b/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_1.v
index 1bbf187..212f21b 100644
--- a/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_1.v
+++ b/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__sdfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_2.v b/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_2.v
index fdd3523..75275c2 100644
--- a/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_2.v
+++ b/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__sdfxtp_2 (
-    Q   ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_4.v b/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_4.v
index d2dd7e4..218ac06 100644
--- a/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_4.v
+++ b/cells/sdfxtp/sky130_fd_sc_ms__sdfxtp_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_ms__sdfxtp_4 (
-    Q   ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_1.v b/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_1.v
index b44ebb4..393d388 100644
--- a/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_1.v
+++ b/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_1.v

@@ -78,21 +78,13 @@
     GCLK,
     SCE ,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  SCE ;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_2.v b/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_2.v
index ed1a69e..bb3352b 100644
--- a/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_2.v
+++ b/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_2.v

@@ -78,21 +78,13 @@
     GCLK,
     SCE ,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  SCE ;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_4.v b/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_4.v
index e3339a5..d39432d 100644
--- a/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_4.v
+++ b/cells/sdlclkp/sky130_fd_sc_ms__sdlclkp_4.v

@@ -78,21 +78,13 @@
     GCLK,
     SCE ,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  SCE ;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_1.v b/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_1.v
index 4646542..bbf1c64 100644
--- a/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_1.v
+++ b/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_1.v

@@ -85,30 +85,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__sedfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_2.v b/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_2.v
index b4f8990..045f10b 100644
--- a/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_2.v
+++ b/cells/sedfxbp/sky130_fd_sc_ms__sedfxbp_2.v

@@ -85,30 +85,22 @@
 
 `celldefine
 module sky130_fd_sc_ms__sedfxbp_2 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_1.v b/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_1.v
index 9d97e63..602f330 100644
--- a/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_1.v
+++ b/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_1.v

@@ -82,28 +82,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__sedfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_2.v b/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_2.v
index 75f4d84..980085a 100644
--- a/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_2.v
+++ b/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_2.v

@@ -82,28 +82,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__sedfxtp_2 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_4.v b/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_4.v
index 5431198..c9f6c7f 100644
--- a/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_4.v
+++ b/cells/sedfxtp/sky130_fd_sc_ms__sedfxtp_4.v

@@ -82,28 +82,20 @@
 
 `celldefine
 module sky130_fd_sc_ms__sedfxtp_4 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/tap/sky130_fd_sc_ms__tap_1.v b/cells/tap/sky130_fd_sc_ms__tap_1.v
index 21c226f..48857f3 100644
--- a/cells/tap/sky130_fd_sc_ms__tap_1.v
+++ b/cells/tap/sky130_fd_sc_ms__tap_1.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__tap_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__tap_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tap/sky130_fd_sc_ms__tap_2.v b/cells/tap/sky130_fd_sc_ms__tap_2.v
index 4d1c81e..37bb667 100644
--- a/cells/tap/sky130_fd_sc_ms__tap_2.v
+++ b/cells/tap/sky130_fd_sc_ms__tap_2.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__tap_2 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__tap_2 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tapmet1/sky130_fd_sc_ms__tapmet1_2.v b/cells/tapmet1/sky130_fd_sc_ms__tapmet1_2.v
index 2f35ecf..85535a0 100644
--- a/cells/tapmet1/sky130_fd_sc_ms__tapmet1_2.v
+++ b/cells/tapmet1/sky130_fd_sc_ms__tapmet1_2.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__tapmet1_2 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__tapmet1_2 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tapvgnd/sky130_fd_sc_ms__tapvgnd_1.v b/cells/tapvgnd/sky130_fd_sc_ms__tapvgnd_1.v
index 16cecfb..247eb47 100644
--- a/cells/tapvgnd/sky130_fd_sc_ms__tapvgnd_1.v
+++ b/cells/tapvgnd/sky130_fd_sc_ms__tapvgnd_1.v

@@ -63,18 +63,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__tapvgnd_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__tapvgnd_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tapvgnd2/sky130_fd_sc_ms__tapvgnd2_1.v b/cells/tapvgnd2/sky130_fd_sc_ms__tapvgnd2_1.v
index 22a959a..bf53695 100644
--- a/cells/tapvgnd2/sky130_fd_sc_ms__tapvgnd2_1.v
+++ b/cells/tapvgnd2/sky130_fd_sc_ms__tapvgnd2_1.v

@@ -63,18 +63,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__tapvgnd2_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__tapvgnd2_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tapvpwrvgnd/sky130_fd_sc_ms__tapvpwrvgnd_1.v b/cells/tapvpwrvgnd/sky130_fd_sc_ms__tapvpwrvgnd_1.v
index 35c969a..2f117e5 100644
--- a/cells/tapvpwrvgnd/sky130_fd_sc_ms__tapvpwrvgnd_1.v
+++ b/cells/tapvpwrvgnd/sky130_fd_sc_ms__tapvpwrvgnd_1.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_ms__tapvpwrvgnd_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_ms__tapvpwrvgnd_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/xnor2/sky130_fd_sc_ms__xnor2_1.v b/cells/xnor2/sky130_fd_sc_ms__xnor2_1.v
index acbe898..b44415b 100644
--- a/cells/xnor2/sky130_fd_sc_ms__xnor2_1.v
+++ b/cells/xnor2/sky130_fd_sc_ms__xnor2_1.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__xnor2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor2/sky130_fd_sc_ms__xnor2_2.v b/cells/xnor2/sky130_fd_sc_ms__xnor2_2.v
index e5ef798..9bb1ff4 100644
--- a/cells/xnor2/sky130_fd_sc_ms__xnor2_2.v
+++ b/cells/xnor2/sky130_fd_sc_ms__xnor2_2.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__xnor2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor2/sky130_fd_sc_ms__xnor2_4.v b/cells/xnor2/sky130_fd_sc_ms__xnor2_4.v
index bb80416..1504129 100644
--- a/cells/xnor2/sky130_fd_sc_ms__xnor2_4.v
+++ b/cells/xnor2/sky130_fd_sc_ms__xnor2_4.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__xnor2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor3/sky130_fd_sc_ms__xnor3_1.v b/cells/xnor3/sky130_fd_sc_ms__xnor3_1.v
index 9b44943..ae8c762 100644
--- a/cells/xnor3/sky130_fd_sc_ms__xnor3_1.v
+++ b/cells/xnor3/sky130_fd_sc_ms__xnor3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__xnor3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor3/sky130_fd_sc_ms__xnor3_2.v b/cells/xnor3/sky130_fd_sc_ms__xnor3_2.v
index e6ddb5a..166adff 100644
--- a/cells/xnor3/sky130_fd_sc_ms__xnor3_2.v
+++ b/cells/xnor3/sky130_fd_sc_ms__xnor3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__xnor3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor3/sky130_fd_sc_ms__xnor3_4.v b/cells/xnor3/sky130_fd_sc_ms__xnor3_4.v
index 254d34f..40726a9 100644
--- a/cells/xnor3/sky130_fd_sc_ms__xnor3_4.v
+++ b/cells/xnor3/sky130_fd_sc_ms__xnor3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__xnor3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor2/sky130_fd_sc_ms__xor2_1.v b/cells/xor2/sky130_fd_sc_ms__xor2_1.v
index 8f53d62..6c6c906 100644
--- a/cells/xor2/sky130_fd_sc_ms__xor2_1.v
+++ b/cells/xor2/sky130_fd_sc_ms__xor2_1.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__xor2_1 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor2/sky130_fd_sc_ms__xor2_2.v b/cells/xor2/sky130_fd_sc_ms__xor2_2.v
index 13f06f5..7aa0758 100644
--- a/cells/xor2/sky130_fd_sc_ms__xor2_2.v
+++ b/cells/xor2/sky130_fd_sc_ms__xor2_2.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__xor2_2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor2/sky130_fd_sc_ms__xor2_4.v b/cells/xor2/sky130_fd_sc_ms__xor2_4.v
index cee1132..94834a8 100644
--- a/cells/xor2/sky130_fd_sc_ms__xor2_4.v
+++ b/cells/xor2/sky130_fd_sc_ms__xor2_4.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_ms__xor2_4 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor3/sky130_fd_sc_ms__xor3_1.v b/cells/xor3/sky130_fd_sc_ms__xor3_1.v
index 3672713..c060924 100644
--- a/cells/xor3/sky130_fd_sc_ms__xor3_1.v
+++ b/cells/xor3/sky130_fd_sc_ms__xor3_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__xor3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor3/sky130_fd_sc_ms__xor3_2.v b/cells/xor3/sky130_fd_sc_ms__xor3_2.v
index 81b2e19..805cd03 100644
--- a/cells/xor3/sky130_fd_sc_ms__xor3_2.v
+++ b/cells/xor3/sky130_fd_sc_ms__xor3_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__xor3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor3/sky130_fd_sc_ms__xor3_4.v b/cells/xor3/sky130_fd_sc_ms__xor3_4.v
index 3265cd3..017aeb8 100644
--- a/cells/xor3/sky130_fd_sc_ms__xor3_4.v
+++ b/cells/xor3/sky130_fd_sc_ms__xor3_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_ms__xor3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;