{ | |
"area": 55.944, | |
"cell_footprint": "sky130_fd_sc_ls__sedfxtp", | |
"cell_leakage_power": 6.446949, | |
"driver_waveform_fall": "ramp", | |
"driver_waveform_rise": "ramp", | |
"ff,IQ,IQ_N": { | |
"clocked_on": "CLK", | |
"next_state": "(D&DE&!SCE) | (IQ&!DE&!SCE) | (SCD&SCE)" | |
}, | |
"leakage_power": [ | |
{ | |
"value": 4.5659658, | |
"when": "!D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 4.5399906, | |
"when": "D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 6.5005636, | |
"when": "D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 4.8334758, | |
"when": "D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 4.8181024, | |
"when": "D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 8.2007574, | |
"when": "!D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 7.6028073, | |
"when": "!D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 7.6080786, | |
"when": "!D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 9.0895274, | |
"when": "!D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 7.6870021, | |
"when": "!D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 9.1028598, | |
"when": "D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 7.7003355, | |
"when": "D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 4.2863371, | |
"when": "D&!SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 4.7082276, | |
"when": "!D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 4.2888746, | |
"when": "D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 7.6182713, | |
"when": "!D&!SCE&SCD&!CLK" | |
} | |
], | |
"pg_pin,VGND": { | |
"pg_type": "primary_ground", | |
"related_bias_pin": "VPB", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin,VNB": { | |
"pg_type": "nwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin,VPB": { | |
"pg_type": "pwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin,VPWR": { | |
"pg_type": "primary_power", | |
"related_bias_pin": "VNB", | |
"voltage_name": "VPWR" | |
}, | |
"pin,CLK": { | |
"capacitance": 0.002776, | |
"clock": "true", | |
"direction": "input", | |
"fall_capacitance": 0.002697, | |
"internal_power": { | |
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0.02602, | |
0.03903, | |
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0.08782, | |
0.13172, | |
0.19757, | |
0.29634, | |
0.44449, | |
0.6667, | |
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1.5 | |
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"values": [ | |
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0.0283843, | |
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0.0280212, | |
0.0279126, | |
0.0281359, | |
0.0284728, | |
0.0295146, | |
0.0310791, | |
0.0334277, | |
0.0369531 | |
] | |
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"rise_power,hidden_pwr_template13": { | |
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0.13172, | |
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"values": [ | |
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0.0229589, | |
0.0239397, | |
0.0254125, | |
0.0276235, | |
0.030942 | |
] | |
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}, | |
"max_transition": 1.5, | |
"min_pulse_width_high": 0.299431, | |
"min_pulse_width_low": 0.276363, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.002853 | |
}, | |
"pin,D": { | |
"capacitance": 0.001989, | |
"clock": "false", | |
"direction": "input", | |
"fall_capacitance": 0.001881, | |
"internal_power": { | |
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"values": [ | |
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0.0164014, | |
0.0167104, | |
0.0171756, | |
0.017875, | |
0.0189258 | |
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"rise_power,hidden_pwr_template13": { | |
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0.44449, | |
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"values": [ | |
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0.0127555, | |
0.0129917, | |
0.0133478, | |
0.0138841, | |
0.0146908 | |
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"max_transition": 1.5, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.002096, | |
"timing": [ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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0.5684063, | |
0.6469382, | |
0.7157044, | |
0.7783672 | |
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"related_pin": "CLK", | |
"rise_constraint,vio_10_10_1": { | |
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0.25, | |
0.5, | |
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"values": [ | |
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0.5775534, | |
0.6133607 | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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0.4650534, | |
0.5057435, | |
0.5415508 | |
] | |
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}, | |
"sim_opt": "runlvl=5 accurate=1", | |
"timing_type": "setup_rising", | |
"violation_delay_degrade_pct": 10 | |
}, | |
{ | |
"fall_constraint,vio_10_10_1": { | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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0.125, | |
0.25, | |
0.5, | |
0.75, | |
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1.5 | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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}, | |
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