{ | |
"area": 54.3456, | |
"cell_footprint": "sky130_fd_sc_ls__sedfxtp", | |
"cell_leakage_power": 0.04102507, | |
"driver_waveform_fall": "ramp", | |
"driver_waveform_rise": "ramp", | |
"ff,IQ,IQ_N": { | |
"clocked_on": "CLK", | |
"next_state": "(D&DE&!SCE) | (IQ&!DE&!SCE) | (SCD&SCE)" | |
}, | |
"leakage_power": [ | |
{ | |
"value": 0.0427741, | |
"when": "!D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0400759, | |
"when": "D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0429238, | |
"when": "D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0401019, | |
"when": "D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.0375873, | |
"when": "D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0433587, | |
"when": "!D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0406291, | |
"when": "!D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.0378514, | |
"when": "!D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0432115, | |
"when": "!D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.040571, | |
"when": "!D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0459076, | |
"when": "D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.0432671, | |
"when": "D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0375873, | |
"when": "D&!SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 0.0425727, | |
"when": "!D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 0.0401231, | |
"when": "D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 0.0378587, | |
"when": "!D&!SCE&SCD&!CLK" | |
} | |
], | |
"pg_pin,VGND": { | |
"pg_type": "primary_ground", | |
"related_bias_pin": "VPB", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin,VNB": { | |
"pg_type": "nwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin,VPB": { | |
"pg_type": "pwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin,VPWR": { | |
"pg_type": "primary_power", | |
"related_bias_pin": "VNB", | |
"voltage_name": "VPWR" | |
}, | |
"pin,CLK": { | |
"capacitance": 0.002227, | |
"clock": "true", | |
"direction": "input", | |
"fall_capacitance": 0.002132, | |
"internal_power": { | |
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0.0148022, | |
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"rise_power,hidden_pwr_template13": { | |
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0.0123903, | |
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}, | |
"max_transition": 5.0, | |
"min_pulse_width_high": 1.255257, | |
"min_pulse_width_low": 2.033079, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.002323 | |
}, | |
"pin,D": { | |
"capacitance": 0.001666, | |
"clock": "false", | |
"direction": "input", | |
"fall_capacitance": 0.001593, | |
"internal_power": { | |
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0.0083183, | |
0.0083105, | |
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0.0066455, | |
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"max_transition": 5.0, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.001739, | |
"timing": [ | |
{ | |
"clk_width": 3.4e-08, | |
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5.7588359, | |
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[ | |
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[ | |
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[ | |
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[ | |
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2.1828539, | |
2.6908021, | |
3.2024124, | |
3.7164641, | |
4.2280742 | |
] | |
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"related_pin": "CLK", | |
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[ | |
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2.6845628, | |
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[ | |
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}, | |
"sim_opt": "runlvl=5 accurate=1", | |
"timing_type": "setup_rising", | |
"violation_delay_degrade_pct": 10 | |
}, | |
{ | |
"clk_width": 3.4e-08, | |
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