{ | |
"area": 51.1488, | |
"cell_footprint": "sky130_fd_sc_ls__sedfxtp", | |
"cell_leakage_power": 6.107753, | |
"driver_waveform_fall": "ramp", | |
"driver_waveform_rise": "ramp", | |
"ff,IQ,IQ_N": { | |
"clocked_on": "CLK", | |
"next_state": "(D&DE&!SCE) | (IQ&!DE&!SCE) | (SCD&SCE)" | |
}, | |
"leakage_power": [ | |
{ | |
"value": 4.5196686, | |
"when": "!D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 4.5141659, | |
"when": "D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 6.482562, | |
"when": "D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 4.8270485, | |
"when": "D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 4.7885491, | |
"when": "D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 7.5776443, | |
"when": "!D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 6.9790618, | |
"when": "!D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 6.9504584, | |
"when": "!D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 8.4571923, | |
"when": "!D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 7.0277815, | |
"when": "!D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 8.4708249, | |
"when": "D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 7.0414159, | |
"when": "D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 4.2484558, | |
"when": "D&!SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 4.6538453, | |
"when": "!D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 4.2247303, | |
"when": "D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 6.9606454, | |
"when": "!D&!SCE&SCD&!CLK" | |
} | |
], | |
"pg_pin,VGND": { | |
"pg_type": "primary_ground", | |
"related_bias_pin": "VPB", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin,VNB": { | |
"pg_type": "nwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin,VPB": { | |
"pg_type": "pwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin,VPWR": { | |
"pg_type": "primary_power", | |
"related_bias_pin": "VNB", | |
"voltage_name": "VPWR" | |
}, | |
"pin,CLK": { | |
"capacitance": 0.002678, | |
"clock": "true", | |
"direction": "input", | |
"fall_capacitance": 0.00257, | |
"internal_power": { | |
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0.08782, | |
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0.19757, | |
0.29634, | |
0.44449, | |
0.6667, | |
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"values": [ | |
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0.0295783, | |
0.0311035, | |
0.033393, | |
0.0368295 | |
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"rise_power,hidden_pwr_template13": { | |
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"values": [ | |
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0.0242297, | |
0.0257142, | |
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"max_transition": 1.5, | |
"min_pulse_width_high": 0.223634, | |
"min_pulse_width_low": 0.280757, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.002785 | |
}, | |
"pin,D": { | |
"capacitance": 0.001895, | |
"clock": "false", | |
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"fall_capacitance": 0.001791, | |
"internal_power": { | |
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0.0160155, | |
0.0165079, | |
0.0172481, | |
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"values": [ | |
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0.0131574, | |
0.0137546, | |
0.0146521 | |
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"max_transition": 1.5, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.001999, | |
"timing": [ | |
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0.5623027, | |
0.6396139, | |
0.7096009, | |
0.7722637 | |
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"related_pin": "CLK", | |
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[ | |
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[ | |
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[ | |
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[ | |
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0.4923157, | |
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}, | |
"sim_opt": "runlvl=5 accurate=1", | |
"timing_type": "setup_rising", | |
"violation_delay_degrade_pct": 10 | |
}, | |
{ | |
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[ | |
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[ | |
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[ | |
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0.75, | |
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[ | |
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}, | |
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