{ | |
"area": 51.1488, | |
"cell_footprint": "sky130_fd_sc_ls__sedfxtp", | |
"cell_leakage_power": 0.03916775, | |
"driver_waveform_fall": "ramp", | |
"driver_waveform_rise": "ramp", | |
"ff,IQ,IQ_N": { | |
"clocked_on": "CLK", | |
"next_state": "(D&DE&!SCE) | (IQ&!DE&!SCE) | (SCD&SCE)" | |
}, | |
"leakage_power": [ | |
{ | |
"value": 0.0409139, | |
"when": "!D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0382141, | |
"when": "D&!SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0410602, | |
"when": "D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0382404, | |
"when": "D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.0357289, | |
"when": "D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0414981, | |
"when": "!D&SCE&!SCD&CLK" | |
}, | |
{ | |
"value": 0.0387693, | |
"when": "!D&!SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.0359913, | |
"when": "!D&!SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0413566, | |
"when": "!D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.0387062, | |
"when": "!D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0440638, | |
"when": "D&SCE&SCD&CLK" | |
}, | |
{ | |
"value": 0.0414134, | |
"when": "D&SCE&!SCD&!CLK" | |
}, | |
{ | |
"value": 0.0357289, | |
"when": "D&!SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 0.0407278, | |
"when": "!D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 0.0382726, | |
"when": "D&SCE&SCD&!CLK" | |
}, | |
{ | |
"value": 0.0359983, | |
"when": "!D&!SCE&SCD&!CLK" | |
} | |
], | |
"pg_pin,VGND": { | |
"pg_type": "primary_ground", | |
"related_bias_pin": "VPB", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin,VNB": { | |
"pg_type": "nwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin,VPB": { | |
"pg_type": "pwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin,VPWR": { | |
"pg_type": "primary_power", | |
"related_bias_pin": "VNB", | |
"voltage_name": "VPWR" | |
}, | |
"pin,CLK": { | |
"capacitance": 0.002216, | |
"clock": "true", | |
"direction": "input", | |
"fall_capacitance": 0.00212, | |
"internal_power": { | |
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0.658567, | |
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0.0147889, | |
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"rise_power,hidden_pwr_template13": { | |
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0.0122871, | |
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0.0121948, | |
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}, | |
"max_transition": 5.0, | |
"min_pulse_width_high": 1.12562, | |
"min_pulse_width_low": 2.005613, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.002312 | |
}, | |
"pin,D": { | |
"capacitance": 0.001592, | |
"clock": "false", | |
"direction": "input", | |
"fall_capacitance": 0.001521, | |
"internal_power": { | |
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0.008151, | |
0.0081401, | |
0.0081237 | |
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0.0066135, | |
0.0065963, | |
0.0065704, | |
0.0065315, | |
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] | |
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"max_transition": 5.0, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.001664, | |
"timing": [ | |
{ | |
"clk_width": 6.8e-08, | |
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5.7100078, | |
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[ | |
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4.3124387, | |
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[ | |
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2.9558303, | |
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[ | |
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1.2557977, | |
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1.6321812, | |
2.1328051, | |
2.6431946, | |
3.1548049, | |
3.6664152, | |
4.1780253 | |
] | |
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"related_pin": "CLK", | |
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[ | |
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[ | |
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}, | |
"sim_opt": "runlvl=5 accurate=1", | |
"timing_type": "setup_rising", | |
"violation_delay_degrade_pct": 10 | |
}, | |
{ | |
"clk_width": 6.8e-08, | |
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