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| "area": 14.3856, | |
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| "driver_waveform_fall": "ramp", | |
| "driver_waveform_rise": "ramp", | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
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| { | |
| "value": 0.0001389, | |
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| ], | |
| "pg_pin,VGND": { | |
| "pg_type": "primary_ground", | |
| "related_bias_pin": "VPB", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin,VNB": { | |
| "pg_type": "nwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin,VPB": { | |
| "pg_type": "pwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VPB" | |
| }, | |
| "pg_pin,VPWR": { | |
| "pg_type": "primary_power", | |
| "related_bias_pin": "VNB", | |
| "voltage_name": "VPWR" | |
| }, | |
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| "capacitance": 0.002211, | |
| "clock": "false", | |
| "direction": "input", | |
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| "internal_power": { | |
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| 1.48163, | |
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| 3.33333, | |
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| } | |
| }, | |
| "max_transition": 5.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002269 | |
| }, | |
| "pin,A2": { | |
| "capacitance": 0.002171, | |
| "clock": "false", | |
| "direction": "input", | |
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| 2.22233, | |
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| 0.0023823, | |
| 0.0023861, | |
| 0.0023918, | |
| 0.0024003 | |
| ] | |
| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 2.22233, | |
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| }, | |
| "max_transition": 5.0, | |
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| }, | |
| "pin,B1": { | |
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| "clock": "false", | |
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| "internal_power": { | |
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| 1.48163, | |
| 2.22233, | |
| 3.33333, | |
| 5.0 | |
| ], | |
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| 0.0027097 | |
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| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 2.22233, | |
| 3.33333, | |
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| ] | |
| } | |
| }, | |
| "max_transition": 5.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002245 | |
| }, | |
| "pin,B2": { | |
| "capacitance": 0.002214, | |
| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.002101, | |
| "internal_power": { | |
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| 0.658567, | |
| 0.9878, | |
| 1.48163, | |
| 2.22233, | |
| 3.33333, | |
| 5.0 | |
| ], | |
| "values": [ | |
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| 0.0025707, | |
| 0.0025708, | |
| 0.0025709, | |
| 0.0025711, | |
| 0.0025713 | |
| ] | |
| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 1.48163, | |
| 2.22233, | |
| 3.33333, | |
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| }, | |
| "max_transition": 5.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002328 | |
| }, | |
| "pin,C1": { | |
| "capacitance": 0.002152, | |
| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.002053, | |
| "internal_power": { | |
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| 1.48163, | |
| 2.22233, | |
| 3.33333, | |
| 5.0 | |
| ], | |
| "values": [ | |
| 0.0027711, | |
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| 0.002826 | |
| ] | |
| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 0.0333333, | |
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| 1.48163, | |
| 2.22233, | |
| 3.33333, | |
| 5.0 | |
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| "values": [ | |
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| }, | |
| "max_transition": 5.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002251 | |
| }, | |
| "pin,C2": { | |
| "capacitance": 0.002247, | |
| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.002116, | |
| "internal_power": { | |
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| 0.0333333, | |
| 0.0578333, | |
| 0.0867333, | |
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