verilog: Fixing power pins usage in non-powerpin mode.
Previously even when `USE_POWER_PIN` was not defined, the drive strength
wrappers where still defining the power pins as ports.
Fixes https://github.com/google/skywater-pdk/issues/181
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
diff --git a/cells/a2111o/sky130_fd_sc_ls__a2111o_1.v b/cells/a2111o/sky130_fd_sc_ls__a2111o_1.v
index 876ae7f..2f2add1 100644
--- a/cells/a2111o/sky130_fd_sc_ls__a2111o_1.v
+++ b/cells/a2111o/sky130_fd_sc_ls__a2111o_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a2111o_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2111o/sky130_fd_sc_ls__a2111o_2.v b/cells/a2111o/sky130_fd_sc_ls__a2111o_2.v
index f39befb..35dec30 100644
--- a/cells/a2111o/sky130_fd_sc_ls__a2111o_2.v
+++ b/cells/a2111o/sky130_fd_sc_ls__a2111o_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a2111o_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2111o/sky130_fd_sc_ls__a2111o_4.v b/cells/a2111o/sky130_fd_sc_ls__a2111o_4.v
index 46093bb..dc0a1bb 100644
--- a/cells/a2111o/sky130_fd_sc_ls__a2111o_4.v
+++ b/cells/a2111o/sky130_fd_sc_ls__a2111o_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a2111o_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_ls__a2111oi_1.v b/cells/a2111oi/sky130_fd_sc_ls__a2111oi_1.v
index ac8a813..d3af148 100644
--- a/cells/a2111oi/sky130_fd_sc_ls__a2111oi_1.v
+++ b/cells/a2111oi/sky130_fd_sc_ls__a2111oi_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a2111oi_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_ls__a2111oi_2.v b/cells/a2111oi/sky130_fd_sc_ls__a2111oi_2.v
index 584b28d..7b70638 100644
--- a/cells/a2111oi/sky130_fd_sc_ls__a2111oi_2.v
+++ b/cells/a2111oi/sky130_fd_sc_ls__a2111oi_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a2111oi_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2111oi/sky130_fd_sc_ls__a2111oi_4.v b/cells/a2111oi/sky130_fd_sc_ls__a2111oi_4.v
index 1bd9773..b547832 100644
--- a/cells/a2111oi/sky130_fd_sc_ls__a2111oi_4.v
+++ b/cells/a2111oi/sky130_fd_sc_ls__a2111oi_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a2111oi_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_ls__a211o_1.v b/cells/a211o/sky130_fd_sc_ls__a211o_1.v
index 9a40781..0659d85 100644
--- a/cells/a211o/sky130_fd_sc_ls__a211o_1.v
+++ b/cells/a211o/sky130_fd_sc_ls__a211o_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a211o_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_ls__a211o_2.v b/cells/a211o/sky130_fd_sc_ls__a211o_2.v
index 1263e19..4a69c65 100644
--- a/cells/a211o/sky130_fd_sc_ls__a211o_2.v
+++ b/cells/a211o/sky130_fd_sc_ls__a211o_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a211o_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a211o/sky130_fd_sc_ls__a211o_4.v b/cells/a211o/sky130_fd_sc_ls__a211o_4.v
index d2b3bdf..d2a878e 100644
--- a/cells/a211o/sky130_fd_sc_ls__a211o_4.v
+++ b/cells/a211o/sky130_fd_sc_ls__a211o_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a211o_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_ls__a211oi_1.v b/cells/a211oi/sky130_fd_sc_ls__a211oi_1.v
index 45513f0..e7e1d1d 100644
--- a/cells/a211oi/sky130_fd_sc_ls__a211oi_1.v
+++ b/cells/a211oi/sky130_fd_sc_ls__a211oi_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a211oi_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_ls__a211oi_2.v b/cells/a211oi/sky130_fd_sc_ls__a211oi_2.v
index 8aa2b8d..cd105a5 100644
--- a/cells/a211oi/sky130_fd_sc_ls__a211oi_2.v
+++ b/cells/a211oi/sky130_fd_sc_ls__a211oi_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a211oi_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a211oi/sky130_fd_sc_ls__a211oi_4.v b/cells/a211oi/sky130_fd_sc_ls__a211oi_4.v
index 67a0d46..2d576bf 100644
--- a/cells/a211oi/sky130_fd_sc_ls__a211oi_4.v
+++ b/cells/a211oi/sky130_fd_sc_ls__a211oi_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a211oi_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_ls__a21bo_1.v b/cells/a21bo/sky130_fd_sc_ls__a21bo_1.v
index 968bc02..cc3c01f 100644
--- a/cells/a21bo/sky130_fd_sc_ls__a21bo_1.v
+++ b/cells/a21bo/sky130_fd_sc_ls__a21bo_1.v
@@ -81,21 +81,13 @@
X ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output X ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_ls__a21bo_2.v b/cells/a21bo/sky130_fd_sc_ls__a21bo_2.v
index 4c48d2d..471846f 100644
--- a/cells/a21bo/sky130_fd_sc_ls__a21bo_2.v
+++ b/cells/a21bo/sky130_fd_sc_ls__a21bo_2.v
@@ -81,21 +81,13 @@
X ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output X ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21bo/sky130_fd_sc_ls__a21bo_4.v b/cells/a21bo/sky130_fd_sc_ls__a21bo_4.v
index 65925bd..10883a0 100644
--- a/cells/a21bo/sky130_fd_sc_ls__a21bo_4.v
+++ b/cells/a21bo/sky130_fd_sc_ls__a21bo_4.v
@@ -81,21 +81,13 @@
X ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output X ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_ls__a21boi_1.v b/cells/a21boi/sky130_fd_sc_ls__a21boi_1.v
index e92e129..2b5c8fe 100644
--- a/cells/a21boi/sky130_fd_sc_ls__a21boi_1.v
+++ b/cells/a21boi/sky130_fd_sc_ls__a21boi_1.v
@@ -81,21 +81,13 @@
Y ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output Y ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_ls__a21boi_2.v b/cells/a21boi/sky130_fd_sc_ls__a21boi_2.v
index 5c5279f..ae32c7e 100644
--- a/cells/a21boi/sky130_fd_sc_ls__a21boi_2.v
+++ b/cells/a21boi/sky130_fd_sc_ls__a21boi_2.v
@@ -81,21 +81,13 @@
Y ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output Y ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21boi/sky130_fd_sc_ls__a21boi_4.v b/cells/a21boi/sky130_fd_sc_ls__a21boi_4.v
index 21dd22d..afea5a0 100644
--- a/cells/a21boi/sky130_fd_sc_ls__a21boi_4.v
+++ b/cells/a21boi/sky130_fd_sc_ls__a21boi_4.v
@@ -81,21 +81,13 @@
Y ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output Y ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_ls__a21o_1.v b/cells/a21o/sky130_fd_sc_ls__a21o_1.v
index b5e5f2e..288be22 100644
--- a/cells/a21o/sky130_fd_sc_ls__a21o_1.v
+++ b/cells/a21o/sky130_fd_sc_ls__a21o_1.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__a21o_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_ls__a21o_2.v b/cells/a21o/sky130_fd_sc_ls__a21o_2.v
index 28c5667..c7fa6f0 100644
--- a/cells/a21o/sky130_fd_sc_ls__a21o_2.v
+++ b/cells/a21o/sky130_fd_sc_ls__a21o_2.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__a21o_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21o/sky130_fd_sc_ls__a21o_4.v b/cells/a21o/sky130_fd_sc_ls__a21o_4.v
index dd9daee..657ddd4 100644
--- a/cells/a21o/sky130_fd_sc_ls__a21o_4.v
+++ b/cells/a21o/sky130_fd_sc_ls__a21o_4.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__a21o_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_ls__a21oi_1.v b/cells/a21oi/sky130_fd_sc_ls__a21oi_1.v
index 00ab275..edea525 100644
--- a/cells/a21oi/sky130_fd_sc_ls__a21oi_1.v
+++ b/cells/a21oi/sky130_fd_sc_ls__a21oi_1.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__a21oi_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_ls__a21oi_2.v b/cells/a21oi/sky130_fd_sc_ls__a21oi_2.v
index 05a5425..0ef6d19 100644
--- a/cells/a21oi/sky130_fd_sc_ls__a21oi_2.v
+++ b/cells/a21oi/sky130_fd_sc_ls__a21oi_2.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__a21oi_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a21oi/sky130_fd_sc_ls__a21oi_4.v b/cells/a21oi/sky130_fd_sc_ls__a21oi_4.v
index 4ff61bf..0b58e0e 100644
--- a/cells/a21oi/sky130_fd_sc_ls__a21oi_4.v
+++ b/cells/a21oi/sky130_fd_sc_ls__a21oi_4.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__a21oi_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_ls__a221o_1.v b/cells/a221o/sky130_fd_sc_ls__a221o_1.v
index 7fd3a4d..8806dff 100644
--- a/cells/a221o/sky130_fd_sc_ls__a221o_1.v
+++ b/cells/a221o/sky130_fd_sc_ls__a221o_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a221o_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_ls__a221o_2.v b/cells/a221o/sky130_fd_sc_ls__a221o_2.v
index e987799..4882306 100644
--- a/cells/a221o/sky130_fd_sc_ls__a221o_2.v
+++ b/cells/a221o/sky130_fd_sc_ls__a221o_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a221o_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a221o/sky130_fd_sc_ls__a221o_4.v b/cells/a221o/sky130_fd_sc_ls__a221o_4.v
index 7a0cc85..ced138f 100644
--- a/cells/a221o/sky130_fd_sc_ls__a221o_4.v
+++ b/cells/a221o/sky130_fd_sc_ls__a221o_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a221o_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_ls__a221oi_1.v b/cells/a221oi/sky130_fd_sc_ls__a221oi_1.v
index 4ee63ca..29218b0 100644
--- a/cells/a221oi/sky130_fd_sc_ls__a221oi_1.v
+++ b/cells/a221oi/sky130_fd_sc_ls__a221oi_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a221oi_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_ls__a221oi_2.v b/cells/a221oi/sky130_fd_sc_ls__a221oi_2.v
index d68811c..20d1c39 100644
--- a/cells/a221oi/sky130_fd_sc_ls__a221oi_2.v
+++ b/cells/a221oi/sky130_fd_sc_ls__a221oi_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a221oi_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a221oi/sky130_fd_sc_ls__a221oi_4.v b/cells/a221oi/sky130_fd_sc_ls__a221oi_4.v
index dc88189..19716e5 100644
--- a/cells/a221oi/sky130_fd_sc_ls__a221oi_4.v
+++ b/cells/a221oi/sky130_fd_sc_ls__a221oi_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a221oi_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a222o/sky130_fd_sc_ls__a222o_1.v b/cells/a222o/sky130_fd_sc_ls__a222o_1.v
index 42a79e3..f61f698 100644
--- a/cells/a222o/sky130_fd_sc_ls__a222o_1.v
+++ b/cells/a222o/sky130_fd_sc_ls__a222o_1.v
@@ -86,30 +86,22 @@
`celldefine
module sky130_fd_sc_ls__a222o_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- C2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1,
+ C2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input C2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
+ input C2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a222o/sky130_fd_sc_ls__a222o_2.v b/cells/a222o/sky130_fd_sc_ls__a222o_2.v
index 6025ad0..5baaec3 100644
--- a/cells/a222o/sky130_fd_sc_ls__a222o_2.v
+++ b/cells/a222o/sky130_fd_sc_ls__a222o_2.v
@@ -86,30 +86,22 @@
`celldefine
module sky130_fd_sc_ls__a222o_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- C2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1,
+ C2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input C2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
+ input C2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a222oi/sky130_fd_sc_ls__a222oi_1.v b/cells/a222oi/sky130_fd_sc_ls__a222oi_1.v
index 2a4b02b..f24fab6 100644
--- a/cells/a222oi/sky130_fd_sc_ls__a222oi_1.v
+++ b/cells/a222oi/sky130_fd_sc_ls__a222oi_1.v
@@ -86,30 +86,22 @@
`celldefine
module sky130_fd_sc_ls__a222oi_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- C2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1,
+ C2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input C2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
+ input C2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a222oi/sky130_fd_sc_ls__a222oi_2.v b/cells/a222oi/sky130_fd_sc_ls__a222oi_2.v
index 5fc56b4..2e263a2 100644
--- a/cells/a222oi/sky130_fd_sc_ls__a222oi_2.v
+++ b/cells/a222oi/sky130_fd_sc_ls__a222oi_2.v
@@ -86,30 +86,22 @@
`celldefine
module sky130_fd_sc_ls__a222oi_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- C2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1,
+ C2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input C2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
+ input C2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_ls__a22o_1.v b/cells/a22o/sky130_fd_sc_ls__a22o_1.v
index cc1ddcd..d7fa467 100644
--- a/cells/a22o/sky130_fd_sc_ls__a22o_1.v
+++ b/cells/a22o/sky130_fd_sc_ls__a22o_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a22o_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_ls__a22o_2.v b/cells/a22o/sky130_fd_sc_ls__a22o_2.v
index 7f5a287..a04702e 100644
--- a/cells/a22o/sky130_fd_sc_ls__a22o_2.v
+++ b/cells/a22o/sky130_fd_sc_ls__a22o_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a22o_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a22o/sky130_fd_sc_ls__a22o_4.v b/cells/a22o/sky130_fd_sc_ls__a22o_4.v
index 671c4d2..4f267f2 100644
--- a/cells/a22o/sky130_fd_sc_ls__a22o_4.v
+++ b/cells/a22o/sky130_fd_sc_ls__a22o_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a22o_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_ls__a22oi_1.v b/cells/a22oi/sky130_fd_sc_ls__a22oi_1.v
index 28f44e8..0318895 100644
--- a/cells/a22oi/sky130_fd_sc_ls__a22oi_1.v
+++ b/cells/a22oi/sky130_fd_sc_ls__a22oi_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a22oi_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_ls__a22oi_2.v b/cells/a22oi/sky130_fd_sc_ls__a22oi_2.v
index ff93008..20f3952 100644
--- a/cells/a22oi/sky130_fd_sc_ls__a22oi_2.v
+++ b/cells/a22oi/sky130_fd_sc_ls__a22oi_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a22oi_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a22oi/sky130_fd_sc_ls__a22oi_4.v b/cells/a22oi/sky130_fd_sc_ls__a22oi_4.v
index 9eab3b5..d8245a7 100644
--- a/cells/a22oi/sky130_fd_sc_ls__a22oi_4.v
+++ b/cells/a22oi/sky130_fd_sc_ls__a22oi_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a22oi_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_1.v b/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_1.v
index 77f7a1d..57ffb09 100644
--- a/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_1.v
+++ b/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_1.v
@@ -85,11 +85,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output X ;
@@ -97,10 +93,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_2.v b/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_2.v
index 531d225..f1310bc 100644
--- a/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_2.v
+++ b/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_2.v
@@ -85,11 +85,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output X ;
@@ -97,10 +93,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_4.v b/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_4.v
index aae8471..ed07891 100644
--- a/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_4.v
+++ b/cells/a2bb2o/sky130_fd_sc_ls__a2bb2o_4.v
@@ -85,11 +85,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output X ;
@@ -97,10 +93,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_1.v b/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_1.v
index 0115fc6..0cf14fd 100644
--- a/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_1.v
+++ b/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_1.v
@@ -85,11 +85,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output Y ;
@@ -97,10 +93,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_2.v b/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_2.v
index b327155..3fa61a2 100644
--- a/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_2.v
+++ b/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_2.v
@@ -85,11 +85,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output Y ;
@@ -97,10 +93,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_4.v b/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_4.v
index 1a7f426..81a7887 100644
--- a/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_4.v
+++ b/cells/a2bb2oi/sky130_fd_sc_ls__a2bb2oi_4.v
@@ -85,11 +85,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output Y ;
@@ -97,10 +93,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_ls__a311o_1.v b/cells/a311o/sky130_fd_sc_ls__a311o_1.v
index bfc036e..342ef44 100644
--- a/cells/a311o/sky130_fd_sc_ls__a311o_1.v
+++ b/cells/a311o/sky130_fd_sc_ls__a311o_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a311o_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_ls__a311o_2.v b/cells/a311o/sky130_fd_sc_ls__a311o_2.v
index 4b52199..e7c109f 100644
--- a/cells/a311o/sky130_fd_sc_ls__a311o_2.v
+++ b/cells/a311o/sky130_fd_sc_ls__a311o_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a311o_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a311o/sky130_fd_sc_ls__a311o_4.v b/cells/a311o/sky130_fd_sc_ls__a311o_4.v
index eafb9ba..1783bf1 100644
--- a/cells/a311o/sky130_fd_sc_ls__a311o_4.v
+++ b/cells/a311o/sky130_fd_sc_ls__a311o_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a311o_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_ls__a311oi_1.v b/cells/a311oi/sky130_fd_sc_ls__a311oi_1.v
index ea5d6ec..887223c 100644
--- a/cells/a311oi/sky130_fd_sc_ls__a311oi_1.v
+++ b/cells/a311oi/sky130_fd_sc_ls__a311oi_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a311oi_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_ls__a311oi_2.v b/cells/a311oi/sky130_fd_sc_ls__a311oi_2.v
index ebeadd7..3041a58 100644
--- a/cells/a311oi/sky130_fd_sc_ls__a311oi_2.v
+++ b/cells/a311oi/sky130_fd_sc_ls__a311oi_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a311oi_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a311oi/sky130_fd_sc_ls__a311oi_4.v b/cells/a311oi/sky130_fd_sc_ls__a311oi_4.v
index b18cbc4..1e64e27 100644
--- a/cells/a311oi/sky130_fd_sc_ls__a311oi_4.v
+++ b/cells/a311oi/sky130_fd_sc_ls__a311oi_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a311oi_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_ls__a31o_1.v b/cells/a31o/sky130_fd_sc_ls__a31o_1.v
index 9414126..c5c406f 100644
--- a/cells/a31o/sky130_fd_sc_ls__a31o_1.v
+++ b/cells/a31o/sky130_fd_sc_ls__a31o_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a31o_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_ls__a31o_2.v b/cells/a31o/sky130_fd_sc_ls__a31o_2.v
index 6717983..2e4ae25 100644
--- a/cells/a31o/sky130_fd_sc_ls__a31o_2.v
+++ b/cells/a31o/sky130_fd_sc_ls__a31o_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a31o_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a31o/sky130_fd_sc_ls__a31o_4.v b/cells/a31o/sky130_fd_sc_ls__a31o_4.v
index ec27239..56a92e1 100644
--- a/cells/a31o/sky130_fd_sc_ls__a31o_4.v
+++ b/cells/a31o/sky130_fd_sc_ls__a31o_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a31o_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_ls__a31oi_1.v b/cells/a31oi/sky130_fd_sc_ls__a31oi_1.v
index 3ee1118..4993e8c 100644
--- a/cells/a31oi/sky130_fd_sc_ls__a31oi_1.v
+++ b/cells/a31oi/sky130_fd_sc_ls__a31oi_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a31oi_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_ls__a31oi_2.v b/cells/a31oi/sky130_fd_sc_ls__a31oi_2.v
index f7c95e0..cea6a73 100644
--- a/cells/a31oi/sky130_fd_sc_ls__a31oi_2.v
+++ b/cells/a31oi/sky130_fd_sc_ls__a31oi_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a31oi_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a31oi/sky130_fd_sc_ls__a31oi_4.v b/cells/a31oi/sky130_fd_sc_ls__a31oi_4.v
index a4e5316..cb36a39 100644
--- a/cells/a31oi/sky130_fd_sc_ls__a31oi_4.v
+++ b/cells/a31oi/sky130_fd_sc_ls__a31oi_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__a31oi_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_ls__a32o_1.v b/cells/a32o/sky130_fd_sc_ls__a32o_1.v
index 662764b..9b3a7e3 100644
--- a/cells/a32o/sky130_fd_sc_ls__a32o_1.v
+++ b/cells/a32o/sky130_fd_sc_ls__a32o_1.v
@@ -84,28 +84,20 @@
`celldefine
module sky130_fd_sc_ls__a32o_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_ls__a32o_2.v b/cells/a32o/sky130_fd_sc_ls__a32o_2.v
index 8e81ee0..a457a63 100644
--- a/cells/a32o/sky130_fd_sc_ls__a32o_2.v
+++ b/cells/a32o/sky130_fd_sc_ls__a32o_2.v
@@ -84,28 +84,20 @@
`celldefine
module sky130_fd_sc_ls__a32o_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a32o/sky130_fd_sc_ls__a32o_4.v b/cells/a32o/sky130_fd_sc_ls__a32o_4.v
index 547f572..2e315a2 100644
--- a/cells/a32o/sky130_fd_sc_ls__a32o_4.v
+++ b/cells/a32o/sky130_fd_sc_ls__a32o_4.v
@@ -84,28 +84,20 @@
`celldefine
module sky130_fd_sc_ls__a32o_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_ls__a32oi_1.v b/cells/a32oi/sky130_fd_sc_ls__a32oi_1.v
index cac22ce..7089823 100644
--- a/cells/a32oi/sky130_fd_sc_ls__a32oi_1.v
+++ b/cells/a32oi/sky130_fd_sc_ls__a32oi_1.v
@@ -84,28 +84,20 @@
`celldefine
module sky130_fd_sc_ls__a32oi_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_ls__a32oi_2.v b/cells/a32oi/sky130_fd_sc_ls__a32oi_2.v
index 7da5d5c..9d597b1 100644
--- a/cells/a32oi/sky130_fd_sc_ls__a32oi_2.v
+++ b/cells/a32oi/sky130_fd_sc_ls__a32oi_2.v
@@ -84,28 +84,20 @@
`celldefine
module sky130_fd_sc_ls__a32oi_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a32oi/sky130_fd_sc_ls__a32oi_4.v b/cells/a32oi/sky130_fd_sc_ls__a32oi_4.v
index 0455e0f..d0b3983 100644
--- a/cells/a32oi/sky130_fd_sc_ls__a32oi_4.v
+++ b/cells/a32oi/sky130_fd_sc_ls__a32oi_4.v
@@ -84,28 +84,20 @@
`celldefine
module sky130_fd_sc_ls__a32oi_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_ls__a41o_1.v b/cells/a41o/sky130_fd_sc_ls__a41o_1.v
index 9489846..ef312e5 100644
--- a/cells/a41o/sky130_fd_sc_ls__a41o_1.v
+++ b/cells/a41o/sky130_fd_sc_ls__a41o_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a41o_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_ls__a41o_2.v b/cells/a41o/sky130_fd_sc_ls__a41o_2.v
index fc39935..c647722 100644
--- a/cells/a41o/sky130_fd_sc_ls__a41o_2.v
+++ b/cells/a41o/sky130_fd_sc_ls__a41o_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a41o_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a41o/sky130_fd_sc_ls__a41o_4.v b/cells/a41o/sky130_fd_sc_ls__a41o_4.v
index 2bb5fae..92adca7 100644
--- a/cells/a41o/sky130_fd_sc_ls__a41o_4.v
+++ b/cells/a41o/sky130_fd_sc_ls__a41o_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a41o_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_ls__a41oi_1.v b/cells/a41oi/sky130_fd_sc_ls__a41oi_1.v
index eb765ad..bf67e63 100644
--- a/cells/a41oi/sky130_fd_sc_ls__a41oi_1.v
+++ b/cells/a41oi/sky130_fd_sc_ls__a41oi_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a41oi_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_ls__a41oi_2.v b/cells/a41oi/sky130_fd_sc_ls__a41oi_2.v
index 8a5cbed..2da240c 100644
--- a/cells/a41oi/sky130_fd_sc_ls__a41oi_2.v
+++ b/cells/a41oi/sky130_fd_sc_ls__a41oi_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a41oi_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/a41oi/sky130_fd_sc_ls__a41oi_4.v b/cells/a41oi/sky130_fd_sc_ls__a41oi_4.v
index 51a4b4d..b4848aa 100644
--- a/cells/a41oi/sky130_fd_sc_ls__a41oi_4.v
+++ b/cells/a41oi/sky130_fd_sc_ls__a41oi_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__a41oi_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_ls__and2_1.v b/cells/and2/sky130_fd_sc_ls__and2_1.v
index baf33e1..96df621 100644
--- a/cells/and2/sky130_fd_sc_ls__and2_1.v
+++ b/cells/and2/sky130_fd_sc_ls__and2_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__and2_1 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_ls__and2_2.v b/cells/and2/sky130_fd_sc_ls__and2_2.v
index 96494c0..6e9aed6 100644
--- a/cells/and2/sky130_fd_sc_ls__and2_2.v
+++ b/cells/and2/sky130_fd_sc_ls__and2_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__and2_2 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and2/sky130_fd_sc_ls__and2_4.v b/cells/and2/sky130_fd_sc_ls__and2_4.v
index 09122e6..a67a22b 100644
--- a/cells/and2/sky130_fd_sc_ls__and2_4.v
+++ b/cells/and2/sky130_fd_sc_ls__and2_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__and2_4 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_ls__and2b_1.v b/cells/and2b/sky130_fd_sc_ls__and2b_1.v
index 2cc7089..3afc584 100644
--- a/cells/and2b/sky130_fd_sc_ls__and2b_1.v
+++ b/cells/and2b/sky130_fd_sc_ls__and2b_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__and2b_1 (
- X ,
- A_N ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B
);
- output X ;
- input A_N ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_ls__and2b_2.v b/cells/and2b/sky130_fd_sc_ls__and2b_2.v
index 7ff60e7..0a609b3 100644
--- a/cells/and2b/sky130_fd_sc_ls__and2b_2.v
+++ b/cells/and2b/sky130_fd_sc_ls__and2b_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__and2b_2 (
- X ,
- A_N ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B
);
- output X ;
- input A_N ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and2b/sky130_fd_sc_ls__and2b_4.v b/cells/and2b/sky130_fd_sc_ls__and2b_4.v
index e45f064..91db068 100644
--- a/cells/and2b/sky130_fd_sc_ls__and2b_4.v
+++ b/cells/and2b/sky130_fd_sc_ls__and2b_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__and2b_4 (
- X ,
- A_N ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B
);
- output X ;
- input A_N ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_ls__and3_1.v b/cells/and3/sky130_fd_sc_ls__and3_1.v
index 12f0ded..b756ce0 100644
--- a/cells/and3/sky130_fd_sc_ls__and3_1.v
+++ b/cells/and3/sky130_fd_sc_ls__and3_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__and3_1 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_ls__and3_2.v b/cells/and3/sky130_fd_sc_ls__and3_2.v
index f26fedd..56d7f73 100644
--- a/cells/and3/sky130_fd_sc_ls__and3_2.v
+++ b/cells/and3/sky130_fd_sc_ls__and3_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__and3_2 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and3/sky130_fd_sc_ls__and3_4.v b/cells/and3/sky130_fd_sc_ls__and3_4.v
index 372eb94..9a6029b 100644
--- a/cells/and3/sky130_fd_sc_ls__and3_4.v
+++ b/cells/and3/sky130_fd_sc_ls__and3_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__and3_4 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_ls__and3b_1.v b/cells/and3b/sky130_fd_sc_ls__and3b_1.v
index 5fa9550..1efc08c 100644
--- a/cells/and3b/sky130_fd_sc_ls__and3b_1.v
+++ b/cells/and3b/sky130_fd_sc_ls__and3b_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__and3b_1 (
- X ,
- A_N ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B ,
+ C
);
- output X ;
- input A_N ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
+ input C ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_ls__and3b_2.v b/cells/and3b/sky130_fd_sc_ls__and3b_2.v
index 84e651d..060a3ac 100644
--- a/cells/and3b/sky130_fd_sc_ls__and3b_2.v
+++ b/cells/and3b/sky130_fd_sc_ls__and3b_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__and3b_2 (
- X ,
- A_N ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B ,
+ C
);
- output X ;
- input A_N ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
+ input C ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and3b/sky130_fd_sc_ls__and3b_4.v b/cells/and3b/sky130_fd_sc_ls__and3b_4.v
index a548297..92f74bb 100644
--- a/cells/and3b/sky130_fd_sc_ls__and3b_4.v
+++ b/cells/and3b/sky130_fd_sc_ls__and3b_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__and3b_4 (
- X ,
- A_N ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B ,
+ C
);
- output X ;
- input A_N ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
+ input C ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_ls__and4_1.v b/cells/and4/sky130_fd_sc_ls__and4_1.v
index 77570b4..d3bba38 100644
--- a/cells/and4/sky130_fd_sc_ls__and4_1.v
+++ b/cells/and4/sky130_fd_sc_ls__and4_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4_1 (
- X ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C,
+ D
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_ls__and4_2.v b/cells/and4/sky130_fd_sc_ls__and4_2.v
index 7aded11..8b952b4 100644
--- a/cells/and4/sky130_fd_sc_ls__and4_2.v
+++ b/cells/and4/sky130_fd_sc_ls__and4_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4_2 (
- X ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C,
+ D
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4/sky130_fd_sc_ls__and4_4.v b/cells/and4/sky130_fd_sc_ls__and4_4.v
index 0e4c223..53c5d02 100644
--- a/cells/and4/sky130_fd_sc_ls__and4_4.v
+++ b/cells/and4/sky130_fd_sc_ls__and4_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4_4 (
- X ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C,
+ D
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_ls__and4b_1.v b/cells/and4b/sky130_fd_sc_ls__and4b_1.v
index 6e86be8..6a6898a 100644
--- a/cells/and4b/sky130_fd_sc_ls__and4b_1.v
+++ b/cells/and4b/sky130_fd_sc_ls__and4b_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4b_1 (
- X ,
- A_N ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B ,
+ C ,
+ D
);
- output X ;
- input A_N ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_ls__and4b_2.v b/cells/and4b/sky130_fd_sc_ls__and4b_2.v
index 257cbbd..b56300c 100644
--- a/cells/and4b/sky130_fd_sc_ls__and4b_2.v
+++ b/cells/and4b/sky130_fd_sc_ls__and4b_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4b_2 (
- X ,
- A_N ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B ,
+ C ,
+ D
);
- output X ;
- input A_N ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4b/sky130_fd_sc_ls__and4b_4.v b/cells/and4b/sky130_fd_sc_ls__and4b_4.v
index 6403a70..40dca74 100644
--- a/cells/and4b/sky130_fd_sc_ls__and4b_4.v
+++ b/cells/and4b/sky130_fd_sc_ls__and4b_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4b_4 (
- X ,
- A_N ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B ,
+ C ,
+ D
);
- output X ;
- input A_N ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B ;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_ls__and4bb_1.v b/cells/and4bb/sky130_fd_sc_ls__and4bb_1.v
index 9518fed..2de01d3 100644
--- a/cells/and4bb/sky130_fd_sc_ls__and4bb_1.v
+++ b/cells/and4bb/sky130_fd_sc_ls__and4bb_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4bb_1 (
- X ,
- A_N ,
- B_N ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B_N,
+ C ,
+ D
);
- output X ;
- input A_N ;
- input B_N ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B_N;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_ls__and4bb_2.v b/cells/and4bb/sky130_fd_sc_ls__and4bb_2.v
index ead8220..ec084a9 100644
--- a/cells/and4bb/sky130_fd_sc_ls__and4bb_2.v
+++ b/cells/and4bb/sky130_fd_sc_ls__and4bb_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4bb_2 (
- X ,
- A_N ,
- B_N ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B_N,
+ C ,
+ D
);
- output X ;
- input A_N ;
- input B_N ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B_N;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/and4bb/sky130_fd_sc_ls__and4bb_4.v b/cells/and4bb/sky130_fd_sc_ls__and4bb_4.v
index a6dd242..3387db2 100644
--- a/cells/and4bb/sky130_fd_sc_ls__and4bb_4.v
+++ b/cells/and4bb/sky130_fd_sc_ls__and4bb_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__and4bb_4 (
- X ,
- A_N ,
- B_N ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A_N,
+ B_N,
+ C ,
+ D
);
- output X ;
- input A_N ;
- input B_N ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A_N;
+ input B_N;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_ls__buf_1.v b/cells/buf/sky130_fd_sc_ls__buf_1.v
index ca1e61f..b5b0156 100644
--- a/cells/buf/sky130_fd_sc_ls__buf_1.v
+++ b/cells/buf/sky130_fd_sc_ls__buf_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__buf_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_ls__buf_16.v b/cells/buf/sky130_fd_sc_ls__buf_16.v
index b2ecc92..1c07108 100644
--- a/cells/buf/sky130_fd_sc_ls__buf_16.v
+++ b/cells/buf/sky130_fd_sc_ls__buf_16.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__buf_16 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_ls__buf_2.v b/cells/buf/sky130_fd_sc_ls__buf_2.v
index b7495a2..45ed759 100644
--- a/cells/buf/sky130_fd_sc_ls__buf_2.v
+++ b/cells/buf/sky130_fd_sc_ls__buf_2.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__buf_2 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_ls__buf_4.v b/cells/buf/sky130_fd_sc_ls__buf_4.v
index 85e7338..fa15fca 100644
--- a/cells/buf/sky130_fd_sc_ls__buf_4.v
+++ b/cells/buf/sky130_fd_sc_ls__buf_4.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__buf_4 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/buf/sky130_fd_sc_ls__buf_8.v b/cells/buf/sky130_fd_sc_ls__buf_8.v
index 31261cd..9155374 100644
--- a/cells/buf/sky130_fd_sc_ls__buf_8.v
+++ b/cells/buf/sky130_fd_sc_ls__buf_8.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__buf_8 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/bufbuf/sky130_fd_sc_ls__bufbuf_16.v b/cells/bufbuf/sky130_fd_sc_ls__bufbuf_16.v
index 4bba6b8..6268c85 100644
--- a/cells/bufbuf/sky130_fd_sc_ls__bufbuf_16.v
+++ b/cells/bufbuf/sky130_fd_sc_ls__bufbuf_16.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__bufbuf_16 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/bufbuf/sky130_fd_sc_ls__bufbuf_8.v b/cells/bufbuf/sky130_fd_sc_ls__bufbuf_8.v
index 5c2ddaf..2c1037a 100644
--- a/cells/bufbuf/sky130_fd_sc_ls__bufbuf_8.v
+++ b/cells/bufbuf/sky130_fd_sc_ls__bufbuf_8.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__bufbuf_8 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/bufinv/sky130_fd_sc_ls__bufinv_16.v b/cells/bufinv/sky130_fd_sc_ls__bufinv_16.v
index a204f49..42c7925 100644
--- a/cells/bufinv/sky130_fd_sc_ls__bufinv_16.v
+++ b/cells/bufinv/sky130_fd_sc_ls__bufinv_16.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__bufinv_16 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/bufinv/sky130_fd_sc_ls__bufinv_8.v b/cells/bufinv/sky130_fd_sc_ls__bufinv_8.v
index 6681f99..ad65fd4 100644
--- a/cells/bufinv/sky130_fd_sc_ls__bufinv_8.v
+++ b/cells/bufinv/sky130_fd_sc_ls__bufinv_8.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__bufinv_8 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_1.v b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_1.v
index d0bb19e..ef6f867 100644
--- a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_1.v
+++ b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkbuf_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_16.v b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_16.v
index bf37acc..affb1a8 100644
--- a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_16.v
+++ b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_16.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkbuf_16 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_2.v b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_2.v
index 0cfeea5..8acabd2 100644
--- a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_2.v
+++ b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_2.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkbuf_2 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_4.v b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_4.v
index dc1a493..e257bea 100644
--- a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_4.v
+++ b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_4.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkbuf_4 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_8.v b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_8.v
index 570de54..c4e45ce 100644
--- a/cells/clkbuf/sky130_fd_sc_ls__clkbuf_8.v
+++ b/cells/clkbuf/sky130_fd_sc_ls__clkbuf_8.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkbuf_8 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkdlyinv3sd1/sky130_fd_sc_ls__clkdlyinv3sd1_1.v b/cells/clkdlyinv3sd1/sky130_fd_sc_ls__clkdlyinv3sd1_1.v
index b5895b0..e80ab89 100644
--- a/cells/clkdlyinv3sd1/sky130_fd_sc_ls__clkdlyinv3sd1_1.v
+++ b/cells/clkdlyinv3sd1/sky130_fd_sc_ls__clkdlyinv3sd1_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__clkdlyinv3sd1_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkdlyinv3sd2/sky130_fd_sc_ls__clkdlyinv3sd2_1.v b/cells/clkdlyinv3sd2/sky130_fd_sc_ls__clkdlyinv3sd2_1.v
index d120c15..fda160b 100644
--- a/cells/clkdlyinv3sd2/sky130_fd_sc_ls__clkdlyinv3sd2_1.v
+++ b/cells/clkdlyinv3sd2/sky130_fd_sc_ls__clkdlyinv3sd2_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__clkdlyinv3sd2_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkdlyinv3sd3/sky130_fd_sc_ls__clkdlyinv3sd3_1.v b/cells/clkdlyinv3sd3/sky130_fd_sc_ls__clkdlyinv3sd3_1.v
index b100228..2e18524 100644
--- a/cells/clkdlyinv3sd3/sky130_fd_sc_ls__clkdlyinv3sd3_1.v
+++ b/cells/clkdlyinv3sd3/sky130_fd_sc_ls__clkdlyinv3sd3_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__clkdlyinv3sd3_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkdlyinv5sd1/sky130_fd_sc_ls__clkdlyinv5sd1_1.v b/cells/clkdlyinv5sd1/sky130_fd_sc_ls__clkdlyinv5sd1_1.v
index f322a70..6249a19 100644
--- a/cells/clkdlyinv5sd1/sky130_fd_sc_ls__clkdlyinv5sd1_1.v
+++ b/cells/clkdlyinv5sd1/sky130_fd_sc_ls__clkdlyinv5sd1_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__clkdlyinv5sd1_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkdlyinv5sd2/sky130_fd_sc_ls__clkdlyinv5sd2_1.v b/cells/clkdlyinv5sd2/sky130_fd_sc_ls__clkdlyinv5sd2_1.v
index abeaedd..300d805 100644
--- a/cells/clkdlyinv5sd2/sky130_fd_sc_ls__clkdlyinv5sd2_1.v
+++ b/cells/clkdlyinv5sd2/sky130_fd_sc_ls__clkdlyinv5sd2_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__clkdlyinv5sd2_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkdlyinv5sd3/sky130_fd_sc_ls__clkdlyinv5sd3_1.v b/cells/clkdlyinv5sd3/sky130_fd_sc_ls__clkdlyinv5sd3_1.v
index b7de4bd..e411bf1 100644
--- a/cells/clkdlyinv5sd3/sky130_fd_sc_ls__clkdlyinv5sd3_1.v
+++ b/cells/clkdlyinv5sd3/sky130_fd_sc_ls__clkdlyinv5sd3_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__clkdlyinv5sd3_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_ls__clkinv_1.v b/cells/clkinv/sky130_fd_sc_ls__clkinv_1.v
index 0cdfea3..16f240c 100644
--- a/cells/clkinv/sky130_fd_sc_ls__clkinv_1.v
+++ b/cells/clkinv/sky130_fd_sc_ls__clkinv_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkinv_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_ls__clkinv_16.v b/cells/clkinv/sky130_fd_sc_ls__clkinv_16.v
index b093ad1..7b7e5e3 100644
--- a/cells/clkinv/sky130_fd_sc_ls__clkinv_16.v
+++ b/cells/clkinv/sky130_fd_sc_ls__clkinv_16.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkinv_16 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_ls__clkinv_2.v b/cells/clkinv/sky130_fd_sc_ls__clkinv_2.v
index 17e9db4..8df6bcc 100644
--- a/cells/clkinv/sky130_fd_sc_ls__clkinv_2.v
+++ b/cells/clkinv/sky130_fd_sc_ls__clkinv_2.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkinv_2 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_ls__clkinv_4.v b/cells/clkinv/sky130_fd_sc_ls__clkinv_4.v
index eccdccc..04f2ec1 100644
--- a/cells/clkinv/sky130_fd_sc_ls__clkinv_4.v
+++ b/cells/clkinv/sky130_fd_sc_ls__clkinv_4.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkinv_4 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/clkinv/sky130_fd_sc_ls__clkinv_8.v b/cells/clkinv/sky130_fd_sc_ls__clkinv_8.v
index 7219087..4873d58 100644
--- a/cells/clkinv/sky130_fd_sc_ls__clkinv_8.v
+++ b/cells/clkinv/sky130_fd_sc_ls__clkinv_8.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__clkinv_8 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/conb/sky130_fd_sc_ls__conb_1.v b/cells/conb/sky130_fd_sc_ls__conb_1.v
index 44a60b4..f81af23 100644
--- a/cells/conb/sky130_fd_sc_ls__conb_1.v
+++ b/cells/conb/sky130_fd_sc_ls__conb_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__conb_1 (
- HI ,
- LO ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ HI,
+ LO
);
- output HI ;
- output LO ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output HI;
+ output LO;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/decap/sky130_fd_sc_ls__decap_4.v b/cells/decap/sky130_fd_sc_ls__decap_4.v
index 9cfd665..6a7a50d 100644
--- a/cells/decap/sky130_fd_sc_ls__decap_4.v
+++ b/cells/decap/sky130_fd_sc_ls__decap_4.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decap_4 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decap_4 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decap/sky130_fd_sc_ls__decap_8.v b/cells/decap/sky130_fd_sc_ls__decap_8.v
index ab38dfa..e78894a 100644
--- a/cells/decap/sky130_fd_sc_ls__decap_8.v
+++ b/cells/decap/sky130_fd_sc_ls__decap_8.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decap_8 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decap_8 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decaphe/sky130_fd_sc_ls__decaphe_18.v b/cells/decaphe/sky130_fd_sc_ls__decaphe_18.v
index c4bbba1..162c67b 100644
--- a/cells/decaphe/sky130_fd_sc_ls__decaphe_18.v
+++ b/cells/decaphe/sky130_fd_sc_ls__decaphe_18.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decaphe_18 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decaphe_18 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decaphe/sky130_fd_sc_ls__decaphe_2.v b/cells/decaphe/sky130_fd_sc_ls__decaphe_2.v
index 8a371c2..7caf259 100644
--- a/cells/decaphe/sky130_fd_sc_ls__decaphe_2.v
+++ b/cells/decaphe/sky130_fd_sc_ls__decaphe_2.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decaphe_2 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decaphe_2 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decaphe/sky130_fd_sc_ls__decaphe_3.v b/cells/decaphe/sky130_fd_sc_ls__decaphe_3.v
index 7580e30..cd2a094 100644
--- a/cells/decaphe/sky130_fd_sc_ls__decaphe_3.v
+++ b/cells/decaphe/sky130_fd_sc_ls__decaphe_3.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decaphe_3 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decaphe_3 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decaphe/sky130_fd_sc_ls__decaphe_4.v b/cells/decaphe/sky130_fd_sc_ls__decaphe_4.v
index 96973fe..0ff53e9 100644
--- a/cells/decaphe/sky130_fd_sc_ls__decaphe_4.v
+++ b/cells/decaphe/sky130_fd_sc_ls__decaphe_4.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decaphe_4 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decaphe_4 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decaphe/sky130_fd_sc_ls__decaphe_6.v b/cells/decaphe/sky130_fd_sc_ls__decaphe_6.v
index 840cb11..947002b 100644
--- a/cells/decaphe/sky130_fd_sc_ls__decaphe_6.v
+++ b/cells/decaphe/sky130_fd_sc_ls__decaphe_6.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decaphe_6 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decaphe_6 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decaphe/sky130_fd_sc_ls__decaphe_8.v b/cells/decaphe/sky130_fd_sc_ls__decaphe_8.v
index db22aca..7a25d71 100644
--- a/cells/decaphe/sky130_fd_sc_ls__decaphe_8.v
+++ b/cells/decaphe/sky130_fd_sc_ls__decaphe_8.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decaphe_8 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__decaphe_8 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/decaphetap/sky130_fd_sc_ls__decaphetap_2.v b/cells/decaphetap/sky130_fd_sc_ls__decaphetap_2.v
index b0f1deb..418e8a7 100644
--- a/cells/decaphetap/sky130_fd_sc_ls__decaphetap_2.v
+++ b/cells/decaphetap/sky130_fd_sc_ls__decaphetap_2.v
@@ -59,16 +59,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__decaphetap_2 (
- VPWR,
- VGND,
- VPB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
-
+module sky130_fd_sc_ls__decaphetap_2 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/dfbbn/sky130_fd_sc_ls__dfbbn_1.v b/cells/dfbbn/sky130_fd_sc_ls__dfbbn_1.v
index 8b439c2..234b647 100644
--- a/cells/dfbbn/sky130_fd_sc_ls__dfbbn_1.v
+++ b/cells/dfbbn/sky130_fd_sc_ls__dfbbn_1.v
@@ -87,11 +87,7 @@
D ,
CLK_N ,
SET_B ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -100,10 +96,6 @@
input CLK_N ;
input SET_B ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfbbn/sky130_fd_sc_ls__dfbbn_2.v b/cells/dfbbn/sky130_fd_sc_ls__dfbbn_2.v
index 08fb30c..6a221cd 100644
--- a/cells/dfbbn/sky130_fd_sc_ls__dfbbn_2.v
+++ b/cells/dfbbn/sky130_fd_sc_ls__dfbbn_2.v
@@ -87,11 +87,7 @@
D ,
CLK_N ,
SET_B ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -100,10 +96,6 @@
input CLK_N ;
input SET_B ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfbbp/sky130_fd_sc_ls__dfbbp_1.v b/cells/dfbbp/sky130_fd_sc_ls__dfbbp_1.v
index 0dd331b..4f6eb58 100644
--- a/cells/dfbbp/sky130_fd_sc_ls__dfbbp_1.v
+++ b/cells/dfbbp/sky130_fd_sc_ls__dfbbp_1.v
@@ -87,11 +87,7 @@
D ,
CLK ,
SET_B ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -100,10 +96,6 @@
input CLK ;
input SET_B ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfrbp/sky130_fd_sc_ls__dfrbp_1.v b/cells/dfrbp/sky130_fd_sc_ls__dfrbp_1.v
index 44af701..9e6527b 100644
--- a/cells/dfrbp/sky130_fd_sc_ls__dfrbp_1.v
+++ b/cells/dfrbp/sky130_fd_sc_ls__dfrbp_1.v
@@ -82,11 +82,7 @@
Q_N ,
CLK ,
D ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -94,10 +90,6 @@
input CLK ;
input D ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfrbp/sky130_fd_sc_ls__dfrbp_2.v b/cells/dfrbp/sky130_fd_sc_ls__dfrbp_2.v
index b30cc4b..6389cf3 100644
--- a/cells/dfrbp/sky130_fd_sc_ls__dfrbp_2.v
+++ b/cells/dfrbp/sky130_fd_sc_ls__dfrbp_2.v
@@ -82,11 +82,7 @@
Q_N ,
CLK ,
D ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -94,10 +90,6 @@
input CLK ;
input D ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfrtn/sky130_fd_sc_ls__dfrtn_1.v b/cells/dfrtn/sky130_fd_sc_ls__dfrtn_1.v
index 6b8cc9a..f46f6bd 100644
--- a/cells/dfrtn/sky130_fd_sc_ls__dfrtn_1.v
+++ b/cells/dfrtn/sky130_fd_sc_ls__dfrtn_1.v
@@ -79,21 +79,13 @@
Q ,
CLK_N ,
D ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
input CLK_N ;
input D ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfrtp/sky130_fd_sc_ls__dfrtp_1.v b/cells/dfrtp/sky130_fd_sc_ls__dfrtp_1.v
index 0830d9c..02bd89f 100644
--- a/cells/dfrtp/sky130_fd_sc_ls__dfrtp_1.v
+++ b/cells/dfrtp/sky130_fd_sc_ls__dfrtp_1.v
@@ -78,21 +78,13 @@
Q ,
CLK ,
D ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
input CLK ;
input D ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfrtp/sky130_fd_sc_ls__dfrtp_2.v b/cells/dfrtp/sky130_fd_sc_ls__dfrtp_2.v
index 1397a3a..926bdcf 100644
--- a/cells/dfrtp/sky130_fd_sc_ls__dfrtp_2.v
+++ b/cells/dfrtp/sky130_fd_sc_ls__dfrtp_2.v
@@ -78,21 +78,13 @@
Q ,
CLK ,
D ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
input CLK ;
input D ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfrtp/sky130_fd_sc_ls__dfrtp_4.v b/cells/dfrtp/sky130_fd_sc_ls__dfrtp_4.v
index b5d305a..ce022ec 100644
--- a/cells/dfrtp/sky130_fd_sc_ls__dfrtp_4.v
+++ b/cells/dfrtp/sky130_fd_sc_ls__dfrtp_4.v
@@ -78,21 +78,13 @@
Q ,
CLK ,
D ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
input CLK ;
input D ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfsbp/sky130_fd_sc_ls__dfsbp_1.v b/cells/dfsbp/sky130_fd_sc_ls__dfsbp_1.v
index 7f77ca4..f8b66a6 100644
--- a/cells/dfsbp/sky130_fd_sc_ls__dfsbp_1.v
+++ b/cells/dfsbp/sky130_fd_sc_ls__dfsbp_1.v
@@ -82,11 +82,7 @@
Q_N ,
CLK ,
D ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
@@ -94,10 +90,6 @@
input CLK ;
input D ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfsbp/sky130_fd_sc_ls__dfsbp_2.v b/cells/dfsbp/sky130_fd_sc_ls__dfsbp_2.v
index 8634e4b..a456497 100644
--- a/cells/dfsbp/sky130_fd_sc_ls__dfsbp_2.v
+++ b/cells/dfsbp/sky130_fd_sc_ls__dfsbp_2.v
@@ -82,11 +82,7 @@
Q_N ,
CLK ,
D ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
@@ -94,10 +90,6 @@
input CLK ;
input D ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfstp/sky130_fd_sc_ls__dfstp_1.v b/cells/dfstp/sky130_fd_sc_ls__dfstp_1.v
index 353a98f..53891c6 100644
--- a/cells/dfstp/sky130_fd_sc_ls__dfstp_1.v
+++ b/cells/dfstp/sky130_fd_sc_ls__dfstp_1.v
@@ -78,21 +78,13 @@
Q ,
CLK ,
D ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
input CLK ;
input D ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfstp/sky130_fd_sc_ls__dfstp_2.v b/cells/dfstp/sky130_fd_sc_ls__dfstp_2.v
index 3985b5f..2c4d02c 100644
--- a/cells/dfstp/sky130_fd_sc_ls__dfstp_2.v
+++ b/cells/dfstp/sky130_fd_sc_ls__dfstp_2.v
@@ -78,21 +78,13 @@
Q ,
CLK ,
D ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
input CLK ;
input D ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfstp/sky130_fd_sc_ls__dfstp_4.v b/cells/dfstp/sky130_fd_sc_ls__dfstp_4.v
index eebdd2d..43ab6ab 100644
--- a/cells/dfstp/sky130_fd_sc_ls__dfstp_4.v
+++ b/cells/dfstp/sky130_fd_sc_ls__dfstp_4.v
@@ -78,21 +78,13 @@
Q ,
CLK ,
D ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
input CLK ;
input D ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfxbp/sky130_fd_sc_ls__dfxbp_1.v b/cells/dfxbp/sky130_fd_sc_ls__dfxbp_1.v
index 72441b2..76065d2 100644
--- a/cells/dfxbp/sky130_fd_sc_ls__dfxbp_1.v
+++ b/cells/dfxbp/sky130_fd_sc_ls__dfxbp_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__dfxbp_1 (
- Q ,
- Q_N ,
- CLK ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ Q_N,
+ CLK,
+ D
);
- output Q ;
- output Q_N ;
- input CLK ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ output Q_N;
+ input CLK;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfxbp/sky130_fd_sc_ls__dfxbp_2.v b/cells/dfxbp/sky130_fd_sc_ls__dfxbp_2.v
index 18ea144..805d5a0 100644
--- a/cells/dfxbp/sky130_fd_sc_ls__dfxbp_2.v
+++ b/cells/dfxbp/sky130_fd_sc_ls__dfxbp_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__dfxbp_2 (
- Q ,
- Q_N ,
- CLK ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ Q_N,
+ CLK,
+ D
);
- output Q ;
- output Q_N ;
- input CLK ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ output Q_N;
+ input CLK;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfxtp/sky130_fd_sc_ls__dfxtp_1.v b/cells/dfxtp/sky130_fd_sc_ls__dfxtp_1.v
index 6c98d1c..72da023 100644
--- a/cells/dfxtp/sky130_fd_sc_ls__dfxtp_1.v
+++ b/cells/dfxtp/sky130_fd_sc_ls__dfxtp_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__dfxtp_1 (
- Q ,
- CLK ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D
);
- output Q ;
- input CLK ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfxtp/sky130_fd_sc_ls__dfxtp_2.v b/cells/dfxtp/sky130_fd_sc_ls__dfxtp_2.v
index d1b56d2..224a70d 100644
--- a/cells/dfxtp/sky130_fd_sc_ls__dfxtp_2.v
+++ b/cells/dfxtp/sky130_fd_sc_ls__dfxtp_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__dfxtp_2 (
- Q ,
- CLK ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D
);
- output Q ;
- input CLK ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dfxtp/sky130_fd_sc_ls__dfxtp_4.v b/cells/dfxtp/sky130_fd_sc_ls__dfxtp_4.v
index a4e5791..a2325cd 100644
--- a/cells/dfxtp/sky130_fd_sc_ls__dfxtp_4.v
+++ b/cells/dfxtp/sky130_fd_sc_ls__dfxtp_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__dfxtp_4 (
- Q ,
- CLK ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D
);
- output Q ;
- input CLK ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/diode/sky130_fd_sc_ls__diode_2.v b/cells/diode/sky130_fd_sc_ls__diode_2.v
index e429869..a6af261 100644
--- a/cells/diode/sky130_fd_sc_ls__diode_2.v
+++ b/cells/diode/sky130_fd_sc_ls__diode_2.v
@@ -66,18 +66,10 @@
`celldefine
module sky130_fd_sc_ls__diode_2 (
- DIODE,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ DIODE
);
input DIODE;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlclkp/sky130_fd_sc_ls__dlclkp_1.v b/cells/dlclkp/sky130_fd_sc_ls__dlclkp_1.v
index 3cb12f3..f78e88f 100644
--- a/cells/dlclkp/sky130_fd_sc_ls__dlclkp_1.v
+++ b/cells/dlclkp/sky130_fd_sc_ls__dlclkp_1.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__dlclkp_1 (
GCLK,
GATE,
- CLK ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CLK
);
output GCLK;
input GATE;
input CLK ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlclkp/sky130_fd_sc_ls__dlclkp_2.v b/cells/dlclkp/sky130_fd_sc_ls__dlclkp_2.v
index 11624a2..72074aa 100644
--- a/cells/dlclkp/sky130_fd_sc_ls__dlclkp_2.v
+++ b/cells/dlclkp/sky130_fd_sc_ls__dlclkp_2.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__dlclkp_2 (
GCLK,
GATE,
- CLK ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CLK
);
output GCLK;
input GATE;
input CLK ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlclkp/sky130_fd_sc_ls__dlclkp_4.v b/cells/dlclkp/sky130_fd_sc_ls__dlclkp_4.v
index 5f39bdc..9e6cc42 100644
--- a/cells/dlclkp/sky130_fd_sc_ls__dlclkp_4.v
+++ b/cells/dlclkp/sky130_fd_sc_ls__dlclkp_4.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__dlclkp_4 (
GCLK,
GATE,
- CLK ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CLK
);
output GCLK;
input GATE;
input CLK ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrbn/sky130_fd_sc_ls__dlrbn_1.v b/cells/dlrbn/sky130_fd_sc_ls__dlrbn_1.v
index 5afba00..b59a355 100644
--- a/cells/dlrbn/sky130_fd_sc_ls__dlrbn_1.v
+++ b/cells/dlrbn/sky130_fd_sc_ls__dlrbn_1.v
@@ -83,11 +83,7 @@
Q_N ,
RESET_B,
D ,
- GATE_N ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
@@ -95,10 +91,6 @@
input RESET_B;
input D ;
input GATE_N ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrbn/sky130_fd_sc_ls__dlrbn_2.v b/cells/dlrbn/sky130_fd_sc_ls__dlrbn_2.v
index 01eb666..13d791f 100644
--- a/cells/dlrbn/sky130_fd_sc_ls__dlrbn_2.v
+++ b/cells/dlrbn/sky130_fd_sc_ls__dlrbn_2.v
@@ -83,11 +83,7 @@
Q_N ,
RESET_B,
D ,
- GATE_N ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
@@ -95,10 +91,6 @@
input RESET_B;
input D ;
input GATE_N ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrbp/sky130_fd_sc_ls__dlrbp_1.v b/cells/dlrbp/sky130_fd_sc_ls__dlrbp_1.v
index 38b8537..2bab405 100644
--- a/cells/dlrbp/sky130_fd_sc_ls__dlrbp_1.v
+++ b/cells/dlrbp/sky130_fd_sc_ls__dlrbp_1.v
@@ -83,11 +83,7 @@
Q_N ,
RESET_B,
D ,
- GATE ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE
);
output Q ;
@@ -95,10 +91,6 @@
input RESET_B;
input D ;
input GATE ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrbp/sky130_fd_sc_ls__dlrbp_2.v b/cells/dlrbp/sky130_fd_sc_ls__dlrbp_2.v
index e11e5ef..4c82e45 100644
--- a/cells/dlrbp/sky130_fd_sc_ls__dlrbp_2.v
+++ b/cells/dlrbp/sky130_fd_sc_ls__dlrbp_2.v
@@ -83,11 +83,7 @@
Q_N ,
RESET_B,
D ,
- GATE ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE
);
output Q ;
@@ -95,10 +91,6 @@
input RESET_B;
input D ;
input GATE ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrtn/sky130_fd_sc_ls__dlrtn_1.v b/cells/dlrtn/sky130_fd_sc_ls__dlrtn_1.v
index 5a60711..ada5792 100644
--- a/cells/dlrtn/sky130_fd_sc_ls__dlrtn_1.v
+++ b/cells/dlrtn/sky130_fd_sc_ls__dlrtn_1.v
@@ -78,21 +78,13 @@
Q ,
RESET_B,
D ,
- GATE_N ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
input RESET_B;
input D ;
input GATE_N ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrtn/sky130_fd_sc_ls__dlrtn_2.v b/cells/dlrtn/sky130_fd_sc_ls__dlrtn_2.v
index 736ecac..b30483f 100644
--- a/cells/dlrtn/sky130_fd_sc_ls__dlrtn_2.v
+++ b/cells/dlrtn/sky130_fd_sc_ls__dlrtn_2.v
@@ -78,21 +78,13 @@
Q ,
RESET_B,
D ,
- GATE_N ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
input RESET_B;
input D ;
input GATE_N ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrtn/sky130_fd_sc_ls__dlrtn_4.v b/cells/dlrtn/sky130_fd_sc_ls__dlrtn_4.v
index 3bb3629..f5e1e75 100644
--- a/cells/dlrtn/sky130_fd_sc_ls__dlrtn_4.v
+++ b/cells/dlrtn/sky130_fd_sc_ls__dlrtn_4.v
@@ -78,21 +78,13 @@
Q ,
RESET_B,
D ,
- GATE_N ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
input RESET_B;
input D ;
input GATE_N ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_ls__dlrtp_1.v b/cells/dlrtp/sky130_fd_sc_ls__dlrtp_1.v
index 98f989a..9741ad3 100644
--- a/cells/dlrtp/sky130_fd_sc_ls__dlrtp_1.v
+++ b/cells/dlrtp/sky130_fd_sc_ls__dlrtp_1.v
@@ -79,21 +79,13 @@
Q ,
RESET_B,
D ,
- GATE ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE
);
output Q ;
input RESET_B;
input D ;
input GATE ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_ls__dlrtp_2.v b/cells/dlrtp/sky130_fd_sc_ls__dlrtp_2.v
index 5a4e87f..e885904 100644
--- a/cells/dlrtp/sky130_fd_sc_ls__dlrtp_2.v
+++ b/cells/dlrtp/sky130_fd_sc_ls__dlrtp_2.v
@@ -79,21 +79,13 @@
Q ,
RESET_B,
D ,
- GATE ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE
);
output Q ;
input RESET_B;
input D ;
input GATE ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlrtp/sky130_fd_sc_ls__dlrtp_4.v b/cells/dlrtp/sky130_fd_sc_ls__dlrtp_4.v
index 1ab7cf2..3efe5c2 100644
--- a/cells/dlrtp/sky130_fd_sc_ls__dlrtp_4.v
+++ b/cells/dlrtp/sky130_fd_sc_ls__dlrtp_4.v
@@ -79,21 +79,13 @@
Q ,
RESET_B,
D ,
- GATE ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE
);
output Q ;
input RESET_B;
input D ;
input GATE ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlxbn/sky130_fd_sc_ls__dlxbn_1.v b/cells/dlxbn/sky130_fd_sc_ls__dlxbn_1.v
index 56b2399..916e11b 100644
--- a/cells/dlxbn/sky130_fd_sc_ls__dlxbn_1.v
+++ b/cells/dlxbn/sky130_fd_sc_ls__dlxbn_1.v
@@ -78,21 +78,13 @@
Q ,
Q_N ,
D ,
- GATE_N,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
output Q_N ;
input D ;
input GATE_N;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlxbn/sky130_fd_sc_ls__dlxbn_2.v b/cells/dlxbn/sky130_fd_sc_ls__dlxbn_2.v
index a778ff5..2d27172 100644
--- a/cells/dlxbn/sky130_fd_sc_ls__dlxbn_2.v
+++ b/cells/dlxbn/sky130_fd_sc_ls__dlxbn_2.v
@@ -78,21 +78,13 @@
Q ,
Q_N ,
D ,
- GATE_N,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
output Q_N ;
input D ;
input GATE_N;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlxbp/sky130_fd_sc_ls__dlxbp_1.v b/cells/dlxbp/sky130_fd_sc_ls__dlxbp_1.v
index 3933091..489e5c9 100644
--- a/cells/dlxbp/sky130_fd_sc_ls__dlxbp_1.v
+++ b/cells/dlxbp/sky130_fd_sc_ls__dlxbp_1.v
@@ -78,21 +78,13 @@
Q ,
Q_N ,
D ,
- GATE,
- VPWR,
- VGND,
- VPB ,
- VNB
+ GATE
);
output Q ;
output Q_N ;
input D ;
input GATE;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlxtn/sky130_fd_sc_ls__dlxtn_1.v b/cells/dlxtn/sky130_fd_sc_ls__dlxtn_1.v
index 17f19cb..83b6fb2 100644
--- a/cells/dlxtn/sky130_fd_sc_ls__dlxtn_1.v
+++ b/cells/dlxtn/sky130_fd_sc_ls__dlxtn_1.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__dlxtn_1 (
Q ,
D ,
- GATE_N,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
input D ;
input GATE_N;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlxtn/sky130_fd_sc_ls__dlxtn_2.v b/cells/dlxtn/sky130_fd_sc_ls__dlxtn_2.v
index 35ccf6e..cc6f185 100644
--- a/cells/dlxtn/sky130_fd_sc_ls__dlxtn_2.v
+++ b/cells/dlxtn/sky130_fd_sc_ls__dlxtn_2.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__dlxtn_2 (
Q ,
D ,
- GATE_N,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
input D ;
input GATE_N;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlxtn/sky130_fd_sc_ls__dlxtn_4.v b/cells/dlxtn/sky130_fd_sc_ls__dlxtn_4.v
index ff11904..3e7282a 100644
--- a/cells/dlxtn/sky130_fd_sc_ls__dlxtn_4.v
+++ b/cells/dlxtn/sky130_fd_sc_ls__dlxtn_4.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__dlxtn_4 (
Q ,
D ,
- GATE_N,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ GATE_N
);
output Q ;
input D ;
input GATE_N;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlxtp/sky130_fd_sc_ls__dlxtp_1.v b/cells/dlxtp/sky130_fd_sc_ls__dlxtp_1.v
index 5cd26de..04a40b8 100644
--- a/cells/dlxtp/sky130_fd_sc_ls__dlxtp_1.v
+++ b/cells/dlxtp/sky130_fd_sc_ls__dlxtp_1.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__dlxtp_1 (
Q ,
D ,
- GATE,
- VPWR,
- VGND,
- VPB ,
- VNB
+ GATE
);
output Q ;
input D ;
input GATE;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlygate4sd1/sky130_fd_sc_ls__dlygate4sd1_1.v b/cells/dlygate4sd1/sky130_fd_sc_ls__dlygate4sd1_1.v
index 1449064..bdf9486 100644
--- a/cells/dlygate4sd1/sky130_fd_sc_ls__dlygate4sd1_1.v
+++ b/cells/dlygate4sd1/sky130_fd_sc_ls__dlygate4sd1_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__dlygate4sd1_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlygate4sd2/sky130_fd_sc_ls__dlygate4sd2_1.v b/cells/dlygate4sd2/sky130_fd_sc_ls__dlygate4sd2_1.v
index 930d57c..0d3b35d 100644
--- a/cells/dlygate4sd2/sky130_fd_sc_ls__dlygate4sd2_1.v
+++ b/cells/dlygate4sd2/sky130_fd_sc_ls__dlygate4sd2_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__dlygate4sd2_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlygate4sd3/sky130_fd_sc_ls__dlygate4sd3_1.v b/cells/dlygate4sd3/sky130_fd_sc_ls__dlygate4sd3_1.v
index b3a1d17..ff057c4 100644
--- a/cells/dlygate4sd3/sky130_fd_sc_ls__dlygate4sd3_1.v
+++ b/cells/dlygate4sd3/sky130_fd_sc_ls__dlygate4sd3_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__dlygate4sd3_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlymetal6s2s/sky130_fd_sc_ls__dlymetal6s2s_1.v b/cells/dlymetal6s2s/sky130_fd_sc_ls__dlymetal6s2s_1.v
index 710e966..fdbfa0f 100644
--- a/cells/dlymetal6s2s/sky130_fd_sc_ls__dlymetal6s2s_1.v
+++ b/cells/dlymetal6s2s/sky130_fd_sc_ls__dlymetal6s2s_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__dlymetal6s2s_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlymetal6s4s/sky130_fd_sc_ls__dlymetal6s4s_1.v b/cells/dlymetal6s4s/sky130_fd_sc_ls__dlymetal6s4s_1.v
index 39ea35d..118a2cb 100644
--- a/cells/dlymetal6s4s/sky130_fd_sc_ls__dlymetal6s4s_1.v
+++ b/cells/dlymetal6s4s/sky130_fd_sc_ls__dlymetal6s4s_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__dlymetal6s4s_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/dlymetal6s6s/sky130_fd_sc_ls__dlymetal6s6s_1.v b/cells/dlymetal6s6s/sky130_fd_sc_ls__dlymetal6s6s_1.v
index 8fcdbf2..a85dfcf 100644
--- a/cells/dlymetal6s6s/sky130_fd_sc_ls__dlymetal6s6s_1.v
+++ b/cells/dlymetal6s6s/sky130_fd_sc_ls__dlymetal6s6s_1.v
@@ -70,20 +70,12 @@
`celldefine
module sky130_fd_sc_ls__dlymetal6s6s_1 (
- X ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A
);
- output X ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_ls__ebufn_1.v b/cells/ebufn/sky130_fd_sc_ls__ebufn_1.v
index ed523d8..f3d4738 100644
--- a/cells/ebufn/sky130_fd_sc_ls__ebufn_1.v
+++ b/cells/ebufn/sky130_fd_sc_ls__ebufn_1.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__ebufn_1 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_ls__ebufn_2.v b/cells/ebufn/sky130_fd_sc_ls__ebufn_2.v
index 70de594..2c6a9a4 100644
--- a/cells/ebufn/sky130_fd_sc_ls__ebufn_2.v
+++ b/cells/ebufn/sky130_fd_sc_ls__ebufn_2.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__ebufn_2 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_ls__ebufn_4.v b/cells/ebufn/sky130_fd_sc_ls__ebufn_4.v
index 5493b57..febf41b 100644
--- a/cells/ebufn/sky130_fd_sc_ls__ebufn_4.v
+++ b/cells/ebufn/sky130_fd_sc_ls__ebufn_4.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__ebufn_4 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/ebufn/sky130_fd_sc_ls__ebufn_8.v b/cells/ebufn/sky130_fd_sc_ls__ebufn_8.v
index c7626c5..1e8593a 100644
--- a/cells/ebufn/sky130_fd_sc_ls__ebufn_8.v
+++ b/cells/ebufn/sky130_fd_sc_ls__ebufn_8.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__ebufn_8 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/edfxbp/sky130_fd_sc_ls__edfxbp_1.v b/cells/edfxbp/sky130_fd_sc_ls__edfxbp_1.v
index 7471642..931827b 100644
--- a/cells/edfxbp/sky130_fd_sc_ls__edfxbp_1.v
+++ b/cells/edfxbp/sky130_fd_sc_ls__edfxbp_1.v
@@ -79,26 +79,18 @@
`celldefine
module sky130_fd_sc_ls__edfxbp_1 (
- Q ,
- Q_N ,
- CLK ,
- D ,
- DE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ Q_N,
+ CLK,
+ D ,
+ DE
);
- output Q ;
- output Q_N ;
- input CLK ;
- input D ;
- input DE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ output Q_N;
+ input CLK;
+ input D ;
+ input DE ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/edfxtp/sky130_fd_sc_ls__edfxtp_1.v b/cells/edfxtp/sky130_fd_sc_ls__edfxtp_1.v
index c4d0a04..b86ea54 100644
--- a/cells/edfxtp/sky130_fd_sc_ls__edfxtp_1.v
+++ b/cells/edfxtp/sky130_fd_sc_ls__edfxtp_1.v
@@ -76,24 +76,16 @@
`celldefine
module sky130_fd_sc_ls__edfxtp_1 (
- Q ,
- CLK ,
- D ,
- DE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D ,
+ DE
);
- output Q ;
- input CLK ;
- input D ;
- input DE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
+ input DE ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_ls__einvn_1.v b/cells/einvn/sky130_fd_sc_ls__einvn_1.v
index a184474..0afdabc 100644
--- a/cells/einvn/sky130_fd_sc_ls__einvn_1.v
+++ b/cells/einvn/sky130_fd_sc_ls__einvn_1.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__einvn_1 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_ls__einvn_2.v b/cells/einvn/sky130_fd_sc_ls__einvn_2.v
index c68d411..9d319d2 100644
--- a/cells/einvn/sky130_fd_sc_ls__einvn_2.v
+++ b/cells/einvn/sky130_fd_sc_ls__einvn_2.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__einvn_2 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_ls__einvn_4.v b/cells/einvn/sky130_fd_sc_ls__einvn_4.v
index 7268742..42d1138 100644
--- a/cells/einvn/sky130_fd_sc_ls__einvn_4.v
+++ b/cells/einvn/sky130_fd_sc_ls__einvn_4.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__einvn_4 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvn/sky130_fd_sc_ls__einvn_8.v b/cells/einvn/sky130_fd_sc_ls__einvn_8.v
index 4a89c5a..e30d80c 100644
--- a/cells/einvn/sky130_fd_sc_ls__einvn_8.v
+++ b/cells/einvn/sky130_fd_sc_ls__einvn_8.v
@@ -74,20 +74,12 @@
module sky130_fd_sc_ls__einvn_8 (
Z ,
A ,
- TE_B,
- VPWR,
- VGND,
- VPB ,
- VNB
+ TE_B
);
output Z ;
input A ;
input TE_B;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_ls__einvp_1.v b/cells/einvp/sky130_fd_sc_ls__einvp_1.v
index 437c5e1..c6dce00 100644
--- a/cells/einvp/sky130_fd_sc_ls__einvp_1.v
+++ b/cells/einvp/sky130_fd_sc_ls__einvp_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__einvp_1 (
- Z ,
- A ,
- TE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Z ,
+ A ,
+ TE
);
- output Z ;
- input A ;
- input TE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Z ;
+ input A ;
+ input TE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_ls__einvp_2.v b/cells/einvp/sky130_fd_sc_ls__einvp_2.v
index 22c35b4..352313e 100644
--- a/cells/einvp/sky130_fd_sc_ls__einvp_2.v
+++ b/cells/einvp/sky130_fd_sc_ls__einvp_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__einvp_2 (
- Z ,
- A ,
- TE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Z ,
+ A ,
+ TE
);
- output Z ;
- input A ;
- input TE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Z ;
+ input A ;
+ input TE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_ls__einvp_4.v b/cells/einvp/sky130_fd_sc_ls__einvp_4.v
index 5460f9b..e0a1385 100644
--- a/cells/einvp/sky130_fd_sc_ls__einvp_4.v
+++ b/cells/einvp/sky130_fd_sc_ls__einvp_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__einvp_4 (
- Z ,
- A ,
- TE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Z ,
+ A ,
+ TE
);
- output Z ;
- input A ;
- input TE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Z ;
+ input A ;
+ input TE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/einvp/sky130_fd_sc_ls__einvp_8.v b/cells/einvp/sky130_fd_sc_ls__einvp_8.v
index 8781553..4ded474 100644
--- a/cells/einvp/sky130_fd_sc_ls__einvp_8.v
+++ b/cells/einvp/sky130_fd_sc_ls__einvp_8.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__einvp_8 (
- Z ,
- A ,
- TE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Z ,
+ A ,
+ TE
);
- output Z ;
- input A ;
- input TE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Z ;
+ input A ;
+ input TE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_ls__fa_1.v b/cells/fa/sky130_fd_sc_ls__fa_1.v
index 1ce3efc..8996cff 100644
--- a/cells/fa/sky130_fd_sc_ls__fa_1.v
+++ b/cells/fa/sky130_fd_sc_ls__fa_1.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CIN ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CIN
);
output COUT;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CIN ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_ls__fa_2.v b/cells/fa/sky130_fd_sc_ls__fa_2.v
index 14bf370..b17bdd8 100644
--- a/cells/fa/sky130_fd_sc_ls__fa_2.v
+++ b/cells/fa/sky130_fd_sc_ls__fa_2.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CIN ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CIN
);
output COUT;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CIN ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fa/sky130_fd_sc_ls__fa_4.v b/cells/fa/sky130_fd_sc_ls__fa_4.v
index 4e77ddb..8628069 100644
--- a/cells/fa/sky130_fd_sc_ls__fa_4.v
+++ b/cells/fa/sky130_fd_sc_ls__fa_4.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CIN ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CIN
);
output COUT;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CIN ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fah/sky130_fd_sc_ls__fah_1.v b/cells/fah/sky130_fd_sc_ls__fah_1.v
index c039e4e..8cc832b 100644
--- a/cells/fah/sky130_fd_sc_ls__fah_1.v
+++ b/cells/fah/sky130_fd_sc_ls__fah_1.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CI ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CI
);
output COUT;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CI ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fah/sky130_fd_sc_ls__fah_2.v b/cells/fah/sky130_fd_sc_ls__fah_2.v
index 67568de..1f68a14 100644
--- a/cells/fah/sky130_fd_sc_ls__fah_2.v
+++ b/cells/fah/sky130_fd_sc_ls__fah_2.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CI ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CI
);
output COUT;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CI ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fah/sky130_fd_sc_ls__fah_4.v b/cells/fah/sky130_fd_sc_ls__fah_4.v
index e1b6100..b1c2d1e 100644
--- a/cells/fah/sky130_fd_sc_ls__fah_4.v
+++ b/cells/fah/sky130_fd_sc_ls__fah_4.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CI ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CI
);
output COUT;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CI ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fahcin/sky130_fd_sc_ls__fahcin_1.v b/cells/fahcin/sky130_fd_sc_ls__fahcin_1.v
index 63469ca..cc3db6a 100644
--- a/cells/fahcin/sky130_fd_sc_ls__fahcin_1.v
+++ b/cells/fahcin/sky130_fd_sc_ls__fahcin_1.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CIN ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CIN
);
output COUT;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CIN ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fahcon/sky130_fd_sc_ls__fahcon_1.v b/cells/fahcon/sky130_fd_sc_ls__fahcon_1.v
index 83e98e0..ceb1f0b 100644
--- a/cells/fahcon/sky130_fd_sc_ls__fahcon_1.v
+++ b/cells/fahcon/sky130_fd_sc_ls__fahcon_1.v
@@ -82,11 +82,7 @@
SUM ,
A ,
B ,
- CI ,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ CI
);
output COUT_N;
@@ -94,10 +90,6 @@
input A ;
input B ;
input CI ;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/fill/sky130_fd_sc_ls__fill_1.v b/cells/fill/sky130_fd_sc_ls__fill_1.v
index 5420d1a..56bccab 100644
--- a/cells/fill/sky130_fd_sc_ls__fill_1.v
+++ b/cells/fill/sky130_fd_sc_ls__fill_1.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__fill_1 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__fill_1 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/fill/sky130_fd_sc_ls__fill_2.v b/cells/fill/sky130_fd_sc_ls__fill_2.v
index cd12a35..55137c2 100644
--- a/cells/fill/sky130_fd_sc_ls__fill_2.v
+++ b/cells/fill/sky130_fd_sc_ls__fill_2.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__fill_2 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__fill_2 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/fill/sky130_fd_sc_ls__fill_4.v b/cells/fill/sky130_fd_sc_ls__fill_4.v
index 448114c..bfff96e 100644
--- a/cells/fill/sky130_fd_sc_ls__fill_4.v
+++ b/cells/fill/sky130_fd_sc_ls__fill_4.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__fill_4 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__fill_4 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/fill/sky130_fd_sc_ls__fill_8.v b/cells/fill/sky130_fd_sc_ls__fill_8.v
index 915714d..828bbff 100644
--- a/cells/fill/sky130_fd_sc_ls__fill_8.v
+++ b/cells/fill/sky130_fd_sc_ls__fill_8.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__fill_8 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__fill_8 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/fill_diode/sky130_fd_sc_ls__fill_diode_2.v b/cells/fill_diode/sky130_fd_sc_ls__fill_diode_2.v
index 0597e41..16dc616 100644
--- a/cells/fill_diode/sky130_fd_sc_ls__fill_diode_2.v
+++ b/cells/fill_diode/sky130_fd_sc_ls__fill_diode_2.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__fill_diode_2 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__fill_diode_2 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/fill_diode/sky130_fd_sc_ls__fill_diode_4.v b/cells/fill_diode/sky130_fd_sc_ls__fill_diode_4.v
index 7d391ea..840d918 100644
--- a/cells/fill_diode/sky130_fd_sc_ls__fill_diode_4.v
+++ b/cells/fill_diode/sky130_fd_sc_ls__fill_diode_4.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__fill_diode_4 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__fill_diode_4 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/fill_diode/sky130_fd_sc_ls__fill_diode_8.v b/cells/fill_diode/sky130_fd_sc_ls__fill_diode_8.v
index 56a0fac..7c1040a 100644
--- a/cells/fill_diode/sky130_fd_sc_ls__fill_diode_8.v
+++ b/cells/fill_diode/sky130_fd_sc_ls__fill_diode_8.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__fill_diode_8 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__fill_diode_8 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/ha/sky130_fd_sc_ls__ha_1.v b/cells/ha/sky130_fd_sc_ls__ha_1.v
index fb33c5b..6734d6c 100644
--- a/cells/ha/sky130_fd_sc_ls__ha_1.v
+++ b/cells/ha/sky130_fd_sc_ls__ha_1.v
@@ -78,21 +78,13 @@
COUT,
SUM ,
A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B
);
output COUT;
output SUM ;
input A ;
input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/ha/sky130_fd_sc_ls__ha_2.v b/cells/ha/sky130_fd_sc_ls__ha_2.v
index 6f0195d..430365b 100644
--- a/cells/ha/sky130_fd_sc_ls__ha_2.v
+++ b/cells/ha/sky130_fd_sc_ls__ha_2.v
@@ -78,21 +78,13 @@
COUT,
SUM ,
A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B
);
output COUT;
output SUM ;
input A ;
input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/ha/sky130_fd_sc_ls__ha_4.v b/cells/ha/sky130_fd_sc_ls__ha_4.v
index 2c05904..a3f522e 100644
--- a/cells/ha/sky130_fd_sc_ls__ha_4.v
+++ b/cells/ha/sky130_fd_sc_ls__ha_4.v
@@ -78,21 +78,13 @@
COUT,
SUM ,
A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B
);
output COUT;
output SUM ;
input A ;
input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_ls__inv_1.v b/cells/inv/sky130_fd_sc_ls__inv_1.v
index fc9dc44..ecd84d3 100644
--- a/cells/inv/sky130_fd_sc_ls__inv_1.v
+++ b/cells/inv/sky130_fd_sc_ls__inv_1.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__inv_1 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_ls__inv_16.v b/cells/inv/sky130_fd_sc_ls__inv_16.v
index aee84f6..ee1531d 100644
--- a/cells/inv/sky130_fd_sc_ls__inv_16.v
+++ b/cells/inv/sky130_fd_sc_ls__inv_16.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__inv_16 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_ls__inv_2.v b/cells/inv/sky130_fd_sc_ls__inv_2.v
index d6e1cb2..f3a260b 100644
--- a/cells/inv/sky130_fd_sc_ls__inv_2.v
+++ b/cells/inv/sky130_fd_sc_ls__inv_2.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__inv_2 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_ls__inv_4.v b/cells/inv/sky130_fd_sc_ls__inv_4.v
index 04a8de4..b7c66d0 100644
--- a/cells/inv/sky130_fd_sc_ls__inv_4.v
+++ b/cells/inv/sky130_fd_sc_ls__inv_4.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__inv_4 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/inv/sky130_fd_sc_ls__inv_8.v b/cells/inv/sky130_fd_sc_ls__inv_8.v
index b152e44..49bac93 100644
--- a/cells/inv/sky130_fd_sc_ls__inv_8.v
+++ b/cells/inv/sky130_fd_sc_ls__inv_8.v
@@ -69,20 +69,12 @@
`celldefine
module sky130_fd_sc_ls__inv_8 (
- Y ,
- A ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A
);
- output Y ;
- input A ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_ls__maj3_1.v b/cells/maj3/sky130_fd_sc_ls__maj3_1.v
index bb42779..18e4c6f 100644
--- a/cells/maj3/sky130_fd_sc_ls__maj3_1.v
+++ b/cells/maj3/sky130_fd_sc_ls__maj3_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__maj3_1 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_ls__maj3_2.v b/cells/maj3/sky130_fd_sc_ls__maj3_2.v
index ff494c1..d8d9bb6 100644
--- a/cells/maj3/sky130_fd_sc_ls__maj3_2.v
+++ b/cells/maj3/sky130_fd_sc_ls__maj3_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__maj3_2 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/maj3/sky130_fd_sc_ls__maj3_4.v b/cells/maj3/sky130_fd_sc_ls__maj3_4.v
index f8ddb7a..60abaac 100644
--- a/cells/maj3/sky130_fd_sc_ls__maj3_4.v
+++ b/cells/maj3/sky130_fd_sc_ls__maj3_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__maj3_4 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_ls__mux2_1.v b/cells/mux2/sky130_fd_sc_ls__mux2_1.v
index 01727a1..c0c8e0d 100644
--- a/cells/mux2/sky130_fd_sc_ls__mux2_1.v
+++ b/cells/mux2/sky130_fd_sc_ls__mux2_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__mux2_1 (
- X ,
- A0 ,
- A1 ,
- S ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A0,
+ A1,
+ S
);
- output X ;
- input A0 ;
- input A1 ;
- input S ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A0;
+ input A1;
+ input S ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_ls__mux2_2.v b/cells/mux2/sky130_fd_sc_ls__mux2_2.v
index 3598916..631d025 100644
--- a/cells/mux2/sky130_fd_sc_ls__mux2_2.v
+++ b/cells/mux2/sky130_fd_sc_ls__mux2_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__mux2_2 (
- X ,
- A0 ,
- A1 ,
- S ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A0,
+ A1,
+ S
);
- output X ;
- input A0 ;
- input A1 ;
- input S ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A0;
+ input A1;
+ input S ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux2/sky130_fd_sc_ls__mux2_4.v b/cells/mux2/sky130_fd_sc_ls__mux2_4.v
index 1945f23..06eedfc 100644
--- a/cells/mux2/sky130_fd_sc_ls__mux2_4.v
+++ b/cells/mux2/sky130_fd_sc_ls__mux2_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__mux2_4 (
- X ,
- A0 ,
- A1 ,
- S ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A0,
+ A1,
+ S
);
- output X ;
- input A0 ;
- input A1 ;
- input S ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A0;
+ input A1;
+ input S ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_ls__mux2i_1.v b/cells/mux2i/sky130_fd_sc_ls__mux2i_1.v
index 71a7529..081e0f7 100644
--- a/cells/mux2i/sky130_fd_sc_ls__mux2i_1.v
+++ b/cells/mux2i/sky130_fd_sc_ls__mux2i_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__mux2i_1 (
- Y ,
- A0 ,
- A1 ,
- S ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A0,
+ A1,
+ S
);
- output Y ;
- input A0 ;
- input A1 ;
- input S ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A0;
+ input A1;
+ input S ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_ls__mux2i_2.v b/cells/mux2i/sky130_fd_sc_ls__mux2i_2.v
index 3669afe..cd74537 100644
--- a/cells/mux2i/sky130_fd_sc_ls__mux2i_2.v
+++ b/cells/mux2i/sky130_fd_sc_ls__mux2i_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__mux2i_2 (
- Y ,
- A0 ,
- A1 ,
- S ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A0,
+ A1,
+ S
);
- output Y ;
- input A0 ;
- input A1 ;
- input S ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A0;
+ input A1;
+ input S ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux2i/sky130_fd_sc_ls__mux2i_4.v b/cells/mux2i/sky130_fd_sc_ls__mux2i_4.v
index 1ebd89b..8eeb697 100644
--- a/cells/mux2i/sky130_fd_sc_ls__mux2i_4.v
+++ b/cells/mux2i/sky130_fd_sc_ls__mux2i_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__mux2i_4 (
- Y ,
- A0 ,
- A1 ,
- S ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A0,
+ A1,
+ S
);
- output Y ;
- input A0 ;
- input A1 ;
- input S ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A0;
+ input A1;
+ input S ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_ls__mux4_1.v b/cells/mux4/sky130_fd_sc_ls__mux4_1.v
index fefe2ef..9924024 100644
--- a/cells/mux4/sky130_fd_sc_ls__mux4_1.v
+++ b/cells/mux4/sky130_fd_sc_ls__mux4_1.v
@@ -84,30 +84,22 @@
`celldefine
module sky130_fd_sc_ls__mux4_1 (
- X ,
- A0 ,
- A1 ,
- A2 ,
- A3 ,
- S0 ,
- S1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A0,
+ A1,
+ A2,
+ A3,
+ S0,
+ S1
);
- output X ;
- input A0 ;
- input A1 ;
- input A2 ;
- input A3 ;
- input S0 ;
- input S1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A0;
+ input A1;
+ input A2;
+ input A3;
+ input S0;
+ input S1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_ls__mux4_2.v b/cells/mux4/sky130_fd_sc_ls__mux4_2.v
index b3434e5..e4801f4 100644
--- a/cells/mux4/sky130_fd_sc_ls__mux4_2.v
+++ b/cells/mux4/sky130_fd_sc_ls__mux4_2.v
@@ -84,30 +84,22 @@
`celldefine
module sky130_fd_sc_ls__mux4_2 (
- X ,
- A0 ,
- A1 ,
- A2 ,
- A3 ,
- S0 ,
- S1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A0,
+ A1,
+ A2,
+ A3,
+ S0,
+ S1
);
- output X ;
- input A0 ;
- input A1 ;
- input A2 ;
- input A3 ;
- input S0 ;
- input S1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A0;
+ input A1;
+ input A2;
+ input A3;
+ input S0;
+ input S1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/mux4/sky130_fd_sc_ls__mux4_4.v b/cells/mux4/sky130_fd_sc_ls__mux4_4.v
index 54d59e8..8bb9d13 100644
--- a/cells/mux4/sky130_fd_sc_ls__mux4_4.v
+++ b/cells/mux4/sky130_fd_sc_ls__mux4_4.v
@@ -84,30 +84,22 @@
`celldefine
module sky130_fd_sc_ls__mux4_4 (
- X ,
- A0 ,
- A1 ,
- A2 ,
- A3 ,
- S0 ,
- S1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A0,
+ A1,
+ A2,
+ A3,
+ S0,
+ S1
);
- output X ;
- input A0 ;
- input A1 ;
- input A2 ;
- input A3 ;
- input S0 ;
- input S1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A0;
+ input A1;
+ input A2;
+ input A3;
+ input S0;
+ input S1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_ls__nand2_1.v b/cells/nand2/sky130_fd_sc_ls__nand2_1.v
index 7cebcee..0b45e27 100644
--- a/cells/nand2/sky130_fd_sc_ls__nand2_1.v
+++ b/cells/nand2/sky130_fd_sc_ls__nand2_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nand2_1 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_ls__nand2_2.v b/cells/nand2/sky130_fd_sc_ls__nand2_2.v
index db4f75f..5c09b10 100644
--- a/cells/nand2/sky130_fd_sc_ls__nand2_2.v
+++ b/cells/nand2/sky130_fd_sc_ls__nand2_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nand2_2 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_ls__nand2_4.v b/cells/nand2/sky130_fd_sc_ls__nand2_4.v
index 1f04496..86e0d74 100644
--- a/cells/nand2/sky130_fd_sc_ls__nand2_4.v
+++ b/cells/nand2/sky130_fd_sc_ls__nand2_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nand2_4 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand2/sky130_fd_sc_ls__nand2_8.v b/cells/nand2/sky130_fd_sc_ls__nand2_8.v
index 48bd1af..9ab0044 100644
--- a/cells/nand2/sky130_fd_sc_ls__nand2_8.v
+++ b/cells/nand2/sky130_fd_sc_ls__nand2_8.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nand2_8 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_ls__nand2b_1.v b/cells/nand2b/sky130_fd_sc_ls__nand2b_1.v
index aed7d4e..33f6fc7 100644
--- a/cells/nand2b/sky130_fd_sc_ls__nand2b_1.v
+++ b/cells/nand2b/sky130_fd_sc_ls__nand2b_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nand2b_1 (
- Y ,
- A_N ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B
);
- output Y ;
- input A_N ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_ls__nand2b_2.v b/cells/nand2b/sky130_fd_sc_ls__nand2b_2.v
index deff73a..ec391c7 100644
--- a/cells/nand2b/sky130_fd_sc_ls__nand2b_2.v
+++ b/cells/nand2b/sky130_fd_sc_ls__nand2b_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nand2b_2 (
- Y ,
- A_N ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B
);
- output Y ;
- input A_N ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand2b/sky130_fd_sc_ls__nand2b_4.v b/cells/nand2b/sky130_fd_sc_ls__nand2b_4.v
index 46984d0..dd30817 100644
--- a/cells/nand2b/sky130_fd_sc_ls__nand2b_4.v
+++ b/cells/nand2b/sky130_fd_sc_ls__nand2b_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nand2b_4 (
- Y ,
- A_N ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B
);
- output Y ;
- input A_N ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_ls__nand3_1.v b/cells/nand3/sky130_fd_sc_ls__nand3_1.v
index 4f385aa..48cafa2 100644
--- a/cells/nand3/sky130_fd_sc_ls__nand3_1.v
+++ b/cells/nand3/sky130_fd_sc_ls__nand3_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__nand3_1 (
- Y ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_ls__nand3_2.v b/cells/nand3/sky130_fd_sc_ls__nand3_2.v
index 45f0d42..8878e75 100644
--- a/cells/nand3/sky130_fd_sc_ls__nand3_2.v
+++ b/cells/nand3/sky130_fd_sc_ls__nand3_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__nand3_2 (
- Y ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand3/sky130_fd_sc_ls__nand3_4.v b/cells/nand3/sky130_fd_sc_ls__nand3_4.v
index 8088b84..83b1797 100644
--- a/cells/nand3/sky130_fd_sc_ls__nand3_4.v
+++ b/cells/nand3/sky130_fd_sc_ls__nand3_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__nand3_4 (
- Y ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_ls__nand3b_1.v b/cells/nand3b/sky130_fd_sc_ls__nand3b_1.v
index f727e45..1cc598f 100644
--- a/cells/nand3b/sky130_fd_sc_ls__nand3b_1.v
+++ b/cells/nand3b/sky130_fd_sc_ls__nand3b_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__nand3b_1 (
- Y ,
- A_N ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B ,
+ C
);
- output Y ;
- input A_N ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
+ input C ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_ls__nand3b_2.v b/cells/nand3b/sky130_fd_sc_ls__nand3b_2.v
index aea12be..29abb43 100644
--- a/cells/nand3b/sky130_fd_sc_ls__nand3b_2.v
+++ b/cells/nand3b/sky130_fd_sc_ls__nand3b_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__nand3b_2 (
- Y ,
- A_N ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B ,
+ C
);
- output Y ;
- input A_N ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
+ input C ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand3b/sky130_fd_sc_ls__nand3b_4.v b/cells/nand3b/sky130_fd_sc_ls__nand3b_4.v
index fa50a59..7c749a3 100644
--- a/cells/nand3b/sky130_fd_sc_ls__nand3b_4.v
+++ b/cells/nand3b/sky130_fd_sc_ls__nand3b_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__nand3b_4 (
- Y ,
- A_N ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B ,
+ C
);
- output Y ;
- input A_N ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
+ input C ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_ls__nand4_1.v b/cells/nand4/sky130_fd_sc_ls__nand4_1.v
index b9148de..d0107c4 100644
--- a/cells/nand4/sky130_fd_sc_ls__nand4_1.v
+++ b/cells/nand4/sky130_fd_sc_ls__nand4_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4_1 (
- Y ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C,
+ D
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_ls__nand4_2.v b/cells/nand4/sky130_fd_sc_ls__nand4_2.v
index 8aae552..f8a88c6 100644
--- a/cells/nand4/sky130_fd_sc_ls__nand4_2.v
+++ b/cells/nand4/sky130_fd_sc_ls__nand4_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4_2 (
- Y ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C,
+ D
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4/sky130_fd_sc_ls__nand4_4.v b/cells/nand4/sky130_fd_sc_ls__nand4_4.v
index 44465ae..ce20300 100644
--- a/cells/nand4/sky130_fd_sc_ls__nand4_4.v
+++ b/cells/nand4/sky130_fd_sc_ls__nand4_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4_4 (
- Y ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C,
+ D
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_ls__nand4b_1.v b/cells/nand4b/sky130_fd_sc_ls__nand4b_1.v
index 8e921a2..1ee246e 100644
--- a/cells/nand4b/sky130_fd_sc_ls__nand4b_1.v
+++ b/cells/nand4b/sky130_fd_sc_ls__nand4b_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4b_1 (
- Y ,
- A_N ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B ,
+ C ,
+ D
);
- output Y ;
- input A_N ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_ls__nand4b_2.v b/cells/nand4b/sky130_fd_sc_ls__nand4b_2.v
index cbf38bb..3ed8521 100644
--- a/cells/nand4b/sky130_fd_sc_ls__nand4b_2.v
+++ b/cells/nand4b/sky130_fd_sc_ls__nand4b_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4b_2 (
- Y ,
- A_N ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B ,
+ C ,
+ D
);
- output Y ;
- input A_N ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4b/sky130_fd_sc_ls__nand4b_4.v b/cells/nand4b/sky130_fd_sc_ls__nand4b_4.v
index cfb6e4d..a688684 100644
--- a/cells/nand4b/sky130_fd_sc_ls__nand4b_4.v
+++ b/cells/nand4b/sky130_fd_sc_ls__nand4b_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4b_4 (
- Y ,
- A_N ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B ,
+ C ,
+ D
);
- output Y ;
- input A_N ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B ;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_ls__nand4bb_1.v b/cells/nand4bb/sky130_fd_sc_ls__nand4bb_1.v
index 51116e9..a2a503b 100644
--- a/cells/nand4bb/sky130_fd_sc_ls__nand4bb_1.v
+++ b/cells/nand4bb/sky130_fd_sc_ls__nand4bb_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4bb_1 (
- Y ,
- A_N ,
- B_N ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B_N,
+ C ,
+ D
);
- output Y ;
- input A_N ;
- input B_N ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B_N;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_ls__nand4bb_2.v b/cells/nand4bb/sky130_fd_sc_ls__nand4bb_2.v
index 0c91d1e..0cd4b6c 100644
--- a/cells/nand4bb/sky130_fd_sc_ls__nand4bb_2.v
+++ b/cells/nand4bb/sky130_fd_sc_ls__nand4bb_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4bb_2 (
- Y ,
- A_N ,
- B_N ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B_N,
+ C ,
+ D
);
- output Y ;
- input A_N ;
- input B_N ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B_N;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nand4bb/sky130_fd_sc_ls__nand4bb_4.v b/cells/nand4bb/sky130_fd_sc_ls__nand4bb_4.v
index bc6e3d0..4c647ce 100644
--- a/cells/nand4bb/sky130_fd_sc_ls__nand4bb_4.v
+++ b/cells/nand4bb/sky130_fd_sc_ls__nand4bb_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nand4bb_4 (
- Y ,
- A_N ,
- B_N ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A_N,
+ B_N,
+ C ,
+ D
);
- output Y ;
- input A_N ;
- input B_N ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A_N;
+ input B_N;
+ input C ;
+ input D ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_ls__nor2_1.v b/cells/nor2/sky130_fd_sc_ls__nor2_1.v
index c510ca5..3e2e598 100644
--- a/cells/nor2/sky130_fd_sc_ls__nor2_1.v
+++ b/cells/nor2/sky130_fd_sc_ls__nor2_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nor2_1 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_ls__nor2_2.v b/cells/nor2/sky130_fd_sc_ls__nor2_2.v
index d570e8c..9e776c4 100644
--- a/cells/nor2/sky130_fd_sc_ls__nor2_2.v
+++ b/cells/nor2/sky130_fd_sc_ls__nor2_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nor2_2 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_ls__nor2_4.v b/cells/nor2/sky130_fd_sc_ls__nor2_4.v
index 8cdbec2..64f86ce 100644
--- a/cells/nor2/sky130_fd_sc_ls__nor2_4.v
+++ b/cells/nor2/sky130_fd_sc_ls__nor2_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nor2_4 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor2/sky130_fd_sc_ls__nor2_8.v b/cells/nor2/sky130_fd_sc_ls__nor2_8.v
index f06520a..76b77fc 100644
--- a/cells/nor2/sky130_fd_sc_ls__nor2_8.v
+++ b/cells/nor2/sky130_fd_sc_ls__nor2_8.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__nor2_8 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_ls__nor2b_1.v b/cells/nor2b/sky130_fd_sc_ls__nor2b_1.v
index 03b78f9..a9e7f77 100644
--- a/cells/nor2b/sky130_fd_sc_ls__nor2b_1.v
+++ b/cells/nor2b/sky130_fd_sc_ls__nor2b_1.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__nor2b_1 (
- Y ,
- A ,
- B_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B_N
);
- output Y ;
- input A ;
- input B_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_ls__nor2b_2.v b/cells/nor2b/sky130_fd_sc_ls__nor2b_2.v
index fd3801c..fc2ca63 100644
--- a/cells/nor2b/sky130_fd_sc_ls__nor2b_2.v
+++ b/cells/nor2b/sky130_fd_sc_ls__nor2b_2.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__nor2b_2 (
- Y ,
- A ,
- B_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B_N
);
- output Y ;
- input A ;
- input B_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor2b/sky130_fd_sc_ls__nor2b_4.v b/cells/nor2b/sky130_fd_sc_ls__nor2b_4.v
index 27a861e..c602533 100644
--- a/cells/nor2b/sky130_fd_sc_ls__nor2b_4.v
+++ b/cells/nor2b/sky130_fd_sc_ls__nor2b_4.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__nor2b_4 (
- Y ,
- A ,
- B_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B_N
);
- output Y ;
- input A ;
- input B_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_ls__nor3_1.v b/cells/nor3/sky130_fd_sc_ls__nor3_1.v
index c5d8086..ea4e20c 100644
--- a/cells/nor3/sky130_fd_sc_ls__nor3_1.v
+++ b/cells/nor3/sky130_fd_sc_ls__nor3_1.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__nor3_1 (
- Y ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_ls__nor3_2.v b/cells/nor3/sky130_fd_sc_ls__nor3_2.v
index 9d0c13e..3c82edd 100644
--- a/cells/nor3/sky130_fd_sc_ls__nor3_2.v
+++ b/cells/nor3/sky130_fd_sc_ls__nor3_2.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__nor3_2 (
- Y ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor3/sky130_fd_sc_ls__nor3_4.v b/cells/nor3/sky130_fd_sc_ls__nor3_4.v
index 8aaddc3..135e7fa 100644
--- a/cells/nor3/sky130_fd_sc_ls__nor3_4.v
+++ b/cells/nor3/sky130_fd_sc_ls__nor3_4.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__nor3_4 (
- Y ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_ls__nor3b_1.v b/cells/nor3b/sky130_fd_sc_ls__nor3b_1.v
index d7bff19..4cb070e 100644
--- a/cells/nor3b/sky130_fd_sc_ls__nor3b_1.v
+++ b/cells/nor3b/sky130_fd_sc_ls__nor3b_1.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__nor3b_1 (
- Y ,
- A ,
- B ,
- C_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C_N
);
- output Y ;
- input A ;
- input B ;
- input C_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_ls__nor3b_2.v b/cells/nor3b/sky130_fd_sc_ls__nor3b_2.v
index 606bf36..10a035b 100644
--- a/cells/nor3b/sky130_fd_sc_ls__nor3b_2.v
+++ b/cells/nor3b/sky130_fd_sc_ls__nor3b_2.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__nor3b_2 (
- Y ,
- A ,
- B ,
- C_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C_N
);
- output Y ;
- input A ;
- input B ;
- input C_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor3b/sky130_fd_sc_ls__nor3b_4.v b/cells/nor3b/sky130_fd_sc_ls__nor3b_4.v
index 5f1ecbb..4b56275 100644
--- a/cells/nor3b/sky130_fd_sc_ls__nor3b_4.v
+++ b/cells/nor3b/sky130_fd_sc_ls__nor3b_4.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__nor3b_4 (
- Y ,
- A ,
- B ,
- C_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C_N
);
- output Y ;
- input A ;
- input B ;
- input C_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_ls__nor4_1.v b/cells/nor4/sky130_fd_sc_ls__nor4_1.v
index 83db917..22fd6fc 100644
--- a/cells/nor4/sky130_fd_sc_ls__nor4_1.v
+++ b/cells/nor4/sky130_fd_sc_ls__nor4_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__nor4_1 (
- Y ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C,
+ D
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_ls__nor4_2.v b/cells/nor4/sky130_fd_sc_ls__nor4_2.v
index 62b8b62..0d5e456 100644
--- a/cells/nor4/sky130_fd_sc_ls__nor4_2.v
+++ b/cells/nor4/sky130_fd_sc_ls__nor4_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__nor4_2 (
- Y ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C,
+ D
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4/sky130_fd_sc_ls__nor4_4.v b/cells/nor4/sky130_fd_sc_ls__nor4_4.v
index b84830d..d1e11ac 100644
--- a/cells/nor4/sky130_fd_sc_ls__nor4_4.v
+++ b/cells/nor4/sky130_fd_sc_ls__nor4_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__nor4_4 (
- Y ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B,
+ C,
+ D
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_ls__nor4b_1.v b/cells/nor4b/sky130_fd_sc_ls__nor4b_1.v
index 6f6872e..4311a45 100644
--- a/cells/nor4b/sky130_fd_sc_ls__nor4b_1.v
+++ b/cells/nor4b/sky130_fd_sc_ls__nor4b_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nor4b_1 (
- Y ,
- A ,
- B ,
- C ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C ,
+ D_N
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C ;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_ls__nor4b_2.v b/cells/nor4b/sky130_fd_sc_ls__nor4b_2.v
index 9056e49..3254d5a 100644
--- a/cells/nor4b/sky130_fd_sc_ls__nor4b_2.v
+++ b/cells/nor4b/sky130_fd_sc_ls__nor4b_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nor4b_2 (
- Y ,
- A ,
- B ,
- C ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C ,
+ D_N
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C ;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4b/sky130_fd_sc_ls__nor4b_4.v b/cells/nor4b/sky130_fd_sc_ls__nor4b_4.v
index 831384b..ac2c8ed 100644
--- a/cells/nor4b/sky130_fd_sc_ls__nor4b_4.v
+++ b/cells/nor4b/sky130_fd_sc_ls__nor4b_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nor4b_4 (
- Y ,
- A ,
- B ,
- C ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C ,
+ D_N
);
- output Y ;
- input A ;
- input B ;
- input C ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C ;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_ls__nor4bb_1.v b/cells/nor4bb/sky130_fd_sc_ls__nor4bb_1.v
index 6621085..c3084e8 100644
--- a/cells/nor4bb/sky130_fd_sc_ls__nor4bb_1.v
+++ b/cells/nor4bb/sky130_fd_sc_ls__nor4bb_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nor4bb_1 (
- Y ,
- A ,
- B ,
- C_N ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C_N,
+ D_N
);
- output Y ;
- input A ;
- input B ;
- input C_N ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C_N;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_ls__nor4bb_2.v b/cells/nor4bb/sky130_fd_sc_ls__nor4bb_2.v
index 611dc81..3600c48 100644
--- a/cells/nor4bb/sky130_fd_sc_ls__nor4bb_2.v
+++ b/cells/nor4bb/sky130_fd_sc_ls__nor4bb_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nor4bb_2 (
- Y ,
- A ,
- B ,
- C_N ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C_N,
+ D_N
);
- output Y ;
- input A ;
- input B ;
- input C_N ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C_N;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/nor4bb/sky130_fd_sc_ls__nor4bb_4.v b/cells/nor4bb/sky130_fd_sc_ls__nor4bb_4.v
index 9a2b69c..45ba82d 100644
--- a/cells/nor4bb/sky130_fd_sc_ls__nor4bb_4.v
+++ b/cells/nor4bb/sky130_fd_sc_ls__nor4bb_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__nor4bb_4 (
- Y ,
- A ,
- B ,
- C_N ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A ,
+ B ,
+ C_N,
+ D_N
);
- output Y ;
- input A ;
- input B ;
- input C_N ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A ;
+ input B ;
+ input C_N;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_ls__o2111a_1.v b/cells/o2111a/sky130_fd_sc_ls__o2111a_1.v
index a3debc1..9fbd720 100644
--- a/cells/o2111a/sky130_fd_sc_ls__o2111a_1.v
+++ b/cells/o2111a/sky130_fd_sc_ls__o2111a_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o2111a_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_ls__o2111a_2.v b/cells/o2111a/sky130_fd_sc_ls__o2111a_2.v
index 144c930..6bc25ec 100644
--- a/cells/o2111a/sky130_fd_sc_ls__o2111a_2.v
+++ b/cells/o2111a/sky130_fd_sc_ls__o2111a_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o2111a_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2111a/sky130_fd_sc_ls__o2111a_4.v b/cells/o2111a/sky130_fd_sc_ls__o2111a_4.v
index 3e4ae70..c2269c6 100644
--- a/cells/o2111a/sky130_fd_sc_ls__o2111a_4.v
+++ b/cells/o2111a/sky130_fd_sc_ls__o2111a_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o2111a_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2111ai/sky130_fd_sc_ls__o2111ai_1.v b/cells/o2111ai/sky130_fd_sc_ls__o2111ai_1.v
index d2625fd..a58b0a2 100644
--- a/cells/o2111ai/sky130_fd_sc_ls__o2111ai_1.v
+++ b/cells/o2111ai/sky130_fd_sc_ls__o2111ai_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o2111ai_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2111ai/sky130_fd_sc_ls__o2111ai_2.v b/cells/o2111ai/sky130_fd_sc_ls__o2111ai_2.v
index 9cec160..34e6344 100644
--- a/cells/o2111ai/sky130_fd_sc_ls__o2111ai_2.v
+++ b/cells/o2111ai/sky130_fd_sc_ls__o2111ai_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o2111ai_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2111ai/sky130_fd_sc_ls__o2111ai_4.v b/cells/o2111ai/sky130_fd_sc_ls__o2111ai_4.v
index d99a4ea..7f2c3cd 100644
--- a/cells/o2111ai/sky130_fd_sc_ls__o2111ai_4.v
+++ b/cells/o2111ai/sky130_fd_sc_ls__o2111ai_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o2111ai_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- D1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1,
+ D1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input D1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
+ input D1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o211a/sky130_fd_sc_ls__o211a_1.v b/cells/o211a/sky130_fd_sc_ls__o211a_1.v
index 1840853..77e8276 100644
--- a/cells/o211a/sky130_fd_sc_ls__o211a_1.v
+++ b/cells/o211a/sky130_fd_sc_ls__o211a_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o211a_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o211a/sky130_fd_sc_ls__o211a_2.v b/cells/o211a/sky130_fd_sc_ls__o211a_2.v
index fae81be..b9b5813 100644
--- a/cells/o211a/sky130_fd_sc_ls__o211a_2.v
+++ b/cells/o211a/sky130_fd_sc_ls__o211a_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o211a_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o211a/sky130_fd_sc_ls__o211a_4.v b/cells/o211a/sky130_fd_sc_ls__o211a_4.v
index 24eb78b..c9870f9 100644
--- a/cells/o211a/sky130_fd_sc_ls__o211a_4.v
+++ b/cells/o211a/sky130_fd_sc_ls__o211a_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o211a_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o211ai/sky130_fd_sc_ls__o211ai_1.v b/cells/o211ai/sky130_fd_sc_ls__o211ai_1.v
index 9797cd4..d877b36 100644
--- a/cells/o211ai/sky130_fd_sc_ls__o211ai_1.v
+++ b/cells/o211ai/sky130_fd_sc_ls__o211ai_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o211ai_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o211ai/sky130_fd_sc_ls__o211ai_2.v b/cells/o211ai/sky130_fd_sc_ls__o211ai_2.v
index 552814b..96dfcd2 100644
--- a/cells/o211ai/sky130_fd_sc_ls__o211ai_2.v
+++ b/cells/o211ai/sky130_fd_sc_ls__o211ai_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o211ai_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o211ai/sky130_fd_sc_ls__o211ai_4.v b/cells/o211ai/sky130_fd_sc_ls__o211ai_4.v
index e074b71..b7d5526 100644
--- a/cells/o211ai/sky130_fd_sc_ls__o211ai_4.v
+++ b/cells/o211ai/sky130_fd_sc_ls__o211ai_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o211ai_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21a/sky130_fd_sc_ls__o21a_1.v b/cells/o21a/sky130_fd_sc_ls__o21a_1.v
index ad56f2a..9c42cef 100644
--- a/cells/o21a/sky130_fd_sc_ls__o21a_1.v
+++ b/cells/o21a/sky130_fd_sc_ls__o21a_1.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__o21a_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21a/sky130_fd_sc_ls__o21a_2.v b/cells/o21a/sky130_fd_sc_ls__o21a_2.v
index 88a4475..e35b260 100644
--- a/cells/o21a/sky130_fd_sc_ls__o21a_2.v
+++ b/cells/o21a/sky130_fd_sc_ls__o21a_2.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__o21a_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21a/sky130_fd_sc_ls__o21a_4.v b/cells/o21a/sky130_fd_sc_ls__o21a_4.v
index 2318dd6..e5687f1 100644
--- a/cells/o21a/sky130_fd_sc_ls__o21a_4.v
+++ b/cells/o21a/sky130_fd_sc_ls__o21a_4.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__o21a_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21ai/sky130_fd_sc_ls__o21ai_1.v b/cells/o21ai/sky130_fd_sc_ls__o21ai_1.v
index 9aaa891..b0a06eb 100644
--- a/cells/o21ai/sky130_fd_sc_ls__o21ai_1.v
+++ b/cells/o21ai/sky130_fd_sc_ls__o21ai_1.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__o21ai_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21ai/sky130_fd_sc_ls__o21ai_2.v b/cells/o21ai/sky130_fd_sc_ls__o21ai_2.v
index 709f769..4846d42 100644
--- a/cells/o21ai/sky130_fd_sc_ls__o21ai_2.v
+++ b/cells/o21ai/sky130_fd_sc_ls__o21ai_2.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__o21ai_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21ai/sky130_fd_sc_ls__o21ai_4.v b/cells/o21ai/sky130_fd_sc_ls__o21ai_4.v
index 762d7d3..7326e44 100644
--- a/cells/o21ai/sky130_fd_sc_ls__o21ai_4.v
+++ b/cells/o21ai/sky130_fd_sc_ls__o21ai_4.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__o21ai_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21ba/sky130_fd_sc_ls__o21ba_1.v b/cells/o21ba/sky130_fd_sc_ls__o21ba_1.v
index 82cc654..8f9cb27 100644
--- a/cells/o21ba/sky130_fd_sc_ls__o21ba_1.v
+++ b/cells/o21ba/sky130_fd_sc_ls__o21ba_1.v
@@ -81,21 +81,13 @@
X ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output X ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21ba/sky130_fd_sc_ls__o21ba_2.v b/cells/o21ba/sky130_fd_sc_ls__o21ba_2.v
index dccb78b..d6c2d37 100644
--- a/cells/o21ba/sky130_fd_sc_ls__o21ba_2.v
+++ b/cells/o21ba/sky130_fd_sc_ls__o21ba_2.v
@@ -81,21 +81,13 @@
X ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output X ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21ba/sky130_fd_sc_ls__o21ba_4.v b/cells/o21ba/sky130_fd_sc_ls__o21ba_4.v
index 6198122..6031036 100644
--- a/cells/o21ba/sky130_fd_sc_ls__o21ba_4.v
+++ b/cells/o21ba/sky130_fd_sc_ls__o21ba_4.v
@@ -81,21 +81,13 @@
X ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output X ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21bai/sky130_fd_sc_ls__o21bai_1.v b/cells/o21bai/sky130_fd_sc_ls__o21bai_1.v
index 653a1f4..4966cd4 100644
--- a/cells/o21bai/sky130_fd_sc_ls__o21bai_1.v
+++ b/cells/o21bai/sky130_fd_sc_ls__o21bai_1.v
@@ -81,21 +81,13 @@
Y ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output Y ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21bai/sky130_fd_sc_ls__o21bai_2.v b/cells/o21bai/sky130_fd_sc_ls__o21bai_2.v
index 540f24c..e58022e 100644
--- a/cells/o21bai/sky130_fd_sc_ls__o21bai_2.v
+++ b/cells/o21bai/sky130_fd_sc_ls__o21bai_2.v
@@ -81,21 +81,13 @@
Y ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output Y ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o21bai/sky130_fd_sc_ls__o21bai_4.v b/cells/o21bai/sky130_fd_sc_ls__o21bai_4.v
index 19c4ca8..9238da4 100644
--- a/cells/o21bai/sky130_fd_sc_ls__o21bai_4.v
+++ b/cells/o21bai/sky130_fd_sc_ls__o21bai_4.v
@@ -81,21 +81,13 @@
Y ,
A1 ,
A2 ,
- B1_N,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B1_N
);
output Y ;
input A1 ;
input A2 ;
input B1_N;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o221a/sky130_fd_sc_ls__o221a_1.v b/cells/o221a/sky130_fd_sc_ls__o221a_1.v
index fb3d7b3..d7575d5 100644
--- a/cells/o221a/sky130_fd_sc_ls__o221a_1.v
+++ b/cells/o221a/sky130_fd_sc_ls__o221a_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o221a_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o221a/sky130_fd_sc_ls__o221a_2.v b/cells/o221a/sky130_fd_sc_ls__o221a_2.v
index 35d5993..7b20a76 100644
--- a/cells/o221a/sky130_fd_sc_ls__o221a_2.v
+++ b/cells/o221a/sky130_fd_sc_ls__o221a_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o221a_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o221a/sky130_fd_sc_ls__o221a_4.v b/cells/o221a/sky130_fd_sc_ls__o221a_4.v
index 3350863..9deaf31 100644
--- a/cells/o221a/sky130_fd_sc_ls__o221a_4.v
+++ b/cells/o221a/sky130_fd_sc_ls__o221a_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o221a_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o221ai/sky130_fd_sc_ls__o221ai_1.v b/cells/o221ai/sky130_fd_sc_ls__o221ai_1.v
index a728a81..876ceba 100644
--- a/cells/o221ai/sky130_fd_sc_ls__o221ai_1.v
+++ b/cells/o221ai/sky130_fd_sc_ls__o221ai_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o221ai_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o221ai/sky130_fd_sc_ls__o221ai_2.v b/cells/o221ai/sky130_fd_sc_ls__o221ai_2.v
index 1ce4186..983929d 100644
--- a/cells/o221ai/sky130_fd_sc_ls__o221ai_2.v
+++ b/cells/o221ai/sky130_fd_sc_ls__o221ai_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o221ai_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o221ai/sky130_fd_sc_ls__o221ai_4.v b/cells/o221ai/sky130_fd_sc_ls__o221ai_4.v
index 27ec38e..ee71449 100644
--- a/cells/o221ai/sky130_fd_sc_ls__o221ai_4.v
+++ b/cells/o221ai/sky130_fd_sc_ls__o221ai_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o221ai_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o22a/sky130_fd_sc_ls__o22a_1.v b/cells/o22a/sky130_fd_sc_ls__o22a_1.v
index 2f4078f..57e2f28 100644
--- a/cells/o22a/sky130_fd_sc_ls__o22a_1.v
+++ b/cells/o22a/sky130_fd_sc_ls__o22a_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o22a_1 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o22a/sky130_fd_sc_ls__o22a_2.v b/cells/o22a/sky130_fd_sc_ls__o22a_2.v
index ab03e88..6da811c 100644
--- a/cells/o22a/sky130_fd_sc_ls__o22a_2.v
+++ b/cells/o22a/sky130_fd_sc_ls__o22a_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o22a_2 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o22a/sky130_fd_sc_ls__o22a_4.v b/cells/o22a/sky130_fd_sc_ls__o22a_4.v
index 9f47602..6e0387d 100644
--- a/cells/o22a/sky130_fd_sc_ls__o22a_4.v
+++ b/cells/o22a/sky130_fd_sc_ls__o22a_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o22a_4 (
- X ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o22ai/sky130_fd_sc_ls__o22ai_1.v b/cells/o22ai/sky130_fd_sc_ls__o22ai_1.v
index 3e2a714..657845a 100644
--- a/cells/o22ai/sky130_fd_sc_ls__o22ai_1.v
+++ b/cells/o22ai/sky130_fd_sc_ls__o22ai_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o22ai_1 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o22ai/sky130_fd_sc_ls__o22ai_2.v b/cells/o22ai/sky130_fd_sc_ls__o22ai_2.v
index e134154..0930786 100644
--- a/cells/o22ai/sky130_fd_sc_ls__o22ai_2.v
+++ b/cells/o22ai/sky130_fd_sc_ls__o22ai_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o22ai_2 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o22ai/sky130_fd_sc_ls__o22ai_4.v b/cells/o22ai/sky130_fd_sc_ls__o22ai_4.v
index ac66000..494ab8e 100644
--- a/cells/o22ai/sky130_fd_sc_ls__o22ai_4.v
+++ b/cells/o22ai/sky130_fd_sc_ls__o22ai_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o22ai_4 (
- Y ,
- A1 ,
- A2 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_1.v b/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_1.v
index 19fe6b0..c8ceecf 100644
--- a/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_1.v
+++ b/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_1.v
@@ -84,11 +84,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output X ;
@@ -96,10 +92,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_2.v b/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_2.v
index 8da92aa..095f135 100644
--- a/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_2.v
+++ b/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_2.v
@@ -84,11 +84,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output X ;
@@ -96,10 +92,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_4.v b/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_4.v
index 355df0f..0578c2d 100644
--- a/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_4.v
+++ b/cells/o2bb2a/sky130_fd_sc_ls__o2bb2a_4.v
@@ -84,11 +84,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output X ;
@@ -96,10 +92,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_1.v b/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_1.v
index 89e0599..1e993f1 100644
--- a/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_1.v
+++ b/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_1.v
@@ -84,11 +84,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output Y ;
@@ -96,10 +92,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_2.v b/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_2.v
index e5cd463..2eedf91 100644
--- a/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_2.v
+++ b/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_2.v
@@ -84,11 +84,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output Y ;
@@ -96,10 +92,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_4.v b/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_4.v
index 2dbdc7a..9af63ef 100644
--- a/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_4.v
+++ b/cells/o2bb2ai/sky130_fd_sc_ls__o2bb2ai_4.v
@@ -84,11 +84,7 @@
A1_N,
A2_N,
B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ B2
);
output Y ;
@@ -96,10 +92,6 @@
input A2_N;
input B1 ;
input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o311a/sky130_fd_sc_ls__o311a_1.v b/cells/o311a/sky130_fd_sc_ls__o311a_1.v
index 6f0c574..72226ce 100644
--- a/cells/o311a/sky130_fd_sc_ls__o311a_1.v
+++ b/cells/o311a/sky130_fd_sc_ls__o311a_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o311a_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o311a/sky130_fd_sc_ls__o311a_2.v b/cells/o311a/sky130_fd_sc_ls__o311a_2.v
index 85fb918..31a0632 100644
--- a/cells/o311a/sky130_fd_sc_ls__o311a_2.v
+++ b/cells/o311a/sky130_fd_sc_ls__o311a_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o311a_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o311a/sky130_fd_sc_ls__o311a_4.v b/cells/o311a/sky130_fd_sc_ls__o311a_4.v
index 8c5bf4d..bb812c2 100644
--- a/cells/o311a/sky130_fd_sc_ls__o311a_4.v
+++ b/cells/o311a/sky130_fd_sc_ls__o311a_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o311a_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o311ai/sky130_fd_sc_ls__o311ai_1.v b/cells/o311ai/sky130_fd_sc_ls__o311ai_1.v
index d7503a6..937b508 100644
--- a/cells/o311ai/sky130_fd_sc_ls__o311ai_1.v
+++ b/cells/o311ai/sky130_fd_sc_ls__o311ai_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o311ai_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o311ai/sky130_fd_sc_ls__o311ai_2.v b/cells/o311ai/sky130_fd_sc_ls__o311ai_2.v
index b476e1a..8ecb47f 100644
--- a/cells/o311ai/sky130_fd_sc_ls__o311ai_2.v
+++ b/cells/o311ai/sky130_fd_sc_ls__o311ai_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o311ai_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o311ai/sky130_fd_sc_ls__o311ai_4.v b/cells/o311ai/sky130_fd_sc_ls__o311ai_4.v
index d9e2c20..bd4b34f 100644
--- a/cells/o311ai/sky130_fd_sc_ls__o311ai_4.v
+++ b/cells/o311ai/sky130_fd_sc_ls__o311ai_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o311ai_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- C1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ C1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input C1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input C1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o31a/sky130_fd_sc_ls__o31a_1.v b/cells/o31a/sky130_fd_sc_ls__o31a_1.v
index 5f6dbe3..6f4e8bd 100644
--- a/cells/o31a/sky130_fd_sc_ls__o31a_1.v
+++ b/cells/o31a/sky130_fd_sc_ls__o31a_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o31a_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o31a/sky130_fd_sc_ls__o31a_2.v b/cells/o31a/sky130_fd_sc_ls__o31a_2.v
index cd44610..0b7c1e6 100644
--- a/cells/o31a/sky130_fd_sc_ls__o31a_2.v
+++ b/cells/o31a/sky130_fd_sc_ls__o31a_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o31a_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o31a/sky130_fd_sc_ls__o31a_4.v b/cells/o31a/sky130_fd_sc_ls__o31a_4.v
index c0b3823..665a08d 100644
--- a/cells/o31a/sky130_fd_sc_ls__o31a_4.v
+++ b/cells/o31a/sky130_fd_sc_ls__o31a_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o31a_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o31ai/sky130_fd_sc_ls__o31ai_1.v b/cells/o31ai/sky130_fd_sc_ls__o31ai_1.v
index 9743415..22660e1 100644
--- a/cells/o31ai/sky130_fd_sc_ls__o31ai_1.v
+++ b/cells/o31ai/sky130_fd_sc_ls__o31ai_1.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o31ai_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o31ai/sky130_fd_sc_ls__o31ai_2.v b/cells/o31ai/sky130_fd_sc_ls__o31ai_2.v
index 2a8ffbc..8256683 100644
--- a/cells/o31ai/sky130_fd_sc_ls__o31ai_2.v
+++ b/cells/o31ai/sky130_fd_sc_ls__o31ai_2.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o31ai_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o31ai/sky130_fd_sc_ls__o31ai_4.v b/cells/o31ai/sky130_fd_sc_ls__o31ai_4.v
index 0d50ced..12fa25e 100644
--- a/cells/o31ai/sky130_fd_sc_ls__o31ai_4.v
+++ b/cells/o31ai/sky130_fd_sc_ls__o31ai_4.v
@@ -80,26 +80,18 @@
`celldefine
module sky130_fd_sc_ls__o31ai_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o32a/sky130_fd_sc_ls__o32a_1.v b/cells/o32a/sky130_fd_sc_ls__o32a_1.v
index 0a7a63b..2b43cc4 100644
--- a/cells/o32a/sky130_fd_sc_ls__o32a_1.v
+++ b/cells/o32a/sky130_fd_sc_ls__o32a_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o32a_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o32a/sky130_fd_sc_ls__o32a_2.v b/cells/o32a/sky130_fd_sc_ls__o32a_2.v
index 0f402ff..770b61a 100644
--- a/cells/o32a/sky130_fd_sc_ls__o32a_2.v
+++ b/cells/o32a/sky130_fd_sc_ls__o32a_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o32a_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o32a/sky130_fd_sc_ls__o32a_4.v b/cells/o32a/sky130_fd_sc_ls__o32a_4.v
index 4c049c2..99541a2 100644
--- a/cells/o32a/sky130_fd_sc_ls__o32a_4.v
+++ b/cells/o32a/sky130_fd_sc_ls__o32a_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o32a_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o32ai/sky130_fd_sc_ls__o32ai_1.v b/cells/o32ai/sky130_fd_sc_ls__o32ai_1.v
index 72db5a4..89c46a6 100644
--- a/cells/o32ai/sky130_fd_sc_ls__o32ai_1.v
+++ b/cells/o32ai/sky130_fd_sc_ls__o32ai_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o32ai_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o32ai/sky130_fd_sc_ls__o32ai_2.v b/cells/o32ai/sky130_fd_sc_ls__o32ai_2.v
index d5e8a2a..0b3b62d 100644
--- a/cells/o32ai/sky130_fd_sc_ls__o32ai_2.v
+++ b/cells/o32ai/sky130_fd_sc_ls__o32ai_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o32ai_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o32ai/sky130_fd_sc_ls__o32ai_4.v b/cells/o32ai/sky130_fd_sc_ls__o32ai_4.v
index 9096345..df58a73 100644
--- a/cells/o32ai/sky130_fd_sc_ls__o32ai_4.v
+++ b/cells/o32ai/sky130_fd_sc_ls__o32ai_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o32ai_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- B1 ,
- B2 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ B1,
+ B2
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input B1 ;
- input B2 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input B1;
+ input B2;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o41a/sky130_fd_sc_ls__o41a_1.v b/cells/o41a/sky130_fd_sc_ls__o41a_1.v
index fa21548..607d938 100644
--- a/cells/o41a/sky130_fd_sc_ls__o41a_1.v
+++ b/cells/o41a/sky130_fd_sc_ls__o41a_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o41a_1 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o41a/sky130_fd_sc_ls__o41a_2.v b/cells/o41a/sky130_fd_sc_ls__o41a_2.v
index d1eeee3..f0d9139 100644
--- a/cells/o41a/sky130_fd_sc_ls__o41a_2.v
+++ b/cells/o41a/sky130_fd_sc_ls__o41a_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o41a_2 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o41a/sky130_fd_sc_ls__o41a_4.v b/cells/o41a/sky130_fd_sc_ls__o41a_4.v
index 7bf2153..0b03699 100644
--- a/cells/o41a/sky130_fd_sc_ls__o41a_4.v
+++ b/cells/o41a/sky130_fd_sc_ls__o41a_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o41a_4 (
- X ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output X ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o41ai/sky130_fd_sc_ls__o41ai_1.v b/cells/o41ai/sky130_fd_sc_ls__o41ai_1.v
index 40af70c..d33d73f 100644
--- a/cells/o41ai/sky130_fd_sc_ls__o41ai_1.v
+++ b/cells/o41ai/sky130_fd_sc_ls__o41ai_1.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o41ai_1 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o41ai/sky130_fd_sc_ls__o41ai_2.v b/cells/o41ai/sky130_fd_sc_ls__o41ai_2.v
index 07c72e3..940baa2 100644
--- a/cells/o41ai/sky130_fd_sc_ls__o41ai_2.v
+++ b/cells/o41ai/sky130_fd_sc_ls__o41ai_2.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o41ai_2 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/o41ai/sky130_fd_sc_ls__o41ai_4.v b/cells/o41ai/sky130_fd_sc_ls__o41ai_4.v
index 7b6ed0f..b9e4be0 100644
--- a/cells/o41ai/sky130_fd_sc_ls__o41ai_4.v
+++ b/cells/o41ai/sky130_fd_sc_ls__o41ai_4.v
@@ -83,28 +83,20 @@
`celldefine
module sky130_fd_sc_ls__o41ai_4 (
- Y ,
- A1 ,
- A2 ,
- A3 ,
- A4 ,
- B1 ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y ,
+ A1,
+ A2,
+ A3,
+ A4,
+ B1
);
- output Y ;
- input A1 ;
- input A2 ;
- input A3 ;
- input A4 ;
- input B1 ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y ;
+ input A1;
+ input A2;
+ input A3;
+ input A4;
+ input B1;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or2/sky130_fd_sc_ls__or2_1.v b/cells/or2/sky130_fd_sc_ls__or2_1.v
index eb82fc8..c3f066e 100644
--- a/cells/or2/sky130_fd_sc_ls__or2_1.v
+++ b/cells/or2/sky130_fd_sc_ls__or2_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__or2_1 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or2/sky130_fd_sc_ls__or2_2.v b/cells/or2/sky130_fd_sc_ls__or2_2.v
index 72af530..6a11895 100644
--- a/cells/or2/sky130_fd_sc_ls__or2_2.v
+++ b/cells/or2/sky130_fd_sc_ls__or2_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__or2_2 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or2/sky130_fd_sc_ls__or2_4.v b/cells/or2/sky130_fd_sc_ls__or2_4.v
index 3d712e7..5cb9f0f 100644
--- a/cells/or2/sky130_fd_sc_ls__or2_4.v
+++ b/cells/or2/sky130_fd_sc_ls__or2_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__or2_4 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or2b/sky130_fd_sc_ls__or2b_1.v b/cells/or2b/sky130_fd_sc_ls__or2b_1.v
index 354895b..ba85a77 100644
--- a/cells/or2b/sky130_fd_sc_ls__or2b_1.v
+++ b/cells/or2b/sky130_fd_sc_ls__or2b_1.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__or2b_1 (
- X ,
- A ,
- B_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B_N
);
- output X ;
- input A ;
- input B_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or2b/sky130_fd_sc_ls__or2b_2.v b/cells/or2b/sky130_fd_sc_ls__or2b_2.v
index e159644..82bfff1 100644
--- a/cells/or2b/sky130_fd_sc_ls__or2b_2.v
+++ b/cells/or2b/sky130_fd_sc_ls__or2b_2.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__or2b_2 (
- X ,
- A ,
- B_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B_N
);
- output X ;
- input A ;
- input B_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or2b/sky130_fd_sc_ls__or2b_4.v b/cells/or2b/sky130_fd_sc_ls__or2b_4.v
index 12744e8..4852627 100644
--- a/cells/or2b/sky130_fd_sc_ls__or2b_4.v
+++ b/cells/or2b/sky130_fd_sc_ls__or2b_4.v
@@ -72,22 +72,14 @@
`celldefine
module sky130_fd_sc_ls__or2b_4 (
- X ,
- A ,
- B_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B_N
);
- output X ;
- input A ;
- input B_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or3/sky130_fd_sc_ls__or3_1.v b/cells/or3/sky130_fd_sc_ls__or3_1.v
index 6683ed8..ec479a1 100644
--- a/cells/or3/sky130_fd_sc_ls__or3_1.v
+++ b/cells/or3/sky130_fd_sc_ls__or3_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__or3_1 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or3/sky130_fd_sc_ls__or3_2.v b/cells/or3/sky130_fd_sc_ls__or3_2.v
index e4bfeb2..5f80cd3 100644
--- a/cells/or3/sky130_fd_sc_ls__or3_2.v
+++ b/cells/or3/sky130_fd_sc_ls__or3_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__or3_2 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or3/sky130_fd_sc_ls__or3_4.v b/cells/or3/sky130_fd_sc_ls__or3_4.v
index 389808b..a175512 100644
--- a/cells/or3/sky130_fd_sc_ls__or3_4.v
+++ b/cells/or3/sky130_fd_sc_ls__or3_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__or3_4 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or3b/sky130_fd_sc_ls__or3b_1.v b/cells/or3b/sky130_fd_sc_ls__or3b_1.v
index 8029333..d618443 100644
--- a/cells/or3b/sky130_fd_sc_ls__or3b_1.v
+++ b/cells/or3b/sky130_fd_sc_ls__or3b_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__or3b_1 (
- X ,
- A ,
- B ,
- C_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C_N
);
- output X ;
- input A ;
- input B ;
- input C_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or3b/sky130_fd_sc_ls__or3b_2.v b/cells/or3b/sky130_fd_sc_ls__or3b_2.v
index 6d43025..9926e17 100644
--- a/cells/or3b/sky130_fd_sc_ls__or3b_2.v
+++ b/cells/or3b/sky130_fd_sc_ls__or3b_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__or3b_2 (
- X ,
- A ,
- B ,
- C_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C_N
);
- output X ;
- input A ;
- input B ;
- input C_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or3b/sky130_fd_sc_ls__or3b_4.v b/cells/or3b/sky130_fd_sc_ls__or3b_4.v
index eed2f18..d021f99 100644
--- a/cells/or3b/sky130_fd_sc_ls__or3b_4.v
+++ b/cells/or3b/sky130_fd_sc_ls__or3b_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__or3b_4 (
- X ,
- A ,
- B ,
- C_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C_N
);
- output X ;
- input A ;
- input B ;
- input C_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4/sky130_fd_sc_ls__or4_1.v b/cells/or4/sky130_fd_sc_ls__or4_1.v
index 9c94b24..7cc7215 100644
--- a/cells/or4/sky130_fd_sc_ls__or4_1.v
+++ b/cells/or4/sky130_fd_sc_ls__or4_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4_1 (
- X ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C,
+ D
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4/sky130_fd_sc_ls__or4_2.v b/cells/or4/sky130_fd_sc_ls__or4_2.v
index fdf348b..511f289 100644
--- a/cells/or4/sky130_fd_sc_ls__or4_2.v
+++ b/cells/or4/sky130_fd_sc_ls__or4_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4_2 (
- X ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C,
+ D
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4/sky130_fd_sc_ls__or4_4.v b/cells/or4/sky130_fd_sc_ls__or4_4.v
index 2b58aaf..9cc7766 100644
--- a/cells/or4/sky130_fd_sc_ls__or4_4.v
+++ b/cells/or4/sky130_fd_sc_ls__or4_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4_4 (
- X ,
- A ,
- B ,
- C ,
- D ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C,
+ D
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
+ input D;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4b/sky130_fd_sc_ls__or4b_1.v b/cells/or4b/sky130_fd_sc_ls__or4b_1.v
index 53efd2c..7f14545 100644
--- a/cells/or4b/sky130_fd_sc_ls__or4b_1.v
+++ b/cells/or4b/sky130_fd_sc_ls__or4b_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4b_1 (
- X ,
- A ,
- B ,
- C ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C ,
+ D_N
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C ;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4b/sky130_fd_sc_ls__or4b_2.v b/cells/or4b/sky130_fd_sc_ls__or4b_2.v
index 8a183a9..cdc3c7c 100644
--- a/cells/or4b/sky130_fd_sc_ls__or4b_2.v
+++ b/cells/or4b/sky130_fd_sc_ls__or4b_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4b_2 (
- X ,
- A ,
- B ,
- C ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C ,
+ D_N
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C ;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4b/sky130_fd_sc_ls__or4b_4.v b/cells/or4b/sky130_fd_sc_ls__or4b_4.v
index c732fa2..44ab6df 100644
--- a/cells/or4b/sky130_fd_sc_ls__or4b_4.v
+++ b/cells/or4b/sky130_fd_sc_ls__or4b_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4b_4 (
- X ,
- A ,
- B ,
- C ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C ,
+ D_N
);
- output X ;
- input A ;
- input B ;
- input C ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C ;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4bb/sky130_fd_sc_ls__or4bb_1.v b/cells/or4bb/sky130_fd_sc_ls__or4bb_1.v
index 9cb9959..9914586 100644
--- a/cells/or4bb/sky130_fd_sc_ls__or4bb_1.v
+++ b/cells/or4bb/sky130_fd_sc_ls__or4bb_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4bb_1 (
- X ,
- A ,
- B ,
- C_N ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C_N,
+ D_N
);
- output X ;
- input A ;
- input B ;
- input C_N ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C_N;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4bb/sky130_fd_sc_ls__or4bb_2.v b/cells/or4bb/sky130_fd_sc_ls__or4bb_2.v
index 50b331f..7803b01 100644
--- a/cells/or4bb/sky130_fd_sc_ls__or4bb_2.v
+++ b/cells/or4bb/sky130_fd_sc_ls__or4bb_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4bb_2 (
- X ,
- A ,
- B ,
- C_N ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C_N,
+ D_N
);
- output X ;
- input A ;
- input B ;
- input C_N ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C_N;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/or4bb/sky130_fd_sc_ls__or4bb_4.v b/cells/or4bb/sky130_fd_sc_ls__or4bb_4.v
index 9bb023e..aed6aa3 100644
--- a/cells/or4bb/sky130_fd_sc_ls__or4bb_4.v
+++ b/cells/or4bb/sky130_fd_sc_ls__or4bb_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__or4bb_4 (
- X ,
- A ,
- B ,
- C_N ,
- D_N ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X ,
+ A ,
+ B ,
+ C_N,
+ D_N
);
- output X ;
- input A ;
- input B ;
- input C_N ;
- input D_N ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X ;
+ input A ;
+ input B ;
+ input C_N;
+ input D_N;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_1.v b/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_1.v
index 195ac8f..64e6bd1 100644
--- a/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_1.v
+++ b/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_1.v
@@ -95,11 +95,7 @@
SCE ,
CLK_N ,
SET_B ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -110,10 +106,6 @@
input CLK_N ;
input SET_B ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_2.v b/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_2.v
index c292b13..aa2da0c 100644
--- a/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_2.v
+++ b/cells/sdfbbn/sky130_fd_sc_ls__sdfbbn_2.v
@@ -95,11 +95,7 @@
SCE ,
CLK_N ,
SET_B ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -110,10 +106,6 @@
input CLK_N ;
input SET_B ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfbbp/sky130_fd_sc_ls__sdfbbp_1.v b/cells/sdfbbp/sky130_fd_sc_ls__sdfbbp_1.v
index ce87d47..f0b5706 100644
--- a/cells/sdfbbp/sky130_fd_sc_ls__sdfbbp_1.v
+++ b/cells/sdfbbp/sky130_fd_sc_ls__sdfbbp_1.v
@@ -95,11 +95,7 @@
SCE ,
CLK ,
SET_B ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -110,10 +106,6 @@
input CLK ;
input SET_B ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_1.v b/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_1.v
index 279237c..16643d0 100644
--- a/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_1.v
+++ b/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_1.v
@@ -91,11 +91,7 @@
D ,
SCD ,
SCE ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -105,10 +101,6 @@
input SCD ;
input SCE ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_2.v b/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_2.v
index a20c8d5..d241aae 100644
--- a/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_2.v
+++ b/cells/sdfrbp/sky130_fd_sc_ls__sdfrbp_2.v
@@ -91,11 +91,7 @@
D ,
SCD ,
SCE ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -105,10 +101,6 @@
input SCD ;
input SCE ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfrtn/sky130_fd_sc_ls__sdfrtn_1.v b/cells/sdfrtn/sky130_fd_sc_ls__sdfrtn_1.v
index 3c67e3c..111664d 100644
--- a/cells/sdfrtn/sky130_fd_sc_ls__sdfrtn_1.v
+++ b/cells/sdfrtn/sky130_fd_sc_ls__sdfrtn_1.v
@@ -87,11 +87,7 @@
D ,
SCD ,
SCE ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -100,10 +96,6 @@
input SCD ;
input SCE ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_1.v b/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_1.v
index 75d41b4..e480a14 100644
--- a/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_1.v
+++ b/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_1.v
@@ -87,11 +87,7 @@
D ,
SCD ,
SCE ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -100,10 +96,6 @@
input SCD ;
input SCE ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_2.v b/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_2.v
index 19dacdf..a2a73a7 100644
--- a/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_2.v
+++ b/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_2.v
@@ -87,11 +87,7 @@
D ,
SCD ,
SCE ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -100,10 +96,6 @@
input SCD ;
input SCE ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_4.v b/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_4.v
index dea7775..a84fef1 100644
--- a/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_4.v
+++ b/cells/sdfrtp/sky130_fd_sc_ls__sdfrtp_4.v
@@ -87,11 +87,7 @@
D ,
SCD ,
SCE ,
- RESET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ RESET_B
);
output Q ;
@@ -100,10 +96,6 @@
input SCD ;
input SCE ;
input RESET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_1.v b/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_1.v
index 31100c6..2b9b18e 100644
--- a/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_1.v
+++ b/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_1.v
@@ -91,11 +91,7 @@
D ,
SCD ,
SCE ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
@@ -105,10 +101,6 @@
input SCD ;
input SCE ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_2.v b/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_2.v
index 32cda75..d79e01f 100644
--- a/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_2.v
+++ b/cells/sdfsbp/sky130_fd_sc_ls__sdfsbp_2.v
@@ -91,11 +91,7 @@
D ,
SCD ,
SCE ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
@@ -105,10 +101,6 @@
input SCD ;
input SCE ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfstp/sky130_fd_sc_ls__sdfstp_1.v b/cells/sdfstp/sky130_fd_sc_ls__sdfstp_1.v
index 1b16530..88960ce 100644
--- a/cells/sdfstp/sky130_fd_sc_ls__sdfstp_1.v
+++ b/cells/sdfstp/sky130_fd_sc_ls__sdfstp_1.v
@@ -87,11 +87,7 @@
D ,
SCD ,
SCE ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
@@ -100,10 +96,6 @@
input SCD ;
input SCE ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfstp/sky130_fd_sc_ls__sdfstp_2.v b/cells/sdfstp/sky130_fd_sc_ls__sdfstp_2.v
index f631540..ae93d97 100644
--- a/cells/sdfstp/sky130_fd_sc_ls__sdfstp_2.v
+++ b/cells/sdfstp/sky130_fd_sc_ls__sdfstp_2.v
@@ -87,11 +87,7 @@
D ,
SCD ,
SCE ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
@@ -100,10 +96,6 @@
input SCD ;
input SCE ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfstp/sky130_fd_sc_ls__sdfstp_4.v b/cells/sdfstp/sky130_fd_sc_ls__sdfstp_4.v
index a4f9f35..b0960fc 100644
--- a/cells/sdfstp/sky130_fd_sc_ls__sdfstp_4.v
+++ b/cells/sdfstp/sky130_fd_sc_ls__sdfstp_4.v
@@ -87,11 +87,7 @@
D ,
SCD ,
SCE ,
- SET_B,
- VPWR ,
- VGND ,
- VPB ,
- VNB
+ SET_B
);
output Q ;
@@ -100,10 +96,6 @@
input SCD ;
input SCE ;
input SET_B;
- input VPWR ;
- input VGND ;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_1.v b/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_1.v
index 6698f63..4f788b1 100644
--- a/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_1.v
+++ b/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_1.v
@@ -81,28 +81,20 @@
`celldefine
module sky130_fd_sc_ls__sdfxbp_1 (
- Q ,
- Q_N ,
- CLK ,
- D ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ Q_N,
+ CLK,
+ D ,
+ SCD,
+ SCE
);
- output Q ;
- output Q_N ;
- input CLK ;
- input D ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ output Q_N;
+ input CLK;
+ input D ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_2.v b/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_2.v
index 8244e48..abbb8da 100644
--- a/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_2.v
+++ b/cells/sdfxbp/sky130_fd_sc_ls__sdfxbp_2.v
@@ -81,28 +81,20 @@
`celldefine
module sky130_fd_sc_ls__sdfxbp_2 (
- Q ,
- Q_N ,
- CLK ,
- D ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ Q_N,
+ CLK,
+ D ,
+ SCD,
+ SCE
);
- output Q ;
- output Q_N ;
- input CLK ;
- input D ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ output Q_N;
+ input CLK;
+ input D ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_1.v b/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_1.v
index dd42194..efdef27 100644
--- a/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_1.v
+++ b/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_1.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__sdfxtp_1 (
- Q ,
- CLK ,
- D ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D ,
+ SCD,
+ SCE
);
- output Q ;
- input CLK ;
- input D ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_2.v b/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_2.v
index b1315a4..e16e4ec 100644
--- a/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_2.v
+++ b/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_2.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__sdfxtp_2 (
- Q ,
- CLK ,
- D ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D ,
+ SCD,
+ SCE
);
- output Q ;
- input CLK ;
- input D ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_4.v b/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_4.v
index 1348db9..b72ca4c 100644
--- a/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_4.v
+++ b/cells/sdfxtp/sky130_fd_sc_ls__sdfxtp_4.v
@@ -78,26 +78,18 @@
`celldefine
module sky130_fd_sc_ls__sdfxtp_4 (
- Q ,
- CLK ,
- D ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D ,
+ SCD,
+ SCE
);
- output Q ;
- input CLK ;
- input D ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_1.v b/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_1.v
index 9d8bd83..8482640 100644
--- a/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_1.v
+++ b/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_1.v
@@ -78,21 +78,13 @@
GCLK,
SCE ,
GATE,
- CLK ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CLK
);
output GCLK;
input SCE ;
input GATE;
input CLK ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_2.v b/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_2.v
index d77a28d..8007253 100644
--- a/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_2.v
+++ b/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_2.v
@@ -78,21 +78,13 @@
GCLK,
SCE ,
GATE,
- CLK ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CLK
);
output GCLK;
input SCE ;
input GATE;
input CLK ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_4.v b/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_4.v
index 26e9699..1c900ff 100644
--- a/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_4.v
+++ b/cells/sdlclkp/sky130_fd_sc_ls__sdlclkp_4.v
@@ -78,21 +78,13 @@
GCLK,
SCE ,
GATE,
- CLK ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ CLK
);
output GCLK;
input SCE ;
input GATE;
input CLK ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_1.v b/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_1.v
index fcce614..b939472 100644
--- a/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_1.v
+++ b/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_1.v
@@ -85,30 +85,22 @@
`celldefine
module sky130_fd_sc_ls__sedfxbp_1 (
- Q ,
- Q_N ,
- CLK ,
- D ,
- DE ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ Q_N,
+ CLK,
+ D ,
+ DE ,
+ SCD,
+ SCE
);
- output Q ;
- output Q_N ;
- input CLK ;
- input D ;
- input DE ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ output Q_N;
+ input CLK;
+ input D ;
+ input DE ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_2.v b/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_2.v
index 8ee4d3a..27b1de9 100644
--- a/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_2.v
+++ b/cells/sedfxbp/sky130_fd_sc_ls__sedfxbp_2.v
@@ -85,30 +85,22 @@
`celldefine
module sky130_fd_sc_ls__sedfxbp_2 (
- Q ,
- Q_N ,
- CLK ,
- D ,
- DE ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ Q_N,
+ CLK,
+ D ,
+ DE ,
+ SCD,
+ SCE
);
- output Q ;
- output Q_N ;
- input CLK ;
- input D ;
- input DE ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ output Q_N;
+ input CLK;
+ input D ;
+ input DE ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_1.v b/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_1.v
index 0d53004..1cf682e 100644
--- a/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_1.v
+++ b/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_1.v
@@ -82,28 +82,20 @@
`celldefine
module sky130_fd_sc_ls__sedfxtp_1 (
- Q ,
- CLK ,
- D ,
- DE ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D ,
+ DE ,
+ SCD,
+ SCE
);
- output Q ;
- input CLK ;
- input D ;
- input DE ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
+ input DE ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_2.v b/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_2.v
index 9b0aa22..5b1ba9c 100644
--- a/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_2.v
+++ b/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_2.v
@@ -82,28 +82,20 @@
`celldefine
module sky130_fd_sc_ls__sedfxtp_2 (
- Q ,
- CLK ,
- D ,
- DE ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D ,
+ DE ,
+ SCD,
+ SCE
);
- output Q ;
- input CLK ;
- input D ;
- input DE ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
+ input DE ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_4.v b/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_4.v
index b9c140b..ddfe26a 100644
--- a/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_4.v
+++ b/cells/sedfxtp/sky130_fd_sc_ls__sedfxtp_4.v
@@ -82,28 +82,20 @@
`celldefine
module sky130_fd_sc_ls__sedfxtp_4 (
- Q ,
- CLK ,
- D ,
- DE ,
- SCD ,
- SCE ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Q ,
+ CLK,
+ D ,
+ DE ,
+ SCD,
+ SCE
);
- output Q ;
- input CLK ;
- input D ;
- input DE ;
- input SCD ;
- input SCE ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Q ;
+ input CLK;
+ input D ;
+ input DE ;
+ input SCD;
+ input SCE;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/tap/sky130_fd_sc_ls__tap_1.v b/cells/tap/sky130_fd_sc_ls__tap_1.v
index ed40e0f..315f8f0 100644
--- a/cells/tap/sky130_fd_sc_ls__tap_1.v
+++ b/cells/tap/sky130_fd_sc_ls__tap_1.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__tap_1 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__tap_1 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/tap/sky130_fd_sc_ls__tap_2.v b/cells/tap/sky130_fd_sc_ls__tap_2.v
index e4e8ac3..b348bde 100644
--- a/cells/tap/sky130_fd_sc_ls__tap_2.v
+++ b/cells/tap/sky130_fd_sc_ls__tap_2.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__tap_2 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__tap_2 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/tapmet1/sky130_fd_sc_ls__tapmet1_2.v b/cells/tapmet1/sky130_fd_sc_ls__tapmet1_2.v
index 1164d7d..159607a 100644
--- a/cells/tapmet1/sky130_fd_sc_ls__tapmet1_2.v
+++ b/cells/tapmet1/sky130_fd_sc_ls__tapmet1_2.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__tapmet1_2 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__tapmet1_2 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/tapvgnd/sky130_fd_sc_ls__tapvgnd_1.v b/cells/tapvgnd/sky130_fd_sc_ls__tapvgnd_1.v
index dd8c745..46fee57 100644
--- a/cells/tapvgnd/sky130_fd_sc_ls__tapvgnd_1.v
+++ b/cells/tapvgnd/sky130_fd_sc_ls__tapvgnd_1.v
@@ -63,18 +63,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__tapvgnd_1 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__tapvgnd_1 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/tapvgnd2/sky130_fd_sc_ls__tapvgnd2_1.v b/cells/tapvgnd2/sky130_fd_sc_ls__tapvgnd2_1.v
index 14c0e03..a167aca 100644
--- a/cells/tapvgnd2/sky130_fd_sc_ls__tapvgnd2_1.v
+++ b/cells/tapvgnd2/sky130_fd_sc_ls__tapvgnd2_1.v
@@ -63,18 +63,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__tapvgnd2_1 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__tapvgnd2_1 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/tapvgndnovpb/sky130_fd_sc_ls__tapvgndnovpb_1.v b/cells/tapvgndnovpb/sky130_fd_sc_ls__tapvgndnovpb_1.v
index f2c7c84..30dd496 100644
--- a/cells/tapvgndnovpb/sky130_fd_sc_ls__tapvgndnovpb_1.v
+++ b/cells/tapvgndnovpb/sky130_fd_sc_ls__tapvgndnovpb_1.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__tapvgndnovpb_1 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__tapvgndnovpb_1 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/tapvpwrvgnd/sky130_fd_sc_ls__tapvpwrvgnd_1.v b/cells/tapvpwrvgnd/sky130_fd_sc_ls__tapvpwrvgnd_1.v
index 2eae2dd..0d52e9f 100644
--- a/cells/tapvpwrvgnd/sky130_fd_sc_ls__tapvpwrvgnd_1.v
+++ b/cells/tapvpwrvgnd/sky130_fd_sc_ls__tapvpwrvgnd_1.v
@@ -62,18 +62,7 @@
/*********************************************************/
`celldefine
-module sky130_fd_sc_ls__tapvpwrvgnd_1 (
- VPWR,
- VGND,
- VPB ,
- VNB
-);
-
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
-
+module sky130_fd_sc_ls__tapvpwrvgnd_1 ();
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
diff --git a/cells/xnor2/sky130_fd_sc_ls__xnor2_1.v b/cells/xnor2/sky130_fd_sc_ls__xnor2_1.v
index fcf7dcf..6fe3584 100644
--- a/cells/xnor2/sky130_fd_sc_ls__xnor2_1.v
+++ b/cells/xnor2/sky130_fd_sc_ls__xnor2_1.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__xnor2_1 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xnor2/sky130_fd_sc_ls__xnor2_2.v b/cells/xnor2/sky130_fd_sc_ls__xnor2_2.v
index 110d10e..ba9bdfb 100644
--- a/cells/xnor2/sky130_fd_sc_ls__xnor2_2.v
+++ b/cells/xnor2/sky130_fd_sc_ls__xnor2_2.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__xnor2_2 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xnor2/sky130_fd_sc_ls__xnor2_4.v b/cells/xnor2/sky130_fd_sc_ls__xnor2_4.v
index a5f0d52..1744b59 100644
--- a/cells/xnor2/sky130_fd_sc_ls__xnor2_4.v
+++ b/cells/xnor2/sky130_fd_sc_ls__xnor2_4.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__xnor2_4 (
- Y ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ Y,
+ A,
+ B
);
- output Y ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output Y;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xnor3/sky130_fd_sc_ls__xnor3_1.v b/cells/xnor3/sky130_fd_sc_ls__xnor3_1.v
index dbdb4c7..6f78ce2 100644
--- a/cells/xnor3/sky130_fd_sc_ls__xnor3_1.v
+++ b/cells/xnor3/sky130_fd_sc_ls__xnor3_1.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__xnor3_1 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xnor3/sky130_fd_sc_ls__xnor3_2.v b/cells/xnor3/sky130_fd_sc_ls__xnor3_2.v
index 49d454e..0efc650 100644
--- a/cells/xnor3/sky130_fd_sc_ls__xnor3_2.v
+++ b/cells/xnor3/sky130_fd_sc_ls__xnor3_2.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__xnor3_2 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xnor3/sky130_fd_sc_ls__xnor3_4.v b/cells/xnor3/sky130_fd_sc_ls__xnor3_4.v
index 79605b4..49776af 100644
--- a/cells/xnor3/sky130_fd_sc_ls__xnor3_4.v
+++ b/cells/xnor3/sky130_fd_sc_ls__xnor3_4.v
@@ -75,24 +75,16 @@
`celldefine
module sky130_fd_sc_ls__xnor3_4 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xor2/sky130_fd_sc_ls__xor2_1.v b/cells/xor2/sky130_fd_sc_ls__xor2_1.v
index d34c2f3..8ec061c 100644
--- a/cells/xor2/sky130_fd_sc_ls__xor2_1.v
+++ b/cells/xor2/sky130_fd_sc_ls__xor2_1.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__xor2_1 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xor2/sky130_fd_sc_ls__xor2_2.v b/cells/xor2/sky130_fd_sc_ls__xor2_2.v
index b3bc6e5..8f599f3 100644
--- a/cells/xor2/sky130_fd_sc_ls__xor2_2.v
+++ b/cells/xor2/sky130_fd_sc_ls__xor2_2.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__xor2_2 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xor2/sky130_fd_sc_ls__xor2_4.v b/cells/xor2/sky130_fd_sc_ls__xor2_4.v
index e834989..b17f0e6 100644
--- a/cells/xor2/sky130_fd_sc_ls__xor2_4.v
+++ b/cells/xor2/sky130_fd_sc_ls__xor2_4.v
@@ -74,22 +74,14 @@
`celldefine
module sky130_fd_sc_ls__xor2_4 (
- X ,
- A ,
- B ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B
);
- output X ;
- input A ;
- input B ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xor3/sky130_fd_sc_ls__xor3_1.v b/cells/xor3/sky130_fd_sc_ls__xor3_1.v
index da4c0b4..3d1684c 100644
--- a/cells/xor3/sky130_fd_sc_ls__xor3_1.v
+++ b/cells/xor3/sky130_fd_sc_ls__xor3_1.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__xor3_1 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xor3/sky130_fd_sc_ls__xor3_2.v b/cells/xor3/sky130_fd_sc_ls__xor3_2.v
index 12cfca4..c552ef0 100644
--- a/cells/xor3/sky130_fd_sc_ls__xor3_2.v
+++ b/cells/xor3/sky130_fd_sc_ls__xor3_2.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__xor3_2 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
diff --git a/cells/xor3/sky130_fd_sc_ls__xor3_4.v b/cells/xor3/sky130_fd_sc_ls__xor3_4.v
index 3237ec3..c971cf8 100644
--- a/cells/xor3/sky130_fd_sc_ls__xor3_4.v
+++ b/cells/xor3/sky130_fd_sc_ls__xor3_4.v
@@ -77,24 +77,16 @@
`celldefine
module sky130_fd_sc_ls__xor3_4 (
- X ,
- A ,
- B ,
- C ,
- VPWR,
- VGND,
- VPB ,
- VNB
+ X,
+ A,
+ B,
+ C
);
- output X ;
- input A ;
- input B ;
- input C ;
- input VPWR;
- input VGND;
- input VPB ;
- input VNB ;
+ output X;
+ input A;
+ input B;
+ input C;
// Voltage supply signals
supply1 VPWR;
