verilog: Fixing power pins usage in non-powerpin mode.

Previously even when `USE_POWER_PIN` was not defined, the drive strength
wrappers where still defining the power pins as ports.

Fixes https://github.com/google/skywater-pdk/issues/181

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
398 files changed
tree: a08c26ed153f111f5a2536daac8a4ef7eb10fb54
  1. cells/
  2. models/
  3. tech/
  4. timing/
  5. .gitignore
  6. LICENSE
  7. README.rst