Fixing the `power_gating_pin`. Updating sky130_fd_sc_lp 0.0.1. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_100C_1v95.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_100C_1v95.lib.json index e41a210..b1e1242 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_100C_1v95.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_100C_1v95.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.005892, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_125C_3v15.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_125C_3v15.lib.json index 0af546d..6277027 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_125C_3v15.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_125C_3v15.lib.json
@@ -6831,7 +6831,10 @@ "pin SLEEP_B": { "capacitance": 0.006185, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_140C_1v95.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_140C_1v95.lib.json index a27b79c..67eb2b0 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_140C_1v95.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_140C_1v95.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.005987, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_150C_2v05.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_150C_2v05.lib.json index 435f40b..e880bd0 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_150C_2v05.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_150C_2v05.lib.json
@@ -6579,7 +6579,10 @@ "pin SLEEP_B": { "capacitance": 0.005856, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v56.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v56.lib.json index 5de5eca..7cee13b 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v56.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v56.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.005164, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v76.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v76.lib.json index e689be1..cfe02f8 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v76.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v76.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.005356, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v95.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v95.lib.json index 2248c39..53556cf 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v95.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_1v95.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.005513, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_2v05.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_2v05.lib.json index de74e55..823004e 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_2v05.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ff_n40C_2v05.lib.json
@@ -6579,7 +6579,10 @@ "pin SLEEP_B": { "capacitance": 0.005555, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_100C_1v60.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_100C_1v60.lib.json index 4a4faeb..58dfeb4 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_100C_1v60.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_100C_1v60.lib.json
@@ -6327,7 +6327,10 @@ "pin SLEEP_B": { "capacitance": 0.005326, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_140C_1v65.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_140C_1v65.lib.json index a511209..8c00360 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_140C_1v65.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_140C_1v65.lib.json
@@ -6327,7 +6327,10 @@ "pin SLEEP_B": { "capacitance": 0.005423, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_150C_1v65.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_150C_1v65.lib.json index fd34517..0bc9e2a 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_150C_1v65.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_150C_1v65.lib.json
@@ -5571,7 +5571,10 @@ "pin SLEEP_B": { "capacitance": 0.005442, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v55.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v55.lib.json index 9f7c88c..f85c1ae 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v55.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v55.lib.json
@@ -5823,7 +5823,10 @@ "pin SLEEP_B": { "capacitance": 0.00498, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v60.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v60.lib.json index 66168aa..266d68e 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v60.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v60.lib.json
@@ -5823,7 +5823,10 @@ "pin SLEEP_B": { "capacitance": 0.005023, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v65.lib.json b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v65.lib.json index 22f9676..450c995 100644 --- a/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v65.lib.json +++ b/cells/srdlrtp/sky130_fd_sc_lp__srdlrtp_1__ss_n40C_1v65.lib.json
@@ -6075,7 +6075,10 @@ "pin SLEEP_B": { "capacitance": 0.00503, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_100C_1v95.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_100C_1v95.lib.json index 662b770..5f8dd4a 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_100C_1v95.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_100C_1v95.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.006069, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_125C_3v15.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_125C_3v15.lib.json index 6e8a150..61d2d73 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_125C_3v15.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_125C_3v15.lib.json
@@ -6831,7 +6831,10 @@ "pin SLEEP_B": { "capacitance": 0.006488, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_140C_1v95.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_140C_1v95.lib.json index d8b3710..1af86e9 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_140C_1v95.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_140C_1v95.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.006115, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_150C_2v05.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_150C_2v05.lib.json index c87adfe..afc0967 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_150C_2v05.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_150C_2v05.lib.json
@@ -6579,7 +6579,10 @@ "pin SLEEP_B": { "capacitance": 0.006164, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v56.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v56.lib.json index b2f3cfe..97ff480 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v56.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v56.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.00549, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v76.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v76.lib.json index 285d5f3..91ded85 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v76.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v76.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.005666, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v95.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v95.lib.json index af00d56..c4746a0 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v95.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_1v95.lib.json
@@ -7335,7 +7335,10 @@ "pin SLEEP_B": { "capacitance": 0.006064, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_2v05.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_2v05.lib.json index 4a35c65..a4ad175 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_2v05.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ff_n40C_2v05.lib.json
@@ -6579,7 +6579,10 @@ "pin SLEEP_B": { "capacitance": 0.005838, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_100C_1v60.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_100C_1v60.lib.json index 98aa9c7..dc2c15d 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_100C_1v60.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_100C_1v60.lib.json
@@ -6075,7 +6075,10 @@ "pin SLEEP_B": { "capacitance": 0.005471, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_140C_1v65.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_140C_1v65.lib.json index 57c0bbf..f7ab414 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_140C_1v65.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_140C_1v65.lib.json
@@ -6327,7 +6327,10 @@ "pin SLEEP_B": { "capacitance": 0.005584, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_150C_1v65.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_150C_1v65.lib.json index c2f4f89..9602f79 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_150C_1v65.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_150C_1v65.lib.json
@@ -5571,7 +5571,10 @@ "pin SLEEP_B": { "capacitance": 0.005605, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v55.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v55.lib.json index bbe47c2..da972a2 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v55.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v55.lib.json
@@ -5823,7 +5823,10 @@ "pin SLEEP_B": { "capacitance": 0.005179, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v60.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v60.lib.json index 1197a4d..bea7eee 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v60.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v60.lib.json
@@ -5823,7 +5823,10 @@ "pin SLEEP_B": { "capacitance": 0.005215, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v65.lib.json b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v65.lib.json index 08ee58b..07fb232 100644 --- a/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v65.lib.json +++ b/cells/srdlstp/sky130_fd_sc_lp__srdlstp_1__ss_n40C_1v65.lib.json
@@ -6075,7 +6075,10 @@ "pin SLEEP_B": { "capacitance": 0.005264, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_100C_1v95.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_100C_1v95.lib.json index a1ccbdb..c590134 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_100C_1v95.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_100C_1v95.lib.json
@@ -4900,7 +4900,10 @@ "pin SLEEP_B": { "capacitance": 0.002737, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_125C_3v15.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_125C_3v15.lib.json index cdcc3c1..e5f6e47 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_125C_3v15.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_125C_3v15.lib.json
@@ -4564,7 +4564,10 @@ "pin SLEEP_B": { "capacitance": 0.002853, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_140C_1v95.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_140C_1v95.lib.json index e7fca34..e655777 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_140C_1v95.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_140C_1v95.lib.json
@@ -4900,7 +4900,10 @@ "pin SLEEP_B": { "capacitance": 0.002748, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_150C_2v05.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_150C_2v05.lib.json index 5bac8cc..688a7d4 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_150C_2v05.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_150C_2v05.lib.json
@@ -4396,7 +4396,10 @@ "pin SLEEP_B": { "capacitance": 0.002774, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v56.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v56.lib.json index 8c11fae..c27f83a 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v56.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v56.lib.json
@@ -4900,7 +4900,10 @@ "pin SLEEP_B": { "capacitance": 0.002512, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v76.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v76.lib.json index 133b175..1c0a33c 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v76.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v76.lib.json
@@ -4900,7 +4900,10 @@ "pin SLEEP_B": { "capacitance": 0.002996, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v95.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v95.lib.json index 921d023..1fd8c30 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v95.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_1v95.lib.json
@@ -4900,7 +4900,10 @@ "pin SLEEP_B": { "capacitance": 0.002638, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_2v05.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_2v05.lib.json index 0243d18..e79b965 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_2v05.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ff_n40C_2v05.lib.json
@@ -4396,7 +4396,10 @@ "pin SLEEP_B": { "capacitance": 0.002652, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_100C_1v60.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_100C_1v60.lib.json index b7c130f..b41a945 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_100C_1v60.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_100C_1v60.lib.json
@@ -4228,7 +4228,10 @@ "pin SLEEP_B": { "capacitance": 0.00246, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_140C_1v65.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_140C_1v65.lib.json index 5722c0c..5d43a12 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_140C_1v65.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_140C_1v65.lib.json
@@ -4228,7 +4228,10 @@ "pin SLEEP_B": { "capacitance": 0.002491, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_150C_1v65.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_150C_1v65.lib.json index d556638..e316d86 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_150C_1v65.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_150C_1v65.lib.json
@@ -3724,7 +3724,10 @@ "pin SLEEP_B": { "capacitance": 0.002494, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v55.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v55.lib.json index c450768..b625c61 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v55.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v55.lib.json
@@ -3892,7 +3892,10 @@ "pin SLEEP_B": { "capacitance": 0.002357, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v60.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v60.lib.json index 9e144a5..b6e2613 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v60.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v60.lib.json
@@ -3892,7 +3892,10 @@ "pin SLEEP_B": { "capacitance": 0.002803, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v65.lib.json b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v65.lib.json index eab17a9..6c2c5fc 100644 --- a/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v65.lib.json +++ b/cells/srdlxtp/sky130_fd_sc_lp__srdlxtp_1__ss_n40C_1v65.lib.json
@@ -4060,7 +4060,10 @@ "pin SLEEP_B": { "capacitance": 0.002423, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_100C_1v95.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_100C_1v95.lib.json index c932a93..f3cc58b 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_100C_1v95.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_100C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.006157, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_125C_3v15.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_125C_3v15.lib.json index 29517e4..6bc4e40 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_125C_3v15.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_125C_3v15.lib.json
@@ -5367,7 +5367,10 @@ "pin SLEEP_B": { "capacitance": 0.006559, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_140C_1v95.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_140C_1v95.lib.json index b262fef..192fbe3 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_140C_1v95.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_140C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.006198, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_150C_2v05.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_150C_2v05.lib.json index 0866e2b..3d3fc83 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_150C_2v05.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_150C_2v05.lib.json
@@ -5241,7 +5241,10 @@ "pin SLEEP_B": { "capacitance": 0.006299, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v56.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v56.lib.json index 5e96f9f..20feb8f 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v56.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v56.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005614, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v76.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v76.lib.json index 9fd96c9..e4337fa 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v76.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v76.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005797, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v95.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v95.lib.json index 8abf85e..c6c92f8 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v95.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005992, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_2v05.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_2v05.lib.json index 3a18290..19bebd1 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_2v05.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ff_n40C_2v05.lib.json
@@ -5241,7 +5241,10 @@ "pin SLEEP_B": { "capacitance": 0.005976, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_100C_1v60.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_100C_1v60.lib.json index 26b0073..cc5d1a9 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_100C_1v60.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_100C_1v60.lib.json
@@ -5115,7 +5115,10 @@ "pin SLEEP_B": { "capacitance": 0.005586, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_140C_1v65.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_140C_1v65.lib.json index 1800ed2..8739b46 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_140C_1v65.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_140C_1v65.lib.json
@@ -5115,7 +5115,10 @@ "pin SLEEP_B": { "capacitance": 0.005702, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_150C_1v65.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_150C_1v65.lib.json index 97297c8..a3aa3a4 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_150C_1v65.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_150C_1v65.lib.json
@@ -4863,7 +4863,10 @@ "pin SLEEP_B": { "capacitance": 0.005717, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v55.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v55.lib.json index 40b91df..c7d9513 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v55.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v55.lib.json
@@ -4863,7 +4863,10 @@ "pin SLEEP_B": { "capacitance": 0.005275, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v60.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v60.lib.json index 56030ae..f5af607 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v60.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v60.lib.json
@@ -4989,7 +4989,10 @@ "pin SLEEP_B": { "capacitance": 0.005423, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v65.lib.json b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v65.lib.json index 09cb9e4..85a2cb2 100644 --- a/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v65.lib.json +++ b/cells/srsdfrtn/sky130_fd_sc_lp__srsdfrtn_1__ss_n40C_1v65.lib.json
@@ -4989,7 +4989,10 @@ "pin SLEEP_B": { "capacitance": 0.005556, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_100C_1v95.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_100C_1v95.lib.json index 1aaf52d..ed97ec1 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_100C_1v95.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_100C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.00615, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_125C_3v15.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_125C_3v15.lib.json index 166233a..f9dea3d 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_125C_3v15.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_125C_3v15.lib.json
@@ -5367,7 +5367,10 @@ "pin SLEEP_B": { "capacitance": 0.006594, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_140C_1v95.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_140C_1v95.lib.json index 83368e1..8957568 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_140C_1v95.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_140C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.006208, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_150C_2v05.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_150C_2v05.lib.json index e803981..f5ae4f2 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_150C_2v05.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_150C_2v05.lib.json
@@ -5241,7 +5241,10 @@ "pin SLEEP_B": { "capacitance": 0.00635, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v56.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v56.lib.json index a33bf1a..a073a54 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v56.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v56.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005702, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v76.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v76.lib.json index fdad0f0..a17ee9a 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v76.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v76.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005764, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v95.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v95.lib.json index 3e55582..2360ddb 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v95.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005919, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_2v05.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_2v05.lib.json index 3b2bbca..15be19f 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_2v05.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ff_n40C_2v05.lib.json
@@ -5241,7 +5241,10 @@ "pin SLEEP_B": { "capacitance": 0.005955, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_100C_1v60.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_100C_1v60.lib.json index c60580c..ab0af62 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_100C_1v60.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_100C_1v60.lib.json
@@ -4989,7 +4989,10 @@ "pin SLEEP_B": { "capacitance": 0.005591, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_140C_1v65.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_140C_1v65.lib.json index 1c061d2..b143a5e 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_140C_1v65.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_140C_1v65.lib.json
@@ -5115,7 +5115,10 @@ "pin SLEEP_B": { "capacitance": 0.005736, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_150C_1v65.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_150C_1v65.lib.json index 0afbf04..6c82d08 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_150C_1v65.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_150C_1v65.lib.json
@@ -4737,7 +4737,10 @@ "pin SLEEP_B": { "capacitance": 0.005718, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v55.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v55.lib.json index 36d6c4f..b4f0b31 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v55.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v55.lib.json
@@ -4863,7 +4863,10 @@ "pin SLEEP_B": { "capacitance": 0.005285, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v60.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v60.lib.json index 30b154d..b70a1ed 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v60.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v60.lib.json
@@ -4863,7 +4863,10 @@ "pin SLEEP_B": { "capacitance": 0.005331, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v65.lib.json b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v65.lib.json index 5f7ef41..867a42e 100644 --- a/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v65.lib.json +++ b/cells/srsdfrtp/sky130_fd_sc_lp__srsdfrtp_1__ss_n40C_1v65.lib.json
@@ -4989,7 +4989,10 @@ "pin SLEEP_B": { "capacitance": 0.005386, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_100C_1v95.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_100C_1v95.lib.json index 55649b3..96268b5 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_100C_1v95.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_100C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.006165, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_125C_3v15.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_125C_3v15.lib.json index e061d23..766b155 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_125C_3v15.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_125C_3v15.lib.json
@@ -5367,7 +5367,10 @@ "pin SLEEP_B": { "capacitance": 0.006561, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_140C_1v95.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_140C_1v95.lib.json index 81df925..e9fdc67 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_140C_1v95.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_140C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.006134, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_150C_2v05.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_150C_2v05.lib.json index 99240c6..5d2eec4 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_150C_2v05.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_150C_2v05.lib.json
@@ -5241,7 +5241,10 @@ "pin SLEEP_B": { "capacitance": 0.00619, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v56.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v56.lib.json index df987f7..dbfc851 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v56.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v56.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005535, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v76.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v76.lib.json index 7a3a540..9b482dd 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v76.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v76.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005715, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v95.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v95.lib.json index 671e31b..e64850d 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v95.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_1v95.lib.json
@@ -5619,7 +5619,10 @@ "pin SLEEP_B": { "capacitance": 0.005844, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_2v05.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_2v05.lib.json index a90a330..33230bc 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_2v05.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ff_n40C_2v05.lib.json
@@ -5241,7 +5241,10 @@ "pin SLEEP_B": { "capacitance": 0.006051, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_100C_1v60.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_100C_1v60.lib.json index 6beb704..7a4d83a 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_100C_1v60.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_100C_1v60.lib.json
@@ -5115,7 +5115,10 @@ "pin SLEEP_B": { "capacitance": 0.005549, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_140C_1v65.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_140C_1v65.lib.json index caadb03..ba0b434 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_140C_1v65.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_140C_1v65.lib.json
@@ -5115,7 +5115,10 @@ "pin SLEEP_B": { "capacitance": 0.005661, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_150C_1v65.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_150C_1v65.lib.json index 99a19dc..ba6438b 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_150C_1v65.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_150C_1v65.lib.json
@@ -4863,7 +4863,10 @@ "pin SLEEP_B": { "capacitance": 0.005674, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v55.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v55.lib.json index bd29fd2..73a12da 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v55.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v55.lib.json
@@ -4863,7 +4863,10 @@ "pin SLEEP_B": { "capacitance": 0.005249, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v60.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v60.lib.json index 8619514..74ff1e0 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v60.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v60.lib.json
@@ -4989,7 +4989,10 @@ "pin SLEEP_B": { "capacitance": 0.005312, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v65.lib.json b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v65.lib.json index 28c1ffd..7ba20a8 100644 --- a/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v65.lib.json +++ b/cells/srsdfstp/sky130_fd_sc_lp__srsdfstp_1__ss_n40C_1v65.lib.json
@@ -4989,7 +4989,10 @@ "pin SLEEP_B": { "capacitance": 0.005516, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_100C_1v95.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_100C_1v95.lib.json index 808547c..6aaaff7 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_100C_1v95.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_100C_1v95.lib.json
@@ -4198,7 +4198,10 @@ "pin SLEEP_B": { "capacitance": 0.003165, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_125C_3v15.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_125C_3v15.lib.json index b6fa14e..2334453 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_125C_3v15.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_125C_3v15.lib.json
@@ -4030,7 +4030,10 @@ "pin SLEEP_B": { "capacitance": 0.003557, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_140C_1v95.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_140C_1v95.lib.json index 6ee11d1..13d313a 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_140C_1v95.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_140C_1v95.lib.json
@@ -4198,7 +4198,10 @@ "pin SLEEP_B": { "capacitance": 0.003182, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_150C_2v05.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_150C_2v05.lib.json index 6c82b06..9432803 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_150C_2v05.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_150C_2v05.lib.json
@@ -3946,7 +3946,10 @@ "pin SLEEP_B": { "capacitance": 0.003422, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v56.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v56.lib.json index 6950e00..2e6f4c2 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v56.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v56.lib.json
@@ -4198,7 +4198,10 @@ "pin SLEEP_B": { "capacitance": 0.002913, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v76.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v76.lib.json index 850d656..b13e6ea 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v76.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v76.lib.json
@@ -4198,7 +4198,10 @@ "pin SLEEP_B": { "capacitance": 0.003207, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v95.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v95.lib.json index 3fb2879..789f8fa 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v95.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_1v95.lib.json
@@ -4198,7 +4198,10 @@ "pin SLEEP_B": { "capacitance": 0.003066, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_2v05.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_2v05.lib.json index bb7fb91..33b47c4 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_2v05.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ff_n40C_2v05.lib.json
@@ -3946,7 +3946,10 @@ "pin SLEEP_B": { "capacitance": 0.003332, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_100C_1v60.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_100C_1v60.lib.json index ba18e63..f0124c7 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_100C_1v60.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_100C_1v60.lib.json
@@ -3862,7 +3862,10 @@ "pin SLEEP_B": { "capacitance": 0.002888, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_140C_1v65.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_140C_1v65.lib.json index 1970280..06a3977 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_140C_1v65.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_140C_1v65.lib.json
@@ -3862,7 +3862,10 @@ "pin SLEEP_B": { "capacitance": 0.002921, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_150C_1v65.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_150C_1v65.lib.json index 63d2480..5aa8d3e 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_150C_1v65.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_150C_1v65.lib.json
@@ -3610,7 +3610,10 @@ "pin SLEEP_B": { "capacitance": 0.00292, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v55.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v55.lib.json index b5d47af..f28f2d2 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v55.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v55.lib.json
@@ -3694,7 +3694,10 @@ "pin SLEEP_B": { "capacitance": 0.002782, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v60.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v60.lib.json index 8b13125..94674db 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v60.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v60.lib.json
@@ -3694,7 +3694,10 @@ "pin SLEEP_B": { "capacitance": 0.002949, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",
diff --git a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v65.lib.json b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v65.lib.json index 19e4f6e..1a208e1 100644 --- a/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v65.lib.json +++ b/cells/srsdfxtp/sky130_fd_sc_lp__srsdfxtp_1__ss_n40C_1v65.lib.json
@@ -3778,7 +3778,10 @@ "pin SLEEP_B": { "capacitance": 0.002824, "clock": "false", - "comp_attribute power_gating_pin": "power_pin_1\", \"1", + "comp_attribute power_gating_pin": [ + "power_pin_1", + "1" + ], "direction": "input", "max_transition": 1.0, "related_ground_pin": "VGND",